ok so uh, basic script notes you should say:
-We designed a psuedo-stack machine, code named the Snorkling Dingo.
-The PSM/SD utilizes a stack for most processing with two additional registers to reduce the size of the instruction set. Instead of having extra instructions that manipulate the stack, such as a DUP instruction for copying stack values, this ISA just has the programmer push and pop values to two registers to duplicate/temporarily save stack values for later processing
-A TOS register is utilized so that both the Top of stack and Next-on-Stack (NOS) register can be used in calculations at the same time.
-Nearly every instruction in the ISA only has one operand, either usually a register or an immediate, as illustrated in the fibonacci implementation of the code. However, for arithmetic instructions such as ADD or SUB, no operands can be specified to use purely stack values, and for the JNE instruction both a register and a jump to address need to be specified.
-(switch slides) The instruction encoding is uniform throughout our ISA. The first 4 bits are the opcode, the next bit is a register enable bit, which specifies if a register is being read/written to, the next bit designates the A or B register, and the following 10 bits are left for immediate values
-On arithmetic operations, such as ADD, the opcode is always 0000 (similar to MIPS) and the last four bits in the instruction are sent to the ALU for specifying the operation.
-The table on the right designates each control signal. StackPush and StackPop act as read/write controls for the stack component.
-Jump designates a basic jump while JumpCond designates a JNE instruction.
-MemToStack and memwr behave similarly to MIPS
-ALU Op is designated here as 1 and 0 but really acts a bitmask against the last 4 bits in the instruction. When set to 0, a subtraction operation is always performed and in most cases the other value in the ALU is 0, selected by the PassSrc signal, so that the SelSrc value can be passed through. This is most commonly used when passing through a memory address from an immediate or a register
-The SelSrc signal, short for select source, designates where the first operand to the ALU is sourced from. Options are shown in this table down here.
-The RegWr signal only deals with the A and B registers and is currently only set high on the POP instruction.
-TOSWrEn is a seperate write enable signal for the TOS register only, and it designates when the register should be overwritten. This is proceded by a multiplexer controlled by TOSWrSrc. These two signals allow precise control so that the stack memory does not have to be touched in the event that TOS is being operated on by a source other than the stack output.
-Finally we determined the clock period for our processor to be 8ns. This is taken from the longest possible instruction, STORE or LOAD with a register specified, which are both about 8ns given the component timings from lecture. We determined that the data path for one of these instructions involves passing through instruction fetch, reading a register, going through the ALU, reading memory, and writing back to the TOS. While it seems like the data stack would increase the time, the data stack only depends on the TOS value and needs to be written before TOS is overwritten by the value in memory, so as soon as the StackPush value is raised, it obtains the value and performs it's duty simultaneously, thus it's time required can be neglected.