Advertisement
Not a member of Pastebin yet?
Sign Up,
it unlocks many cool features!
- //////////////////////////////////////////////////////
- // Block at 82878AA8h
- // Function ''
- //////////////////////////////////////////////////////
- uint64 __fastcall _code__block82878AA8( uint64 ip, cpu::CpuRegs& regs )
- {
- const uint32 local_instr = (uint32)(ip - 0x82878AA8) / 4;
- switch ( local_instr )
- {
- default: cpu::invalid_address( ip, 0x82878AA8 );
- /* 82878AA8h */ case 0: /* mfspr R12, LR */
- /* 82878AA8h case 0:*/ regs.R12 = regs.LR;
- /* 82878AA8h case 0:*/ return 0x82878AAC;
- /* 82878AACh */ case 1: /* bl 2298928 */
- /* 82878AACh case 1:*/ regs.LR = 0x82878AB0; return 0x82AA9EDC;
- /* 82878AACh case 1:*/ return 0x82878AB0;
- /* 82878AB0h */ case 2: /* stwu R1, <#[R1 - 240]> */
- /* 82878AB0h case 2:*/ cpu::mem::store32( regs, regs.R1, (uint32)(regs.R1 + 0xFFFFFF10) );
- regs.R1 = (uint32)(regs.R1 + 0xFFFFFF10);
- /* 82878AB0h case 2:*/ return 0x82878AB4;
- /* 82878AB4h */ case 3: /* lis R11, 0 */
- /* 82878AB4h case 3:*/ cpu::op::lis<0>(regs,®s.R11,0x0);
- /* 82878AB4h case 3:*/ return 0x82878AB8;
- /* 82878AB8h */ case 4: /* ld R29, <#[R3 + 272]> */
- /* 82878AB8h case 4:*/ cpu::mem::load64( regs, ®s.R29, (uint32)(regs.R3 + 0x00000110) );
- /* 82878AB8h case 4:*/ return 0x82878ABC;
- /* 82878ABCh */ case 5: /* li R10, 0 */
- /* 82878ABCh case 5:*/ cpu::op::li<0>(regs,®s.R10,0x0);
- /* 82878ABCh case 5:*/ return 0x82878AC0;
- /* 82878AC0h */ case 6: /* ori R27, R11, 65535 */
- /* 82878AC0h case 6:*/ cpu::op::ori<0>(regs,®s.R27,regs.R11,0xFFFF);
- /* 82878AC0h case 6:*/ return 0x82878AC4;
- /* 82878AC4h */ case 7: /* std R10, <#[R3 + 296]> */
- /* 82878AC4h case 7:*/ cpu::mem::store64( regs, regs.R10, (uint32)(regs.R3 + 0x00000128) );
- /* 82878AC4h case 7:*/ return 0x82878AC8;
- /* 82878AC8h */ case 8: /* mr R31, R3 */
- /* 82878AC8h case 8:*/ regs.R31 = regs.R3;
- /* 82878AC8h case 8:*/ return 0x82878ACC;
- /* 82878ACCh */ case 9: /* add R11, R29, R27 */
- /* 82878ACCh case 9:*/ cpu::op::add<0>(regs,®s.R11,regs.R29,regs.R27);
- /* 82878ACCh case 9:*/ return 0x82878AD0;
- /* 82878AD0h */ case 10: /* mr R24, R4 */
- /* 82878AD0h case 10:*/ regs.R24 = regs.R4;
- /* 82878AD0h case 10:*/ return 0x82878AD4;
- /* 82878AD4h */ case 11: /* lwz R4, <#[R3 + 400]> */
- /* 82878AD4h case 11:*/ cpu::mem::load32z( regs, ®s.R4, (uint32)(regs.R3 + 0x00000190) );
- /* 82878AD4h case 11:*/ return 0x82878AD8;
- /* 82878AD8h */ case 12: /* sradi R10, R11, 15 */
- /* 82878AD8h case 12:*/ cpu::op::sradi<0,15>(regs,®s.R10,regs.R11);
- /* 82878AD8h case 12:*/ return 0x82878ADC;
- /* 82878ADCh */ case 13: /* addi R3, R1, 80 */
- /* 82878ADCh case 13:*/ cpu::op::addi<0>(regs,®s.R3,regs.R1,0x50);
- /* 82878ADCh case 13:*/ return 0x82878AE0;
- /* 82878AE0h */ case 14: /* rldicl R10, R10, 16, 48 */
- /* 82878AE0h case 14:*/ cpu::op::rldicl<0,16,48>(regs,®s.R10,regs.R10);
- /* 82878AE0h case 14:*/ return 0x82878AE4;
- /* 82878AE4h */ case 15: /* li R5, 64 */
- /* 82878AE4h case 15:*/ cpu::op::li<0>(regs,®s.R5,0x40);
- /* 82878AE4h case 15:*/ return 0x82878AE8;
- /* 82878AE8h */ case 16: /* add R11, R10, R11 */
- /* 82878AE8h case 16:*/ cpu::op::add<0>(regs,®s.R11,regs.R10,regs.R11);
- /* 82878AE8h case 16:*/ return 0x82878AEC;
- /* 82878AECh */ case 17: /* sradi R11, R11, 16 */
- /* 82878AECh case 17:*/ cpu::op::sradi<0,16>(regs,®s.R11,regs.R11);
- /* 82878AECh case 17:*/ return 0x82878AF0;
- /* 82878AF0h */ case 18: /* extsw R26, R11 */
- /* 82878AF0h case 18:*/ cpu::op::extsw<0>(regs,®s.R26,regs.R11);
- /* 82878AF0h case 18:*/ return 0x82878AF4;
- /* 82878AF4h */ case 19: /* stw R26, <#[R31 + 304]> */
- /* 82878AF4h case 19:*/ cpu::mem::store32( regs, regs.R26, (uint32)(regs.R31 + 0x00000130) );
- /* 82878AF4h case 19:*/ return 0x82878AF8;
- /* 82878AF8h */ case 20: /* bl 2300936 */
- /* 82878AF8h case 20:*/ regs.LR = 0x82878AFC; return 0x82AAA700;
- /* 82878AF8h case 20:*/ return 0x82878AFC;
- /* 82878AFCh */ case 21: /* lis R11, -11069 */
- /* 82878AFCh case 21:*/ cpu::op::lis<0>(regs,®s.R11,0xFFFFD4C3);
- /* 82878AFCh case 21:*/ return 0x82878B00;
- /* 82878B00h */ case 22: /* lwz R4, <#[R1 + 80]> */
- /* 82878B00h case 22:*/ cpu::mem::load32z( regs, ®s.R4, (uint32)(regs.R1 + 0x00000050) );
- /* 82878B00h case 22:*/ return 0x82878B04;
- /* 82878B04h */ case 23: /* li R10, 64 */
- /* 82878B04h case 23:*/ cpu::op::li<0>(regs,®s.R10,0x40);
- /* 82878B04h case 23:*/ return 0x82878B08;
- /* 82878B08h */ case 24: /* ori R11, R11, 45729 */
- /* 82878B08h case 24:*/ cpu::op::ori<0>(regs,®s.R11,regs.R11,0xB2A1);
- /* 82878B08h case 24:*/ return 0x82878B0C;
- /* 82878B0Ch */ case 25: /* std R10, <#[R31 + 296]> */
- /* 82878B0Ch case 25:*/ cpu::mem::store64( regs, regs.R10, (uint32)(regs.R31 + 0x00000128) );
- /* 82878B0Ch case 25:*/ return 0x82878B10;
- /* 82878B10h */ case 26: /* subf R11, R4, R11 */
- /* 82878B10h case 26:*/ cpu::op::subf<0>(regs,®s.R11,regs.R4,regs.R11);
- /* 82878B10h case 26:*/ return 0x82878B14;
- /* 82878B14h */ case 27: /* cntlzw R11, R11 */
- /* 82878B14h case 27:*/ cpu::op::cntlzw<0>(regs,®s.R11,regs.R11);
- /* 82878B14h case 27:*/ return 0x82878B18;
- /* 82878B18h */ case 28: /* rlwinm. R25, R11, 27, 31, 31 */
- /* 82878B18h case 28:*/ cpu::op::rlwinm<1,27,31,31>(regs,®s.R25,regs.R11);
- /* 82878B18h case 28:*/ return 0x82878B1C;
- /* 82878B1Ch */ case 29: /* stw R25, <#[R31 + 404]> */
- /* 82878B1Ch case 29:*/ cpu::mem::store32( regs, regs.R25, (uint32)(regs.R31 + 0x00000194) );
- /* 82878B1Ch case 29:*/ return 0x82878B20;
- /* 82878B20h */ case 30: /* bc 12, CR0_EQ, 272 */
- /* 82878B20h case 30:*/ if ( regs.CR[0].eq ) { return 0x82878C30; }
- /* 82878B20h case 30:*/ return 0x82878B24;
- /* 82878B24h */ case 31: /* li R12, 255 */
- /* 82878B24h case 31:*/ cpu::op::li<0>(regs,®s.R12,0xFF);
- /* 82878B24h case 31:*/ return 0x82878B28;
- /* 82878B28h */ case 32: /* ld R11, <#[R1 + 88]> */
- /* 82878B28h case 32:*/ cpu::mem::load64( regs, ®s.R11, (uint32)(regs.R1 + 0x00000058) );
- /* 82878B28h case 32:*/ return 0x82878B2C;
- /* 82878B2Ch */ case 33: /* addi R10, R1, 80 */
- /* 82878B2Ch case 33:*/ cpu::op::addi<0>(regs,®s.R10,regs.R1,0x50);
- /* 82878B2Ch case 33:*/ return 0x82878B30;
- /* 82878B30h */ case 34: /* rldicr R12, R12, 48, 15 */
- /* 82878B30h case 34:*/ cpu::op::rldicr<0,48,15>(regs,®s.R12,regs.R12);
- /* 82878B30h case 34:*/ return 0x82878B34;
- /* 82878B34h */ case 35: /* rldicl R7, R11, 48, 16 */
- /* 82878B34h case 35:*/ cpu::op::rldicl<0,48,16>(regs,®s.R7,regs.R11);
- /* 82878B34h case 35:*/ return 0x82878B38;
- /* 82878B38h */ case 36: /* and R8, R11, R12 */
- /* 82878B38h case 36:*/ cpu::op::and<0>(regs,®s.R8,regs.R11,regs.R12);
- /* 82878B38h case 36:*/ return 0x82878B3C;
- /* 82878B3Ch */ case 37: /* li R12, 255 */
- /* 82878B3Ch case 37:*/ cpu::op::li<0>(regs,®s.R12,0xFF);
- /* 82878B3Ch case 37:*/ return 0x82878B40;
- /* 82878B40h */ case 38: /* rlwinm R6, R11, 0, 16, 23 */
- /* 82878B40h case 38:*/ cpu::op::rlwinm<0,0,16,23>(regs,®s.R6,regs.R11);
- /* 82878B40h case 38:*/ return 0x82878B44;
- /* 82878B44h */ case 39: /* lwbrx R4, <#[R10]> */
- /* 82878B44h case 39:*/ cpu::mem::lwbrx( regs, ®s.R4, (uint32)(regs.R10 + 0x00000000) );
- /* 82878B44h case 39:*/ return 0x82878B48;
- /* 82878B48h */ case 40: /* rldicr R12, R12, 40, 23 */
- /* 82878B48h case 40:*/ cpu::op::rldicr<0,40,23>(regs,®s.R12,regs.R12);
- /* 82878B48h case 40:*/ return 0x82878B4C;
- /* 82878B4Ch */ case 41: /* or R8, R8, R7 */
- /* 82878B4Ch case 41:*/ cpu::op::or<0>(regs,®s.R8,regs.R8,regs.R7);
- /* 82878B4Ch case 41:*/ return 0x82878B50;
- /* 82878B50h */ case 42: /* rldimi R6, R11, 16, 0 */
- /* 82878B50h case 42:*/ cpu::op::rldimi<0,16,0>(regs,®s.R6,regs.R11);
- /* 82878B50h case 42:*/ return 0x82878B54;
- /* 82878B54h */ case 43: /* addi R9, R1, 84 */
- /* 82878B54h case 43:*/ cpu::op::addi<0>(regs,®s.R9,regs.R1,0x54);
- /* 82878B54h case 43:*/ return 0x82878B58;
- /* 82878B58h */ case 44: /* and R10, R11, R12 */
- /* 82878B58h case 44:*/ cpu::op::and<0>(regs,®s.R10,regs.R11,regs.R12);
- /* 82878B58h case 44:*/ return 0x82878B5C;
- /* 82878B5Ch */ case 45: /* stw R4, <#[R1 + 80]> */
- /* 82878B5Ch case 45:*/ cpu::mem::store32( regs, regs.R4, (uint32)(regs.R1 + 0x00000050) );
- /* 82878B5Ch case 45:*/ return 0x82878B60;
- /* 82878B60h */ case 46: /* rldicl R8, R8, 48, 16 */
- /* 82878B60h case 46:*/ cpu::op::rldicl<0,48,16>(regs,®s.R8,regs.R8);
- /* 82878B60h case 46:*/ return 0x82878B64;
- /* 82878B64h */ case 47: /* li R12, 255 */
- /* 82878B64h case 47:*/ cpu::op::li<0>(regs,®s.R12,0xFF);
- /* 82878B64h case 47:*/ return 0x82878B68;
- /* 82878B68h */ case 48: /* rlwinm R7, R11, 0, 8, 15 */
- /* 82878B68h case 48:*/ cpu::op::rlwinm<0,0,8,15>(regs,®s.R7,regs.R11);
- /* 82878B68h case 48:*/ return 0x82878B6C;
- /* 82878B6Ch */ case 49: /* rldicr R6, R6, 16, 47 */
- /* 82878B6Ch case 49:*/ cpu::op::rldicr<0,16,47>(regs,®s.R6,regs.R6);
- /* 82878B6Ch case 49:*/ return 0x82878B70;
- /* 82878B70h */ case 50: /* lwbrx R9, <#[R9]> */
- /* 82878B70h case 50:*/ cpu::mem::lwbrx( regs, ®s.R9, (uint32)(regs.R9 + 0x00000000) );
- /* 82878B70h case 50:*/ return 0x82878B74;
- /* 82878B74h */ case 51: /* or R10, R8, R10 */
- /* 82878B74h case 51:*/ cpu::op::or<0>(regs,®s.R10,regs.R8,regs.R10);
- /* 82878B74h case 51:*/ return 0x82878B78;
- /* 82878B78h */ case 52: /* stw R9, <#[R1 + 84]> */
- /* 82878B78h case 52:*/ cpu::mem::store32( regs, regs.R9, (uint32)(regs.R1 + 0x00000054) );
- /* 82878B78h case 52:*/ return 0x82878B7C;
- /* 82878B7Ch */ case 53: /* rldicr R12, R12, 32, 31 */
- /* 82878B7Ch case 53:*/ cpu::op::rldicr<0,32,31>(regs,®s.R12,regs.R12);
- /* 82878B7Ch case 53:*/ return 0x82878B80;
- /* 82878B80h */ case 54: /* or R8, R6, R7 */
- /* 82878B80h case 54:*/ cpu::op::or<0>(regs,®s.R8,regs.R6,regs.R7);
- /* 82878B80h case 54:*/ return 0x82878B84;
- /* 82878B84h */ case 55: /* and R9, R11, R12 */
- /* 82878B84h case 55:*/ cpu::op::and<0>(regs,®s.R9,regs.R11,regs.R12);
- /* 82878B84h case 55:*/ return 0x82878B88;
- /* 82878B88h */ case 56: /* rldicl R10, R10, 48, 16 */
- /* 82878B88h case 56:*/ cpu::op::rldicl<0,48,16>(regs,®s.R10,regs.R10);
- /* 82878B88h case 56:*/ return 0x82878B8C;
- /* 82878B8Ch */ case 57: /* rlwinm R11, R11, 0, 0, 7 */
- /* 82878B8Ch case 57:*/ cpu::op::rlwinm<0,0,0,7>(regs,®s.R11,regs.R11);
- /* 82878B8Ch case 57:*/ return 0x82878B90;
- /* 82878B90h */ case 58: /* rldicr R8, R8, 16, 47 */
- /* 82878B90h case 58:*/ cpu::op::rldicr<0,16,47>(regs,®s.R8,regs.R8);
- /* 82878B90h case 58:*/ return 0x82878B94;
- /* 82878B94h */ case 59: /* or R10, R10, R9 */
- /* 82878B94h case 59:*/ cpu::op::or<0>(regs,®s.R10,regs.R10,regs.R9);
- /* 82878B94h case 59:*/ return 0x82878B98;
- /* 82878B98h */ case 60: /* or R11, R8, R11 */
- /* 82878B98h case 60:*/ cpu::op::or<0>(regs,®s.R11,regs.R8,regs.R11);
- /* 82878B98h case 60:*/ return 0x82878B9C;
- /* 82878B9Ch */ case 61: /* addi R9, R1, 100 */
- /* 82878B9Ch case 61:*/ cpu::op::addi<0>(regs,®s.R9,regs.R1,0x64);
- /* 82878B9Ch case 61:*/ return 0x82878BA0;
- /* 82878BA0h */ case 62: /* rldicl R10, R10, 56, 8 */
- /* 82878BA0h case 62:*/ cpu::op::rldicl<0,56,8>(regs,®s.R10,regs.R10);
- /* 82878BA0h case 62:*/ return 0x82878BA4;
- /* 82878BA4h */ case 63: /* rldicr R11, R11, 8, 55 */
- /* 82878BA4h case 63:*/ cpu::op::rldicr<0,8,55>(regs,®s.R11,regs.R11);
- /* 82878BA4h case 63:*/ return 0x82878BA8;
- /* 82878BA8h */ case 64: /* addi R8, R1, 96 */
- /* 82878BA8h case 64:*/ cpu::op::addi<0>(regs,®s.R8,regs.R1,0x60);
- /* 82878BA8h case 64:*/ return 0x82878BAC;
- /* 82878BACh */ case 65: /* or R6, R10, R11 */
- /* 82878BACh case 65:*/ cpu::op::or<0>(regs,®s.R6,regs.R10,regs.R11);
- /* 82878BACh case 65:*/ return 0x82878BB0;
- /* 82878BB0h */ case 66: /* addi R5, R1, 108 */
- /* 82878BB0h case 66:*/ cpu::op::addi<0>(regs,®s.R5,regs.R1,0x6C);
- /* 82878BB0h case 66:*/ return 0x82878BB4;
- /* 82878BB4h */ case 67: /* lwbrx R28, <#[R9]> */
- /* 82878BB4h case 67:*/ cpu::mem::lwbrx( regs, ®s.R28, (uint32)(regs.R9 + 0x00000000) );
- /* 82878BB4h case 67:*/ return 0x82878BB8;
- /* 82878BB8h */ case 68: /* addi R10, R1, 104 */
- /* 82878BB8h case 68:*/ cpu::op::addi<0>(regs,®s.R10,regs.R1,0x68);
- /* 82878BB8h case 68:*/ return 0x82878BBC;
- /* 82878BBCh */ case 69: /* stw R28, <#[R1 + 100]> */
- /* 82878BBCh case 69:*/ cpu::mem::store32( regs, regs.R28, (uint32)(regs.R1 + 0x00000064) );
- /* 82878BBCh case 69:*/ return 0x82878BC0;
- /* 82878BC0h */ case 70: /* std R6, <#[R1 + 88]> */
- /* 82878BC0h case 70:*/ cpu::mem::store64( regs, regs.R6, (uint32)(regs.R1 + 0x00000058) );
- /* 82878BC0h case 70:*/ return 0x82878BC4;
- /* 82878BC4h */ case 71: /* addi R9, R1, 112 */
- /* 82878BC4h case 71:*/ cpu::op::addi<0>(regs,®s.R9,regs.R1,0x70);
- /* 82878BC4h case 71:*/ return 0x82878BC8;
- /* 82878BC8h */ case 72: /* lwbrx R7, <#[R8]> */
- /* 82878BC8h case 72:*/ cpu::mem::lwbrx( regs, ®s.R7, (uint32)(regs.R8 + 0x00000000) );
- /* 82878BC8h case 72:*/ return 0x82878BCC;
- /* 82878BCCh */ case 73: /* addi R3, R1, 116 */
- /* 82878BCCh case 73:*/ cpu::op::addi<0>(regs,®s.R3,regs.R1,0x74);
- /* 82878BCCh case 73:*/ return 0x82878BD0;
- /* 82878BD0h */ case 74: /* stw R7, <#[R1 + 96]> */
- /* 82878BD0h case 74:*/ cpu::mem::store32( regs, regs.R7, (uint32)(regs.R1 + 0x00000060) );
- /* 82878BD0h case 74:*/ return 0x82878BD4;
- /* 82878BD4h */ case 75: /* addi R30, R1, 120 */
- /* 82878BD4h case 75:*/ cpu::op::addi<0>(regs,®s.R30,regs.R1,0x78);
- /* 82878BD4h case 75:*/ return 0x82878BD8;
- /* 82878BD8h */ case 76: /* lwbrx R11, <#[R5]> */
- /* 82878BD8h case 76:*/ cpu::mem::lwbrx( regs, ®s.R11, (uint32)(regs.R5 + 0x00000000) );
- /* 82878BD8h case 76:*/ return 0x82878BDC;
- /* 82878BDCh */ case 77: /* addi R5, R1, 124 */
- /* 82878BDCh case 77:*/ cpu::op::addi<0>(regs,®s.R5,regs.R1,0x7C);
- /* 82878BDCh case 77:*/ return 0x82878BE0;
- /* 82878BE0h */ case 78: /* stw R11, <#[R1 + 108]> */
- /* 82878BE0h case 78:*/ cpu::mem::store32( regs, regs.R11, (uint32)(regs.R1 + 0x0000006C) );
- /* 82878BE0h case 78:*/ return 0x82878BE4;
- /* 82878BE4h */ case 79: /* addi R23, R1, 128 */
- /* 82878BE4h case 79:*/ cpu::op::addi<0>(regs,®s.R23,regs.R1,0x80);
- /* 82878BE4h case 79:*/ return 0x82878BE8;
- /* 82878BE8h */ case 80: /* lwbrx R10, <#[R10]> */
- /* 82878BE8h case 80:*/ cpu::mem::lwbrx( regs, ®s.R10, (uint32)(regs.R10 + 0x00000000) );
- /* 82878BE8h case 80:*/ return 0x82878BEC;
- /* 82878BECh */ case 81: /* addi R22, R1, 132 */
- /* 82878BECh case 81:*/ cpu::op::addi<0>(regs,®s.R22,regs.R1,0x84);
- /* 82878BECh case 81:*/ return 0x82878BF0;
- /* 82878BF0h */ case 82: /* stw R10, <#[R1 + 104]> */
- /* 82878BF0h case 82:*/ cpu::mem::store32( regs, regs.R10, (uint32)(regs.R1 + 0x00000068) );
- /* 82878BF0h case 82:*/ return 0x82878BF4;
- /* 82878BF4h */ case 83: /* addi R21, R1, 136 */
- /* 82878BF4h case 83:*/ cpu::op::addi<0>(regs,®s.R21,regs.R1,0x88);
- /* 82878BF4h case 83:*/ return 0x82878BF8;
- /* 82878BF8h */ case 84: /* lwbrx R8, <#[R9]> */
- /* 82878BF8h case 84:*/ cpu::mem::lwbrx( regs, ®s.R8, (uint32)(regs.R9 + 0x00000000) );
- /* 82878BF8h case 84:*/ return 0x82878BFC;
- /* 82878BFCh */ case 85: /* stw R8, <#[R1 + 112]> */
- /* 82878BFCh case 85:*/ cpu::mem::store32( regs, regs.R8, (uint32)(regs.R1 + 0x00000070) );
- /* 82878BFCh case 85:*/ return 0x82878C00;
- /* 82878C00h */ case 86: /* lwbrx R9, <#[R3]> */
- /* 82878C00h case 86:*/ cpu::mem::lwbrx( regs, ®s.R9, (uint32)(regs.R3 + 0x00000000) );
- /* 82878C00h case 86:*/ return 0x82878C04;
- /* 82878C04h */ case 87: /* stw R9, <#[R1 + 116]> */
- /* 82878C04h case 87:*/ cpu::mem::store32( regs, regs.R9, (uint32)(regs.R1 + 0x00000074) );
- /* 82878C04h case 87:*/ return 0x82878C08;
- /* 82878C08h */ case 88: /* lwbrx R10, <#[R30]> */
- /* 82878C08h case 88:*/ cpu::mem::lwbrx( regs, ®s.R10, (uint32)(regs.R30 + 0x00000000) );
- /* 82878C08h case 88:*/ return 0x82878C0C;
- /* 82878C0Ch */ case 89: /* stw R10, <#[R1 + 120]> */
- /* 82878C0Ch case 89:*/ cpu::mem::store32( regs, regs.R10, (uint32)(regs.R1 + 0x00000078) );
- /* 82878C0Ch case 89:*/ return 0x82878C10;
- /* 82878C10h */ case 90: /* lwbrx R30, <#[R5]> */
- /* 82878C10h case 90:*/ cpu::mem::lwbrx( regs, ®s.R30, (uint32)(regs.R5 + 0x00000000) );
- /* 82878C10h case 90:*/ return 0x82878C14;
- /* 82878C14h */ case 91: /* stw R30, <#[R1 + 124]> */
- /* 82878C14h case 91:*/ cpu::mem::store32( regs, regs.R30, (uint32)(regs.R1 + 0x0000007C) );
- /* 82878C14h case 91:*/ return 0x82878C18;
- /* 82878C18h */ case 92: /* lwbrx R5, <#[R23]> */
- /* 82878C18h case 92:*/ cpu::mem::lwbrx( regs, ®s.R5, (uint32)(regs.R23 + 0x00000000) );
- /* 82878C18h case 92:*/ return 0x82878C1C;
- /* 82878C1Ch */ case 93: /* stw R5, <#[R1 + 128]> */
- /* 82878C1Ch case 93:*/ cpu::mem::store32( regs, regs.R5, (uint32)(regs.R1 + 0x00000080) );
- /* 82878C1Ch case 93:*/ return 0x82878C20;
- /* 82878C20h */ case 94: /* lwbrx R5, <#[R22]> */
- /* 82878C20h case 94:*/ cpu::mem::lwbrx( regs, ®s.R5, (uint32)(regs.R22 + 0x00000000) );
- /* 82878C20h case 94:*/ return 0x82878C24;
- /* 82878C24h */ case 95: /* stw R5, <#[R1 + 132]> */
- /* 82878C24h case 95:*/ cpu::mem::store32( regs, regs.R5, (uint32)(regs.R1 + 0x00000084) );
- /* 82878C24h case 95:*/ return 0x82878C28;
- /* 82878C28h */ case 96: /* lwbrx R5, <#[R21]> */
- /* 82878C28h case 96:*/ cpu::mem::lwbrx( regs, ®s.R5, (uint32)(regs.R21 + 0x00000000) );
- /* 82878C28h case 96:*/ return 0x82878C2C;
- /* 82878C2Ch */ case 97: /* b 40 */
- /* 82878C2Ch case 97:*/ return 0x82878C54;
- /* 82878C2Ch case 97:*/ return 0x82878C30;
- }
- return 0x82878C30;
- } // Block from 82878AA8h-82878C30h (98 instructions)
Advertisement
Add Comment
Please, Sign In to add comment
Advertisement