miNombre

 .DSEG
    ; Aqui las declaraciones de variables. tipo:
    array: .byte 20 ;esto es ejemplo, en este codigo no lo uso.

 .CSEG
 .ORG 0x00000       ;reset interrupt vector
      jmp INICIO
 .ORG URXCaddr      ; 0x00024  -> interrupt vectors for USART0
      jmp USART0_reception_completed

 .ORG INT_VECTORS_SIZE ;leave room for IRQ vectors

INICIO:

    ldi zl, low(array)
    ldi zh, high(array)
    clr r16
    st z, r16


    ; Inicializar UART
    rcall UART_INICIO

    ser r16
    out ddrb, r16
    SEI

    ldi r20, 0xFF

MAIN_LOOP:

    out portb, r20
    call delay500ms
    com r20

    jmp MAIN_LOOP

; ---------------------------------------------------------------------------------------
UART_INICIO:
    push r16
    ldi r16, 103
    sts UBRR0L, r16
    ldi r16, 0
    sts UBRR0H, r16

    ldi r16, (1<<RXEN0)|(1<<TXEN0)|(1<<RXCIE0)
    sts UCSR0B, r16

    ldi r16, (1<<UCSZ01)|(1<<UCSZ00)
    sts UCSR0C, r16

    pop r16
    ret

;----USART0_reception_completed handler --------------------------------------------------
USART0_reception_completed:
    PUSH R16            ;this handler routine will be automatically called every 61msec (in this example)
    IN R16, SREG        ;Backup SREG. MANDATORY in interrupt handler routines
    PUSH R16

    ;do the desired periodic task here
    LDS R17, UDR0       ;pick up the byte received and do anything with it

    ; Z apunta al inicio del array
    ldi zl, low(array)
    ldi zh, high(array)

buscarFinArray:
    ld r16, z
    cpi r16, 0
    breq instertar_rx
    ADIW zl, 1
    rjmp buscarFinArray

instertar_rx:
    st z+, R17
    clr r17
    st z, r17

    call UART_PRINT_STRING

    POP R16
    OUT SREG, R16       ;Recover SREG from the previous backup
    POP R16
    RETI                ;RETI is MANDATORY when returning from an interrupt handling routine

; ---------------------------------------------------------------------------------------
UART_PRINT_STRING:
    push r30
    push r31

    ldi r16, 10
    sts UDR0, r16
    WAIT_TX2:
    lds r18, UCSR0A
    sbrs r18, UDRE0
    rjmp WAIT_TX2
    ldi r16, 13
    sts UDR0, r16

    ; Z apunta al inicio del array
    ldi zl, low(array)
    ldi zh, high(array)

PRINT_LOOP:
    ld r16, Z+
    cpi r16, 0
    breq END_PRINT

WAIT_TX:
    lds r18, UCSR0A
    sbrs r18, UDRE0
    rjmp WAIT_TX

    sts UDR0, r16
    rjmp PRINT_LOOP

END_PRINT:
    pop r31
    pop r30
    ret

; ---------------------------------------------------------------------------------------
delay500ms:
    ldi  r21, 41
    ldi  r22, 150
    ldi  r23, 128
L1: dec  r23
    brne L1
    dec  r22
    brne L1
    dec  r21
    brne L1
    ret