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  1. /dts-v1/;
  2.  
  3. / {
  4. interrupt-parent = < 0x01 >;
  5. #address-cells = < 0x02 >;
  6. #size-cells = < 0x02 >;
  7. compatible = "hardkernel,odroid-c4\0amlogic,sm1";
  8. model = "Hardkernel ODROID-HC4";
  9.  
  10. chosen {
  11. #address-cells = < 0x02 >;
  12. #size-cells = < 0x02 >;
  13. ranges;
  14. stdout-path = "serial0:115200n8";
  15.  
  16. framebuffer-cvbs {
  17. compatible = "amlogic,simple-framebuffer\0simple-framebuffer";
  18. amlogic,pipeline = "vpu-cvbs";
  19. clocks = < 0x02 0xa8 0x02 0x35 0x02 0x3a >;
  20. status = "disabled";
  21. power-domains = < 0x03 0x00 >;
  22. phandle = < 0x50 >;
  23. };
  24.  
  25. framebuffer-hdmi {
  26. compatible = "amlogic,simple-framebuffer\0simple-framebuffer";
  27. amlogic,pipeline = "vpu-hdmi";
  28. clocks = < 0x02 0xa8 0x02 0x35 0x02 0x3a >;
  29. status = "disabled";
  30. power-domains = < 0x03 0x00 >;
  31. phandle = < 0x51 >;
  32. };
  33. };
  34.  
  35. efuse {
  36. compatible = "amlogic,meson-gxbb-efuse";
  37. clocks = < 0x02 0x6a >;
  38. #address-cells = < 0x01 >;
  39. #size-cells = < 0x01 >;
  40. read-only;
  41. secure-monitor = < 0x04 >;
  42. phandle = < 0x52 >;
  43. };
  44.  
  45. gpu-opp-table {
  46. compatible = "operating-points-v2";
  47. phandle = < 0x3f >;
  48.  
  49. opp-124999998 {
  50. opp-hz = < 0x00 0x773593e >;
  51. opp-microvolt = < 0xc3500 >;
  52. };
  53.  
  54. opp-249999996 {
  55. opp-hz = < 0x00 0xee6b27c >;
  56. opp-microvolt = < 0xc3500 >;
  57. };
  58.  
  59. opp-285714281 {
  60. opp-hz = < 0x00 0x1107a769 >;
  61. opp-microvolt = < 0xc3500 >;
  62. };
  63.  
  64. opp-399999994 {
  65. opp-hz = < 0x00 0x17d783fa >;
  66. opp-microvolt = < 0xc3500 >;
  67. };
  68.  
  69. opp-499999992 {
  70. opp-hz = < 0x00 0x1dcd64f8 >;
  71. opp-microvolt = < 0xc3500 >;
  72. };
  73.  
  74. opp-666666656 {
  75. opp-hz = < 0x00 0x27bc86a0 >;
  76. opp-microvolt = < 0xc3500 >;
  77. };
  78.  
  79. opp-799999987 {
  80. opp-hz = < 0x00 0x2faf07f3 >;
  81. opp-microvolt = < 0xc3500 >;
  82. };
  83. };
  84.  
  85. psci {
  86. compatible = "arm,psci-1.0";
  87. method = "smc";
  88. };
  89.  
  90. reserved-memory {
  91. #address-cells = < 0x02 >;
  92. #size-cells = < 0x02 >;
  93. ranges;
  94.  
  95. secmon@5000000 {
  96. reg = < 0x00 0x5000000 0x00 0x300000 >;
  97. no-map;
  98. phandle = < 0x53 >;
  99. };
  100.  
  101. linux,cma {
  102. compatible = "shared-dma-pool";
  103. reusable;
  104. size = < 0x00 0x38000000 >;
  105. alignment = < 0x00 0x400000 >;
  106. linux,cma-default;
  107. };
  108. };
  109.  
  110. secure-monitor {
  111. compatible = "amlogic,meson-gxbb-sm";
  112. phandle = < 0x04 >;
  113. };
  114.  
  115. soc {
  116. compatible = "simple-bus";
  117. #address-cells = < 0x02 >;
  118. #size-cells = < 0x02 >;
  119. ranges;
  120.  
  121. pcie@fc000000 {
  122. compatible = "amlogic,g12a-pcie\0snps,dw-pcie";
  123. reg = < 0x00 0xfc000000 0x00 0x400000 0x00 0xff648000 0x00 0x2000 0x00 0xfc400000 0x00 0x200000 >;
  124. reg-names = "elbi\0cfg\0config";
  125. interrupts = < 0x00 0xdd 0x04 >;
  126. #interrupt-cells = < 0x01 >;
  127. interrupt-map-mask = < 0x00 0x00 0x00 0x00 >;
  128. interrupt-map = < 0x00 0x00 0x00 0x00 0x01 0x00 0xdf 0x04 >;
  129. bus-range = < 0x00 0xff >;
  130. #address-cells = < 0x03 >;
  131. #size-cells = < 0x02 >;
  132. device_type = "pci";
  133. ranges = < 0x81000000 0x00 0x00 0x00 0xfc600000 0x00 0x100000 0x82000000 0x00 0xfc700000 0x00 0xfc700000 0x00 0x1900000 >;
  134. clocks = < 0x02 0x30 0x02 0x2d 0x02 0xc9 >;
  135. clock-names = "general\0pclk\0port";
  136. resets = < 0x05 0x0c 0x05 0x0f >;
  137. reset-names = "port\0apb";
  138. num-lanes = < 0x01 >;
  139. phys = < 0x06 0x02 >;
  140. phy-names = "pcie";
  141. status = "okay";
  142. power-domains = < 0x03 0x03 >;
  143. reset-gpios = < 0x07 0x14 0x01 >;
  144. phandle = < 0x54 >;
  145. };
  146.  
  147. thermal-zones {
  148.  
  149. cpu-thermal {
  150. polling-delay = < 0x3e8 >;
  151. polling-delay-passive = < 0x64 >;
  152. thermal-sensors = < 0x08 >;
  153. phandle = < 0x55 >;
  154.  
  155. trips {
  156.  
  157. cpu-passive {
  158. temperature = < 0x11170 >;
  159. hysteresis = < 0x7d0 >;
  160. type = "passive";
  161. phandle = < 0x09 >;
  162. };
  163.  
  164. cpu-hot {
  165. temperature = < 0x17318 >;
  166. hysteresis = < 0x7d0 >;
  167. type = "hot";
  168. phandle = < 0x0e >;
  169. };
  170.  
  171. cpu-critical {
  172. temperature = < 0x1adb0 >;
  173. hysteresis = < 0x7d0 >;
  174. type = "critical";
  175. phandle = < 0x56 >;
  176. };
  177. };
  178.  
  179. cooling-maps {
  180.  
  181. map0 {
  182. trip = < 0x09 >;
  183. cooling-device = < 0x0a 0xffffffff 0xffffffff 0x0b 0xffffffff 0xffffffff 0x0c 0xffffffff 0xffffffff 0x0d 0xffffffff 0xffffffff >;
  184. };
  185.  
  186. map1 {
  187. trip = < 0x0e >;
  188. cooling-device = < 0x0a 0xffffffff 0xffffffff 0x0b 0xffffffff 0xffffffff 0x0c 0xffffffff 0xffffffff 0x0d 0xffffffff 0xffffffff >;
  189. };
  190.  
  191. cpufreq_map0 {
  192. trip = < 0x09 >;
  193. cooling-device = < 0x0a 0xffffffff 0xffffffff 0x0b 0xffffffff 0xffffffff 0x0c 0xffffffff 0xffffffff 0x0d 0xffffffff 0xffffffff >;
  194. };
  195.  
  196. map {
  197. trip = < 0x09 >;
  198. cooling-device = < 0x0f 0xffffffff 0xffffffff >;
  199. };
  200. };
  201. };
  202.  
  203. ddr-thermal {
  204. polling-delay = < 0x3e8 >;
  205. polling-delay-passive = < 0x64 >;
  206. thermal-sensors = < 0x10 >;
  207. phandle = < 0x57 >;
  208.  
  209. trips {
  210.  
  211. ddr-passive {
  212. temperature = < 0x14c08 >;
  213. hysteresis = < 0x7d0 >;
  214. type = "passive";
  215. phandle = < 0x11 >;
  216. };
  217.  
  218. ddr-critical {
  219. temperature = < 0x1adb0 >;
  220. hysteresis = < 0x7d0 >;
  221. type = "critical";
  222. phandle = < 0x58 >;
  223. };
  224. };
  225.  
  226. cooling-maps {
  227.  
  228. map {
  229. trip = < 0x11 >;
  230. cooling-device = < 0x12 0xffffffff 0xffffffff >;
  231. };
  232. };
  233. };
  234. };
  235.  
  236. ethernet@ff3f0000 {
  237. compatible = "amlogic,meson-g12a-dwmac\0snps,dwmac-3.70a\0snps,dwmac";
  238. reg = < 0x00 0xff3f0000 0x00 0x10000 0x00 0xff634540 0x00 0x08 >;
  239. interrupts = < 0x00 0x08 0x04 >;
  240. interrupt-names = "macirq";
  241. clocks = < 0x02 0x26 0x02 0x02 0x02 0x0d 0x02 0x02 >;
  242. clock-names = "stmmaceth\0clkin0\0clkin1\0timing-adjustment";
  243. rx-fifo-depth = < 0x1000 >;
  244. tx-fifo-depth = < 0x800 >;
  245. resets = < 0x05 0x2b >;
  246. reset-names = "stmmaceth";
  247. status = "okay";
  248. power-domains = < 0x03 0x06 >;
  249. pinctrl-0 = < 0x13 0x14 >;
  250. pinctrl-names = "default";
  251. phy-mode = "rgmii";
  252. phy-handle = < 0x15 >;
  253. amlogic,tx-delay-ns = < 0x02 >;
  254. phandle = < 0x59 >;
  255.  
  256. mdio {
  257. #address-cells = < 0x01 >;
  258. #size-cells = < 0x00 >;
  259. compatible = "snps,dwmac-mdio";
  260. phandle = < 0x20 >;
  261. };
  262. };
  263.  
  264. bus@ff600000 {
  265. compatible = "simple-bus";
  266. reg = < 0x00 0xff600000 0x00 0x200000 >;
  267. #address-cells = < 0x02 >;
  268. #size-cells = < 0x02 >;
  269. ranges = < 0x00 0x00 0x00 0xff600000 0x00 0x200000 >;
  270. phandle = < 0x5a >;
  271.  
  272. hdmi-tx@0 {
  273. compatible = "amlogic,meson-g12a-dw-hdmi";
  274. reg = < 0x00 0x00 0x00 0x10000 >;
  275. interrupts = < 0x00 0x39 0x01 >;
  276. resets = < 0x05 0x13 0x05 0x42 0x05 0x4f >;
  277. reset-names = "hdmitx_apb\0hdmitx\0hdmitx_phy";
  278. clocks = < 0x02 0xa8 0x02 0x35 0x02 0x3a >;
  279. clock-names = "isfr\0iahb\0venci";
  280. #address-cells = < 0x01 >;
  281. #size-cells = < 0x00 >;
  282. #sound-dai-cells = < 0x00 >;
  283. status = "okay";
  284. pinctrl-0 = < 0x16 0x17 >;
  285. pinctrl-names = "default";
  286. hdmi-supply = < 0x18 >;
  287. phandle = < 0x4e >;
  288.  
  289. port@0 {
  290. reg = < 0x00 >;
  291. phandle = < 0x5b >;
  292.  
  293. endpoint {
  294. remote-endpoint = < 0x19 >;
  295. phandle = < 0x2a >;
  296. };
  297. };
  298.  
  299. port@1 {
  300. reg = < 0x01 >;
  301. phandle = < 0x5c >;
  302.  
  303. endpoint {
  304. remote-endpoint = < 0x1a >;
  305. phandle = < 0x47 >;
  306. };
  307. };
  308. };
  309.  
  310. bus@30000 {
  311. compatible = "simple-bus";
  312. reg = < 0x00 0x30000 0x00 0x2000 >;
  313. #address-cells = < 0x02 >;
  314. #size-cells = < 0x02 >;
  315. ranges = < 0x00 0x00 0x00 0x30000 0x00 0x2000 >;
  316. phandle = < 0x5d >;
  317.  
  318. rng@218 {
  319. compatible = "amlogic,meson-rng";
  320. reg = < 0x00 0x218 0x00 0x04 >;
  321. clocks = < 0x02 0x1b >;
  322. clock-names = "core";
  323. phandle = < 0x5e >;
  324. };
  325. };
  326.  
  327. audio-controller@32000 {
  328. compatible = "amlogic,t9015";
  329. reg = < 0x00 0x32000 0x00 0x14 >;
  330. #sound-dai-cells = < 0x00 >;
  331. sound-name-prefix = "ACODEC";
  332. clocks = < 0x02 0x24 >;
  333. clock-names = "pclk";
  334. resets = < 0x05 0x3d >;
  335. status = "disabled";
  336. phandle = < 0x5f >;
  337. };
  338.  
  339. bus@34400 {
  340. compatible = "simple-bus";
  341. reg = < 0x00 0x34400 0x00 0x400 >;
  342. #address-cells = < 0x02 >;
  343. #size-cells = < 0x02 >;
  344. ranges = < 0x00 0x00 0x00 0x34400 0x00 0x400 >;
  345. phandle = < 0x60 >;
  346.  
  347. pinctrl@40 {
  348. compatible = "amlogic,meson-g12a-periphs-pinctrl";
  349. #address-cells = < 0x02 >;
  350. #size-cells = < 0x02 >;
  351. ranges;
  352. phandle = < 0x1b >;
  353.  
  354. bank@40 {
  355. reg = < 0x00 0x40 0x00 0x4c 0x00 0xe8 0x00 0x18 0x00 0x120 0x00 0x18 0x00 0x2c0 0x00 0x40 0x00 0x340 0x00 0x1c >;
  356. reg-names = "gpio\0pull\0pull-enable\0mux\0ds";
  357. gpio-controller;
  358. #gpio-cells = < 0x02 >;
  359. gpio-ranges = < 0x1b 0x00 0x00 0x56 >;
  360. gpio-line-names = "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0PIN_36\0PIN_26\0PIN_32\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0PIN_27\0PIN_28\0PIN_16\0PIN_18\0PIN_22\0PIN_11\0PIN_13\0PIN_7\0PIN_33\0PIN_15\0PIN_19\0PIN_21\0PIN_24\0PIN_23\0PIN_8\0PIN_10\0PIN_29\0PIN_31\0PIN_12\0PIN_3\0PIN_5\0PIN_35";
  361. phandle = < 0x07 >;
  362. };
  363.  
  364. cec_ao_a_h {
  365. phandle = < 0x61 >;
  366.  
  367. mux {
  368. groups = "cec_ao_a_h";
  369. function = "cec_ao_a_h";
  370. bias-disable;
  371. };
  372. };
  373.  
  374. cec_ao_b_h {
  375. phandle = < 0x62 >;
  376.  
  377. mux {
  378. groups = "cec_ao_b_h";
  379. function = "cec_ao_b_h";
  380. bias-disable;
  381. };
  382. };
  383.  
  384. emmc-ctrl {
  385. phandle = < 0x35 >;
  386.  
  387. mux-0 {
  388. groups = "emmc_cmd";
  389. function = "emmc";
  390. bias-pull-up;
  391. drive-strength-microamp = < 0xfa0 >;
  392. };
  393.  
  394. mux-1 {
  395. groups = "emmc_clk";
  396. function = "emmc";
  397. bias-disable;
  398. drive-strength-microamp = < 0xfa0 >;
  399. };
  400. };
  401.  
  402. emmc-data-4b {
  403. phandle = < 0x63 >;
  404.  
  405. mux-0 {
  406. groups = "emmc_nand_d0\0emmc_nand_d1\0emmc_nand_d2\0emmc_nand_d3";
  407. function = "emmc";
  408. bias-pull-up;
  409. drive-strength-microamp = < 0xfa0 >;
  410. };
  411. };
  412.  
  413. emmc-data-8b {
  414. phandle = < 0x36 >;
  415.  
  416. mux-0 {
  417. groups = "emmc_nand_d0\0emmc_nand_d1\0emmc_nand_d2\0emmc_nand_d3\0emmc_nand_d4\0emmc_nand_d5\0emmc_nand_d6\0emmc_nand_d7";
  418. function = "emmc";
  419. bias-pull-up;
  420. drive-strength-microamp = < 0xfa0 >;
  421. };
  422. };
  423.  
  424. emmc-ds {
  425. phandle = < 0x37 >;
  426.  
  427. mux {
  428. groups = "emmc_nand_ds";
  429. function = "emmc";
  430. bias-pull-down;
  431. drive-strength-microamp = < 0xfa0 >;
  432. };
  433. };
  434.  
  435. emmc_clk_gate {
  436. phandle = < 0x38 >;
  437.  
  438. mux {
  439. groups = "BOOT_8";
  440. function = "gpio_periphs";
  441. bias-pull-down;
  442. drive-strength-microamp = < 0xfa0 >;
  443. };
  444. };
  445.  
  446. hdmitx_ddc {
  447. phandle = < 0x17 >;
  448.  
  449. mux {
  450. groups = "hdmitx_sda\0hdmitx_sck";
  451. function = "hdmitx";
  452. bias-disable;
  453. drive-strength-microamp = < 0xfa0 >;
  454. };
  455. };
  456.  
  457. hdmitx_hpd {
  458. phandle = < 0x16 >;
  459.  
  460. mux {
  461. groups = "hdmitx_hpd_in";
  462. function = "hdmitx";
  463. bias-disable;
  464. };
  465. };
  466.  
  467. i2c0-sda-c {
  468. phandle = < 0x64 >;
  469.  
  470. mux {
  471. groups = "i2c0_sda_c";
  472. function = "i2c0";
  473. bias-disable;
  474. drive-strength-microamp = < 0xbb8 >;
  475. };
  476. };
  477.  
  478. i2c0-sck-c {
  479. phandle = < 0x65 >;
  480.  
  481. mux {
  482. groups = "i2c0_sck_c";
  483. function = "i2c0";
  484. bias-disable;
  485. drive-strength-microamp = < 0xbb8 >;
  486. };
  487. };
  488.  
  489. i2c0-sda-z0 {
  490. phandle = < 0x66 >;
  491.  
  492. mux {
  493. groups = "i2c0_sda_z0";
  494. function = "i2c0";
  495. bias-disable;
  496. drive-strength-microamp = < 0xbb8 >;
  497. };
  498. };
  499.  
  500. i2c0-sck-z1 {
  501. phandle = < 0x67 >;
  502.  
  503. mux {
  504. groups = "i2c0_sck_z1";
  505. function = "i2c0";
  506. bias-disable;
  507. drive-strength-microamp = < 0xbb8 >;
  508. };
  509. };
  510.  
  511. i2c0-sda-z7 {
  512. phandle = < 0x68 >;
  513.  
  514. mux {
  515. groups = "i2c0_sda_z7";
  516. function = "i2c0";
  517. bias-disable;
  518. drive-strength-microamp = < 0xbb8 >;
  519. };
  520. };
  521.  
  522. i2c0-sda-z8 {
  523. phandle = < 0x69 >;
  524.  
  525. mux {
  526. groups = "i2c0_sda_z8";
  527. function = "i2c0";
  528. bias-disable;
  529. drive-strength-microamp = < 0xbb8 >;
  530. };
  531. };
  532.  
  533. i2c1-sda-x {
  534. phandle = < 0x6a >;
  535.  
  536. mux {
  537. groups = "i2c1_sda_x";
  538. function = "i2c1";
  539. bias-disable;
  540. drive-strength-microamp = < 0xbb8 >;
  541. };
  542. };
  543.  
  544. i2c1-sck-x {
  545. phandle = < 0x6b >;
  546.  
  547. mux {
  548. groups = "i2c1_sck_x";
  549. function = "i2c1";
  550. bias-disable;
  551. drive-strength-microamp = < 0xbb8 >;
  552. };
  553. };
  554.  
  555. i2c1-sda-h2 {
  556. phandle = < 0x6c >;
  557.  
  558. mux {
  559. groups = "i2c1_sda_h2";
  560. function = "i2c1";
  561. bias-disable;
  562. drive-strength-microamp = < 0xbb8 >;
  563. };
  564. };
  565.  
  566. i2c1-sck-h3 {
  567. phandle = < 0x6d >;
  568.  
  569. mux {
  570. groups = "i2c1_sck_h3";
  571. function = "i2c1";
  572. bias-disable;
  573. drive-strength-microamp = < 0xbb8 >;
  574. };
  575. };
  576.  
  577. i2c1-sda-h6 {
  578. phandle = < 0x6e >;
  579.  
  580. mux {
  581. groups = "i2c1_sda_h6";
  582. function = "i2c1";
  583. bias-disable;
  584. drive-strength-microamp = < 0xbb8 >;
  585. };
  586. };
  587.  
  588. i2c1-sck-h7 {
  589. phandle = < 0x6f >;
  590.  
  591. mux {
  592. groups = "i2c1_sck_h7";
  593. function = "i2c1";
  594. bias-disable;
  595. drive-strength-microamp = < 0xbb8 >;
  596. };
  597. };
  598.  
  599. i2c2-sda-x {
  600. phandle = < 0x70 >;
  601.  
  602. mux {
  603. groups = "i2c2_sda_x";
  604. function = "i2c2";
  605. bias-disable;
  606. drive-strength-microamp = < 0xbb8 >;
  607. };
  608. };
  609.  
  610. i2c2-sck-x {
  611. phandle = < 0x71 >;
  612.  
  613. mux {
  614. groups = "i2c2_sck_x";
  615. function = "i2c2";
  616. bias-disable;
  617. drive-strength-microamp = < 0xbb8 >;
  618. };
  619. };
  620.  
  621. i2c2-sda-z {
  622. phandle = < 0x72 >;
  623.  
  624. mux {
  625. groups = "i2c2_sda_z";
  626. function = "i2c2";
  627. bias-disable;
  628. drive-strength-microamp = < 0xbb8 >;
  629. };
  630. };
  631.  
  632. i2c2-sck-z {
  633. phandle = < 0x73 >;
  634.  
  635. mux {
  636. groups = "i2c2_sck_z";
  637. function = "i2c2";
  638. bias-disable;
  639. drive-strength-microamp = < 0xbb8 >;
  640. };
  641. };
  642.  
  643. i2c3-sda-h {
  644. phandle = < 0x74 >;
  645.  
  646. mux {
  647. groups = "i2c3_sda_h";
  648. function = "i2c3";
  649. bias-disable;
  650. drive-strength-microamp = < 0xbb8 >;
  651. };
  652. };
  653.  
  654. i2c3-sck-h {
  655. phandle = < 0x75 >;
  656.  
  657. mux {
  658. groups = "i2c3_sck_h";
  659. function = "i2c3";
  660. bias-disable;
  661. drive-strength-microamp = < 0xbb8 >;
  662. };
  663. };
  664.  
  665. i2c3-sda-a {
  666. phandle = < 0x76 >;
  667.  
  668. mux {
  669. groups = "i2c3_sda_a";
  670. function = "i2c3";
  671. bias-disable;
  672. drive-strength-microamp = < 0xbb8 >;
  673. };
  674. };
  675.  
  676. i2c3-sck-a {
  677. phandle = < 0x77 >;
  678.  
  679. mux {
  680. groups = "i2c3_sck_a";
  681. function = "i2c3";
  682. bias-disable;
  683. drive-strength-microamp = < 0xbb8 >;
  684. };
  685. };
  686.  
  687. mclk0-a {
  688. phandle = < 0x78 >;
  689.  
  690. mux {
  691. groups = "mclk0_a";
  692. function = "mclk0";
  693. bias-disable;
  694. drive-strength-microamp = < 0xbb8 >;
  695. };
  696. };
  697.  
  698. mclk1-a {
  699. phandle = < 0x79 >;
  700.  
  701. mux {
  702. groups = "mclk1_a";
  703. function = "mclk1";
  704. bias-disable;
  705. drive-strength-microamp = < 0xbb8 >;
  706. };
  707. };
  708.  
  709. mclk1-x {
  710. phandle = < 0x7a >;
  711.  
  712. mux {
  713. groups = "mclk1_x";
  714. function = "mclk1";
  715. bias-disable;
  716. drive-strength-microamp = < 0xbb8 >;
  717. };
  718. };
  719.  
  720. mclk1-z {
  721. phandle = < 0x7b >;
  722.  
  723. mux {
  724. groups = "mclk1_z";
  725. function = "mclk1";
  726. bias-disable;
  727. drive-strength-microamp = < 0xbb8 >;
  728. };
  729. };
  730.  
  731. nor {
  732. phandle = < 0x7c >;
  733.  
  734. mux {
  735. groups = "nor_d\0nor_q\0nor_c\0nor_cs";
  736. function = "nor";
  737. bias-disable;
  738. };
  739. };
  740.  
  741. pdm-din0-a {
  742. phandle = < 0x7d >;
  743.  
  744. mux {
  745. groups = "pdm_din0_a";
  746. function = "pdm";
  747. bias-disable;
  748. };
  749. };
  750.  
  751. pdm-din0-c {
  752. phandle = < 0x7e >;
  753.  
  754. mux {
  755. groups = "pdm_din0_c";
  756. function = "pdm";
  757. bias-disable;
  758. };
  759. };
  760.  
  761. pdm-din0-x {
  762. phandle = < 0x7f >;
  763.  
  764. mux {
  765. groups = "pdm_din0_x";
  766. function = "pdm";
  767. bias-disable;
  768. };
  769. };
  770.  
  771. pdm-din0-z {
  772. phandle = < 0x80 >;
  773.  
  774. mux {
  775. groups = "pdm_din0_z";
  776. function = "pdm";
  777. bias-disable;
  778. };
  779. };
  780.  
  781. pdm-din1-a {
  782. phandle = < 0x81 >;
  783.  
  784. mux {
  785. groups = "pdm_din1_a";
  786. function = "pdm";
  787. bias-disable;
  788. };
  789. };
  790.  
  791. pdm-din1-c {
  792. phandle = < 0x82 >;
  793.  
  794. mux {
  795. groups = "pdm_din1_c";
  796. function = "pdm";
  797. bias-disable;
  798. };
  799. };
  800.  
  801. pdm-din1-x {
  802. phandle = < 0x83 >;
  803.  
  804. mux {
  805. groups = "pdm_din1_x";
  806. function = "pdm";
  807. bias-disable;
  808. };
  809. };
  810.  
  811. pdm-din1-z {
  812. phandle = < 0x84 >;
  813.  
  814. mux {
  815. groups = "pdm_din1_z";
  816. function = "pdm";
  817. bias-disable;
  818. };
  819. };
  820.  
  821. pdm-din2-a {
  822. phandle = < 0x85 >;
  823.  
  824. mux {
  825. groups = "pdm_din2_a";
  826. function = "pdm";
  827. bias-disable;
  828. };
  829. };
  830.  
  831. pdm-din2-c {
  832. phandle = < 0x86 >;
  833.  
  834. mux {
  835. groups = "pdm_din2_c";
  836. function = "pdm";
  837. bias-disable;
  838. };
  839. };
  840.  
  841. pdm-din2-x {
  842. phandle = < 0x87 >;
  843.  
  844. mux {
  845. groups = "pdm_din2_x";
  846. function = "pdm";
  847. bias-disable;
  848. };
  849. };
  850.  
  851. pdm-din2-z {
  852. phandle = < 0x88 >;
  853.  
  854. mux {
  855. groups = "pdm_din2_z";
  856. function = "pdm";
  857. bias-disable;
  858. };
  859. };
  860.  
  861. pdm-din3-a {
  862. phandle = < 0x89 >;
  863.  
  864. mux {
  865. groups = "pdm_din3_a";
  866. function = "pdm";
  867. bias-disable;
  868. };
  869. };
  870.  
  871. pdm-din3-c {
  872. phandle = < 0x8a >;
  873.  
  874. mux {
  875. groups = "pdm_din3_c";
  876. function = "pdm";
  877. bias-disable;
  878. };
  879. };
  880.  
  881. pdm-din3-x {
  882. phandle = < 0x8b >;
  883.  
  884. mux {
  885. groups = "pdm_din3_x";
  886. function = "pdm";
  887. bias-disable;
  888. };
  889. };
  890.  
  891. pdm-din3-z {
  892. phandle = < 0x8c >;
  893.  
  894. mux {
  895. groups = "pdm_din3_z";
  896. function = "pdm";
  897. bias-disable;
  898. };
  899. };
  900.  
  901. pdm-dclk-a {
  902. phandle = < 0x8d >;
  903.  
  904. mux {
  905. groups = "pdm_dclk_a";
  906. function = "pdm";
  907. bias-disable;
  908. drive-strength-microamp = < 0x1f4 >;
  909. };
  910. };
  911.  
  912. pdm-dclk-c {
  913. phandle = < 0x8e >;
  914.  
  915. mux {
  916. groups = "pdm_dclk_c";
  917. function = "pdm";
  918. bias-disable;
  919. drive-strength-microamp = < 0x1f4 >;
  920. };
  921. };
  922.  
  923. pdm-dclk-x {
  924. phandle = < 0x8f >;
  925.  
  926. mux {
  927. groups = "pdm_dclk_x";
  928. function = "pdm";
  929. bias-disable;
  930. drive-strength-microamp = < 0x1f4 >;
  931. };
  932. };
  933.  
  934. pdm-dclk-z {
  935. phandle = < 0x90 >;
  936.  
  937. mux {
  938. groups = "pdm_dclk_z";
  939. function = "pdm";
  940. bias-disable;
  941. drive-strength-microamp = < 0x1f4 >;
  942. };
  943. };
  944.  
  945. pwm-a {
  946. phandle = < 0x91 >;
  947.  
  948. mux {
  949. groups = "pwm_a";
  950. function = "pwm_a";
  951. bias-disable;
  952. };
  953. };
  954.  
  955. pwm-b-x7 {
  956. phandle = < 0x92 >;
  957.  
  958. mux {
  959. groups = "pwm_b_x7";
  960. function = "pwm_b";
  961. bias-disable;
  962. };
  963. };
  964.  
  965. pwm-b-x19 {
  966. phandle = < 0x93 >;
  967.  
  968. mux {
  969. groups = "pwm_b_x19";
  970. function = "pwm_b";
  971. bias-disable;
  972. };
  973. };
  974.  
  975. pwm-c-c {
  976. phandle = < 0x94 >;
  977.  
  978. mux {
  979. groups = "pwm_c_c";
  980. function = "pwm_c";
  981. bias-disable;
  982. };
  983. };
  984.  
  985. pwm-c-x5 {
  986. phandle = < 0x95 >;
  987.  
  988. mux {
  989. groups = "pwm_c_x5";
  990. function = "pwm_c";
  991. bias-disable;
  992. };
  993. };
  994.  
  995. pwm-c-x8 {
  996. phandle = < 0x96 >;
  997.  
  998. mux {
  999. groups = "pwm_c_x8";
  1000. function = "pwm_c";
  1001. bias-disable;
  1002. };
  1003. };
  1004.  
  1005. pwm-d-x3 {
  1006. phandle = < 0x97 >;
  1007.  
  1008. mux {
  1009. groups = "pwm_d_x3";
  1010. function = "pwm_d";
  1011. bias-disable;
  1012. };
  1013. };
  1014.  
  1015. pwm-d-x6 {
  1016. phandle = < 0x2d >;
  1017.  
  1018. mux {
  1019. groups = "pwm_d_x6";
  1020. function = "pwm_d";
  1021. bias-disable;
  1022. };
  1023. };
  1024.  
  1025. pwm-e {
  1026. phandle = < 0x98 >;
  1027.  
  1028. mux {
  1029. groups = "pwm_e";
  1030. function = "pwm_e";
  1031. bias-disable;
  1032. };
  1033. };
  1034.  
  1035. pwm-f-x {
  1036. phandle = < 0x99 >;
  1037.  
  1038. mux {
  1039. groups = "pwm_f_x";
  1040. function = "pwm_f";
  1041. bias-disable;
  1042. };
  1043. };
  1044.  
  1045. pwm-f-h {
  1046. phandle = < 0x9a >;
  1047.  
  1048. mux {
  1049. groups = "pwm_f_h";
  1050. function = "pwm_f";
  1051. bias-disable;
  1052. };
  1053. };
  1054.  
  1055. sdcard_c {
  1056. phandle = < 0x31 >;
  1057.  
  1058. mux-0 {
  1059. groups = "sdcard_d0_c\0sdcard_d1_c\0sdcard_d2_c\0sdcard_d3_c\0sdcard_cmd_c";
  1060. function = "sdcard";
  1061. bias-pull-up;
  1062. drive-strength-microamp = < 0xfa0 >;
  1063. };
  1064.  
  1065. mux-1 {
  1066. groups = "sdcard_clk_c";
  1067. function = "sdcard";
  1068. bias-disable;
  1069. drive-strength-microamp = < 0xfa0 >;
  1070. };
  1071. };
  1072.  
  1073. sdcard_clk_gate_c {
  1074. phandle = < 0x32 >;
  1075.  
  1076. mux {
  1077. groups = "GPIOC_4";
  1078. function = "gpio_periphs";
  1079. bias-pull-down;
  1080. drive-strength-microamp = < 0xfa0 >;
  1081. };
  1082. };
  1083.  
  1084. sdcard_z {
  1085. phandle = < 0x9b >;
  1086.  
  1087. mux-0 {
  1088. groups = "sdcard_d0_z\0sdcard_d1_z\0sdcard_d2_z\0sdcard_d3_z\0sdcard_cmd_z";
  1089. function = "sdcard";
  1090. bias-pull-up;
  1091. drive-strength-microamp = < 0xfa0 >;
  1092. };
  1093.  
  1094. mux-1 {
  1095. groups = "sdcard_clk_z";
  1096. function = "sdcard";
  1097. bias-disable;
  1098. drive-strength-microamp = < 0xfa0 >;
  1099. };
  1100. };
  1101.  
  1102. sdcard_clk_gate_z {
  1103. phandle = < 0x9c >;
  1104.  
  1105. mux {
  1106. groups = "GPIOZ_6";
  1107. function = "gpio_periphs";
  1108. bias-pull-down;
  1109. drive-strength-microamp = < 0xfa0 >;
  1110. };
  1111. };
  1112.  
  1113. sdio {
  1114. phandle = < 0x9d >;
  1115.  
  1116. mux {
  1117. groups = "sdio_d0\0sdio_d1\0sdio_d2\0sdio_d3\0sdio_clk\0sdio_cmd";
  1118. function = "sdio";
  1119. bias-disable;
  1120. drive-strength-microamp = < 0xfa0 >;
  1121. };
  1122. };
  1123.  
  1124. sdio_clk_gate {
  1125. phandle = < 0x9e >;
  1126.  
  1127. mux {
  1128. groups = "GPIOX_4";
  1129. function = "gpio_periphs";
  1130. bias-pull-down;
  1131. drive-strength-microamp = < 0xfa0 >;
  1132. };
  1133. };
  1134.  
  1135. spdif-in-a10 {
  1136. phandle = < 0x9f >;
  1137.  
  1138. mux {
  1139. groups = "spdif_in_a10";
  1140. function = "spdif_in";
  1141. bias-disable;
  1142. };
  1143. };
  1144.  
  1145. spdif-in-a12 {
  1146. phandle = < 0xa0 >;
  1147.  
  1148. mux {
  1149. groups = "spdif_in_a12";
  1150. function = "spdif_in";
  1151. bias-disable;
  1152. };
  1153. };
  1154.  
  1155. spdif-in-h {
  1156. phandle = < 0xa1 >;
  1157.  
  1158. mux {
  1159. groups = "spdif_in_h";
  1160. function = "spdif_in";
  1161. bias-disable;
  1162. };
  1163. };
  1164.  
  1165. spdif-out-h {
  1166. phandle = < 0xa2 >;
  1167.  
  1168. mux {
  1169. groups = "spdif_out_h";
  1170. function = "spdif_out";
  1171. drive-strength-microamp = < 0x1f4 >;
  1172. bias-disable;
  1173. };
  1174. };
  1175.  
  1176. spdif-out-a11 {
  1177. phandle = < 0xa3 >;
  1178.  
  1179. mux {
  1180. groups = "spdif_out_a11";
  1181. function = "spdif_out";
  1182. drive-strength-microamp = < 0x1f4 >;
  1183. bias-disable;
  1184. };
  1185. };
  1186.  
  1187. spdif-out-a13 {
  1188. phandle = < 0xa4 >;
  1189.  
  1190. mux {
  1191. groups = "spdif_out_a13";
  1192. function = "spdif_out";
  1193. drive-strength-microamp = < 0x1f4 >;
  1194. bias-disable;
  1195. };
  1196. };
  1197.  
  1198. spicc0-x {
  1199. phandle = < 0x2b >;
  1200.  
  1201. mux {
  1202. groups = "spi0_mosi_x\0spi0_miso_x\0spi0_clk_x";
  1203. function = "spi0";
  1204. drive-strength-microamp = < 0xfa0 >;
  1205. bias-disable;
  1206. };
  1207. };
  1208.  
  1209. spicc0-ss0-x {
  1210. phandle = < 0x2c >;
  1211.  
  1212. mux {
  1213. groups = "spi0_ss0_x";
  1214. function = "spi0";
  1215. drive-strength-microamp = < 0xfa0 >;
  1216. bias-disable;
  1217. };
  1218. };
  1219.  
  1220. spicc0-c {
  1221. phandle = < 0xa5 >;
  1222.  
  1223. mux {
  1224. groups = "spi0_mosi_c\0spi0_miso_c\0spi0_ss0_c\0spi0_clk_c";
  1225. function = "spi0";
  1226. drive-strength-microamp = < 0xfa0 >;
  1227. bias-disable;
  1228. };
  1229. };
  1230.  
  1231. spicc1 {
  1232. phandle = < 0xa6 >;
  1233.  
  1234. mux {
  1235. groups = "spi1_mosi\0spi1_miso\0spi1_clk";
  1236. function = "spi1";
  1237. drive-strength-microamp = < 0xfa0 >;
  1238. };
  1239. };
  1240.  
  1241. spicc1-ss0 {
  1242. phandle = < 0xa7 >;
  1243.  
  1244. mux {
  1245. groups = "spi1_ss0";
  1246. function = "spi1";
  1247. drive-strength-microamp = < 0xfa0 >;
  1248. bias-disable;
  1249. };
  1250. };
  1251.  
  1252. tdm-a-din0 {
  1253. phandle = < 0xa8 >;
  1254.  
  1255. mux {
  1256. groups = "tdm_a_din0";
  1257. function = "tdm_a";
  1258. bias-disable;
  1259. };
  1260. };
  1261.  
  1262. tdm-a-din1 {
  1263. phandle = < 0xa9 >;
  1264.  
  1265. mux {
  1266. groups = "tdm_a_din1";
  1267. function = "tdm_a";
  1268. bias-disable;
  1269. };
  1270. };
  1271.  
  1272. tdm-a-dout0 {
  1273. phandle = < 0xaa >;
  1274.  
  1275. mux {
  1276. groups = "tdm_a_dout0";
  1277. function = "tdm_a";
  1278. bias-disable;
  1279. drive-strength-microamp = < 0xbb8 >;
  1280. };
  1281. };
  1282.  
  1283. tdm-a-dout1 {
  1284. phandle = < 0xab >;
  1285.  
  1286. mux {
  1287. groups = "tdm_a_dout1";
  1288. function = "tdm_a";
  1289. bias-disable;
  1290. drive-strength-microamp = < 0xbb8 >;
  1291. };
  1292. };
  1293.  
  1294. tdm-a-fs {
  1295. phandle = < 0xac >;
  1296.  
  1297. mux {
  1298. groups = "tdm_a_fs";
  1299. function = "tdm_a";
  1300. bias-disable;
  1301. drive-strength-microamp = < 0xbb8 >;
  1302. };
  1303. };
  1304.  
  1305. tdm-a-sclk {
  1306. phandle = < 0xad >;
  1307.  
  1308. mux {
  1309. groups = "tdm_a_sclk";
  1310. function = "tdm_a";
  1311. bias-disable;
  1312. drive-strength-microamp = < 0xbb8 >;
  1313. };
  1314. };
  1315.  
  1316. tdm-a-slv-fs {
  1317. phandle = < 0xae >;
  1318.  
  1319. mux {
  1320. groups = "tdm_a_slv_fs";
  1321. function = "tdm_a";
  1322. bias-disable;
  1323. };
  1324. };
  1325.  
  1326. tdm-a-slv-sclk {
  1327. phandle = < 0xaf >;
  1328.  
  1329. mux {
  1330. groups = "tdm_a_slv_sclk";
  1331. function = "tdm_a";
  1332. bias-disable;
  1333. };
  1334. };
  1335.  
  1336. tdm-b-din0 {
  1337. phandle = < 0xb0 >;
  1338.  
  1339. mux {
  1340. groups = "tdm_b_din0";
  1341. function = "tdm_b";
  1342. bias-disable;
  1343. };
  1344. };
  1345.  
  1346. tdm-b-din1 {
  1347. phandle = < 0xb1 >;
  1348.  
  1349. mux {
  1350. groups = "tdm_b_din1";
  1351. function = "tdm_b";
  1352. bias-disable;
  1353. };
  1354. };
  1355.  
  1356. tdm-b-din2 {
  1357. phandle = < 0xb2 >;
  1358.  
  1359. mux {
  1360. groups = "tdm_b_din2";
  1361. function = "tdm_b";
  1362. bias-disable;
  1363. };
  1364. };
  1365.  
  1366. tdm-b-din3-a {
  1367. phandle = < 0xb3 >;
  1368.  
  1369. mux {
  1370. groups = "tdm_b_din3_a";
  1371. function = "tdm_b";
  1372. bias-disable;
  1373. };
  1374. };
  1375.  
  1376. tdm-b-din3-h {
  1377. phandle = < 0xb4 >;
  1378.  
  1379. mux {
  1380. groups = "tdm_b_din3_h";
  1381. function = "tdm_b";
  1382. bias-disable;
  1383. };
  1384. };
  1385.  
  1386. tdm-b-dout0 {
  1387. phandle = < 0xb5 >;
  1388.  
  1389. mux {
  1390. groups = "tdm_b_dout0";
  1391. function = "tdm_b";
  1392. bias-disable;
  1393. drive-strength-microamp = < 0xbb8 >;
  1394. };
  1395. };
  1396.  
  1397. tdm-b-dout1 {
  1398. phandle = < 0xb6 >;
  1399.  
  1400. mux {
  1401. groups = "tdm_b_dout1";
  1402. function = "tdm_b";
  1403. bias-disable;
  1404. drive-strength-microamp = < 0xbb8 >;
  1405. };
  1406. };
  1407.  
  1408. tdm-b-dout2 {
  1409. phandle = < 0xb7 >;
  1410.  
  1411. mux {
  1412. groups = "tdm_b_dout2";
  1413. function = "tdm_b";
  1414. bias-disable;
  1415. drive-strength-microamp = < 0xbb8 >;
  1416. };
  1417. };
  1418.  
  1419. tdm-b-dout3-a {
  1420. phandle = < 0xb8 >;
  1421.  
  1422. mux {
  1423. groups = "tdm_b_dout3_a";
  1424. function = "tdm_b";
  1425. bias-disable;
  1426. drive-strength-microamp = < 0xbb8 >;
  1427. };
  1428. };
  1429.  
  1430. tdm-b-dout3-h {
  1431. phandle = < 0xb9 >;
  1432.  
  1433. mux {
  1434. groups = "tdm_b_dout3_h";
  1435. function = "tdm_b";
  1436. bias-disable;
  1437. drive-strength-microamp = < 0xbb8 >;
  1438. };
  1439. };
  1440.  
  1441. tdm-b-fs {
  1442. phandle = < 0xba >;
  1443.  
  1444. mux {
  1445. groups = "tdm_b_fs";
  1446. function = "tdm_b";
  1447. bias-disable;
  1448. drive-strength-microamp = < 0xbb8 >;
  1449. };
  1450. };
  1451.  
  1452. tdm-b-sclk {
  1453. phandle = < 0xbb >;
  1454.  
  1455. mux {
  1456. groups = "tdm_b_sclk";
  1457. function = "tdm_b";
  1458. bias-disable;
  1459. drive-strength-microamp = < 0xbb8 >;
  1460. };
  1461. };
  1462.  
  1463. tdm-b-slv-fs {
  1464. phandle = < 0xbc >;
  1465.  
  1466. mux {
  1467. groups = "tdm_b_slv_fs";
  1468. function = "tdm_b";
  1469. bias-disable;
  1470. };
  1471. };
  1472.  
  1473. tdm-b-slv-sclk {
  1474. phandle = < 0xbd >;
  1475.  
  1476. mux {
  1477. groups = "tdm_b_slv_sclk";
  1478. function = "tdm_b";
  1479. bias-disable;
  1480. };
  1481. };
  1482.  
  1483. tdm-c-din0-a {
  1484. phandle = < 0xbe >;
  1485.  
  1486. mux {
  1487. groups = "tdm_c_din0_a";
  1488. function = "tdm_c";
  1489. bias-disable;
  1490. };
  1491. };
  1492.  
  1493. tdm-c-din0-z {
  1494. phandle = < 0xbf >;
  1495.  
  1496. mux {
  1497. groups = "tdm_c_din0_z";
  1498. function = "tdm_c";
  1499. bias-disable;
  1500. };
  1501. };
  1502.  
  1503. tdm-c-din1-a {
  1504. phandle = < 0xc0 >;
  1505.  
  1506. mux {
  1507. groups = "tdm_c_din1_a";
  1508. function = "tdm_c";
  1509. bias-disable;
  1510. };
  1511. };
  1512.  
  1513. tdm-c-din1-z {
  1514. phandle = < 0xc1 >;
  1515.  
  1516. mux {
  1517. groups = "tdm_c_din1_z";
  1518. function = "tdm_c";
  1519. bias-disable;
  1520. };
  1521. };
  1522.  
  1523. tdm-c-din2-a {
  1524. phandle = < 0xc2 >;
  1525.  
  1526. mux {
  1527. groups = "tdm_c_din2_a";
  1528. function = "tdm_c";
  1529. bias-disable;
  1530. };
  1531. };
  1532.  
  1533. eth-leds {
  1534. phandle = < 0xc3 >;
  1535.  
  1536. mux {
  1537. groups = "eth_link_led\0eth_act_led";
  1538. function = "eth";
  1539. bias-disable;
  1540. };
  1541. };
  1542.  
  1543. eth {
  1544. phandle = < 0x13 >;
  1545.  
  1546. mux {
  1547. groups = "eth_mdio\0eth_mdc\0eth_rgmii_rx_clk\0eth_rx_dv\0eth_rxd0\0eth_rxd1\0eth_txen\0eth_txd0\0eth_txd1";
  1548. function = "eth";
  1549. drive-strength-microamp = < 0xfa0 >;
  1550. bias-disable;
  1551. };
  1552. };
  1553.  
  1554. eth-rgmii {
  1555. phandle = < 0x14 >;
  1556.  
  1557. mux {
  1558. groups = "eth_rxd2_rgmii\0eth_rxd3_rgmii\0eth_rgmii_tx_clk\0eth_txd2_rgmii\0eth_txd3_rgmii";
  1559. function = "eth";
  1560. drive-strength-microamp = < 0xfa0 >;
  1561. bias-disable;
  1562. };
  1563. };
  1564.  
  1565. tdm-c-din2-z {
  1566. phandle = < 0xc4 >;
  1567.  
  1568. mux {
  1569. groups = "tdm_c_din2_z";
  1570. function = "tdm_c";
  1571. bias-disable;
  1572. };
  1573. };
  1574.  
  1575. tdm-c-din3-a {
  1576. phandle = < 0xc5 >;
  1577.  
  1578. mux {
  1579. groups = "tdm_c_din3_a";
  1580. function = "tdm_c";
  1581. bias-disable;
  1582. };
  1583. };
  1584.  
  1585. tdm-c-din3-z {
  1586. phandle = < 0xc6 >;
  1587.  
  1588. mux {
  1589. groups = "tdm_c_din3_z";
  1590. function = "tdm_c";
  1591. bias-disable;
  1592. };
  1593. };
  1594.  
  1595. tdm-c-dout0-a {
  1596. phandle = < 0xc7 >;
  1597.  
  1598. mux {
  1599. groups = "tdm_c_dout0_a";
  1600. function = "tdm_c";
  1601. bias-disable;
  1602. drive-strength-microamp = < 0xbb8 >;
  1603. };
  1604. };
  1605.  
  1606. tdm-c-dout0-z {
  1607. phandle = < 0xc8 >;
  1608.  
  1609. mux {
  1610. groups = "tdm_c_dout0_z";
  1611. function = "tdm_c";
  1612. bias-disable;
  1613. drive-strength-microamp = < 0xbb8 >;
  1614. };
  1615. };
  1616.  
  1617. tdm-c-dout1-a {
  1618. phandle = < 0xc9 >;
  1619.  
  1620. mux {
  1621. groups = "tdm_c_dout1_a";
  1622. function = "tdm_c";
  1623. bias-disable;
  1624. drive-strength-microamp = < 0xbb8 >;
  1625. };
  1626. };
  1627.  
  1628. tdm-c-dout1-z {
  1629. phandle = < 0xca >;
  1630.  
  1631. mux {
  1632. groups = "tdm_c_dout1_z";
  1633. function = "tdm_c";
  1634. bias-disable;
  1635. drive-strength-microamp = < 0xbb8 >;
  1636. };
  1637. };
  1638.  
  1639. tdm-c-dout2-a {
  1640. phandle = < 0xcb >;
  1641.  
  1642. mux {
  1643. groups = "tdm_c_dout2_a";
  1644. function = "tdm_c";
  1645. bias-disable;
  1646. drive-strength-microamp = < 0xbb8 >;
  1647. };
  1648. };
  1649.  
  1650. tdm-c-dout2-z {
  1651. phandle = < 0xcc >;
  1652.  
  1653. mux {
  1654. groups = "tdm_c_dout2_z";
  1655. function = "tdm_c";
  1656. bias-disable;
  1657. drive-strength-microamp = < 0xbb8 >;
  1658. };
  1659. };
  1660.  
  1661. tdm-c-dout3-a {
  1662. phandle = < 0xcd >;
  1663.  
  1664. mux {
  1665. groups = "tdm_c_dout3_a";
  1666. function = "tdm_c";
  1667. bias-disable;
  1668. drive-strength-microamp = < 0xbb8 >;
  1669. };
  1670. };
  1671.  
  1672. tdm-c-dout3-z {
  1673. phandle = < 0xce >;
  1674.  
  1675. mux {
  1676. groups = "tdm_c_dout3_z";
  1677. function = "tdm_c";
  1678. bias-disable;
  1679. drive-strength-microamp = < 0xbb8 >;
  1680. };
  1681. };
  1682.  
  1683. tdm-c-fs-a {
  1684. phandle = < 0xcf >;
  1685.  
  1686. mux {
  1687. groups = "tdm_c_fs_a";
  1688. function = "tdm_c";
  1689. bias-disable;
  1690. drive-strength-microamp = < 0xbb8 >;
  1691. };
  1692. };
  1693.  
  1694. tdm-c-fs-z {
  1695. phandle = < 0xd0 >;
  1696.  
  1697. mux {
  1698. groups = "tdm_c_fs_z";
  1699. function = "tdm_c";
  1700. bias-disable;
  1701. drive-strength-microamp = < 0xbb8 >;
  1702. };
  1703. };
  1704.  
  1705. tdm-c-sclk-a {
  1706. phandle = < 0xd1 >;
  1707.  
  1708. mux {
  1709. groups = "tdm_c_sclk_a";
  1710. function = "tdm_c";
  1711. bias-disable;
  1712. drive-strength-microamp = < 0xbb8 >;
  1713. };
  1714. };
  1715.  
  1716. tdm-c-sclk-z {
  1717. phandle = < 0xd2 >;
  1718.  
  1719. mux {
  1720. groups = "tdm_c_sclk_z";
  1721. function = "tdm_c";
  1722. bias-disable;
  1723. drive-strength-microamp = < 0xbb8 >;
  1724. };
  1725. };
  1726.  
  1727. tdm-c-slv-fs-a {
  1728. phandle = < 0xd3 >;
  1729.  
  1730. mux {
  1731. groups = "tdm_c_slv_fs_a";
  1732. function = "tdm_c";
  1733. bias-disable;
  1734. };
  1735. };
  1736.  
  1737. tdm-c-slv-fs-z {
  1738. phandle = < 0xd4 >;
  1739.  
  1740. mux {
  1741. groups = "tdm_c_slv_fs_z";
  1742. function = "tdm_c";
  1743. bias-disable;
  1744. };
  1745. };
  1746.  
  1747. tdm-c-slv-sclk-a {
  1748. phandle = < 0xd5 >;
  1749.  
  1750. mux {
  1751. groups = "tdm_c_slv_sclk_a";
  1752. function = "tdm_c";
  1753. bias-disable;
  1754. };
  1755. };
  1756.  
  1757. tdm-c-slv-sclk-z {
  1758. phandle = < 0xd6 >;
  1759.  
  1760. mux {
  1761. groups = "tdm_c_slv_sclk_z";
  1762. function = "tdm_c";
  1763. bias-disable;
  1764. };
  1765. };
  1766.  
  1767. uart-a {
  1768. phandle = < 0x30 >;
  1769.  
  1770. mux {
  1771. groups = "uart_a_tx\0uart_a_rx";
  1772. function = "uart_a";
  1773. bias-disable;
  1774. };
  1775. };
  1776.  
  1777. uart-a-cts-rts {
  1778. phandle = < 0xd7 >;
  1779.  
  1780. mux {
  1781. groups = "uart_a_cts\0uart_a_rts";
  1782. function = "uart_a";
  1783. bias-disable;
  1784. };
  1785. };
  1786.  
  1787. uart-b {
  1788. phandle = < 0xd8 >;
  1789.  
  1790. mux {
  1791. groups = "uart_b_tx\0uart_b_rx";
  1792. function = "uart_b";
  1793. bias-disable;
  1794. };
  1795. };
  1796.  
  1797. uart-c {
  1798. phandle = < 0xd9 >;
  1799.  
  1800. mux {
  1801. groups = "uart_c_tx\0uart_c_rx";
  1802. function = "uart_c";
  1803. bias-disable;
  1804. };
  1805. };
  1806.  
  1807. uart-c-cts-rts {
  1808. phandle = < 0xda >;
  1809.  
  1810. mux {
  1811. groups = "uart_c_cts\0uart_c_rts";
  1812. function = "uart_c";
  1813. bias-disable;
  1814. };
  1815. };
  1816.  
  1817. i2c2-master-pins1 {
  1818. phandle = < 0x2f >;
  1819.  
  1820. mux {
  1821. groups = "i2c2_sda_x\0i2c2_sck_x";
  1822. function = "i2c2";
  1823. bias-pull-up;
  1824. drive-strength-microamp = < 0xbb8 >;
  1825. };
  1826. };
  1827.  
  1828. i2c3-master-pins2 {
  1829. phandle = < 0x2e >;
  1830.  
  1831. mux {
  1832. groups = "i2c3_sda_a\0i2c3_sck_a";
  1833. function = "i2c3";
  1834. bias-pull-up;
  1835. drive-strength-microamp = < 0xbb8 >;
  1836. };
  1837. };
  1838. };
  1839. };
  1840.  
  1841. temperature-sensor@34800 {
  1842. compatible = "amlogic,g12a-cpu-thermal\0amlogic,g12a-thermal";
  1843. reg = < 0x00 0x34800 0x00 0x50 >;
  1844. interrupts = < 0x00 0x23 0x01 >;
  1845. clocks = < 0x02 0xd4 >;
  1846. #thermal-sensor-cells = < 0x00 >;
  1847. amlogic,ao-secure = < 0x1c >;
  1848. phandle = < 0x08 >;
  1849. };
  1850.  
  1851. temperature-sensor@34c00 {
  1852. compatible = "amlogic,g12a-ddr-thermal\0amlogic,g12a-thermal";
  1853. reg = < 0x00 0x34c00 0x00 0x50 >;
  1854. interrupts = < 0x00 0x24 0x01 >;
  1855. clocks = < 0x02 0xd4 >;
  1856. #thermal-sensor-cells = < 0x00 >;
  1857. amlogic,ao-secure = < 0x1c >;
  1858. phandle = < 0x10 >;
  1859. };
  1860.  
  1861. phy@36000 {
  1862. compatible = "amlogic,g12a-usb2-phy";
  1863. reg = < 0x00 0x36000 0x00 0x2000 >;
  1864. clocks = < 0x1d >;
  1865. clock-names = "xtal";
  1866. resets = < 0x05 0x30 >;
  1867. reset-names = "phy";
  1868. #phy-cells = < 0x00 >;
  1869. phy-supply = < 0x18 >;
  1870. phandle = < 0x3c >;
  1871. };
  1872.  
  1873. bus@38000 {
  1874. compatible = "simple-bus";
  1875. reg = < 0x00 0x38000 0x00 0x400 >;
  1876. #address-cells = < 0x02 >;
  1877. #size-cells = < 0x02 >;
  1878. ranges = < 0x00 0x00 0x00 0x38000 0x00 0x400 >;
  1879. phandle = < 0xdb >;
  1880.  
  1881. video-lut@48 {
  1882. compatible = "amlogic,canvas";
  1883. reg = < 0x00 0x48 0x00 0x14 >;
  1884. phandle = < 0x29 >;
  1885. };
  1886. };
  1887.  
  1888. phy@3a000 {
  1889. compatible = "amlogic,g12a-usb2-phy";
  1890. reg = < 0x00 0x3a000 0x00 0x2000 >;
  1891. clocks = < 0x1d >;
  1892. clock-names = "xtal";
  1893. resets = < 0x05 0x31 >;
  1894. reset-names = "phy";
  1895. #phy-cells = < 0x00 >;
  1896. phy-supply = < 0x1e >;
  1897. phandle = < 0x3d >;
  1898. };
  1899.  
  1900. bus@3c000 {
  1901. compatible = "simple-bus";
  1902. reg = < 0x00 0x3c000 0x00 0x1400 >;
  1903. #address-cells = < 0x02 >;
  1904. #size-cells = < 0x02 >;
  1905. ranges = < 0x00 0x00 0x00 0x3c000 0x00 0x1400 >;
  1906. phandle = < 0xdc >;
  1907.  
  1908. system-controller@0 {
  1909. compatible = "amlogic,meson-gx-hhi-sysctrl\0simple-mfd\0syscon";
  1910. reg = < 0x00 0x00 0x00 0x400 >;
  1911. phandle = < 0xdd >;
  1912.  
  1913. clock-controller {
  1914. compatible = "amlogic,sm1-clkc";
  1915. #clock-cells = < 0x01 >;
  1916. clocks = < 0x1d >;
  1917. clock-names = "xtal";
  1918. phandle = < 0x02 >;
  1919. };
  1920.  
  1921. power-controller {
  1922. compatible = "amlogic,meson-sm1-pwrc";
  1923. #power-domain-cells = < 0x01 >;
  1924. amlogic,ao-sysctrl = < 0x1f >;
  1925. resets = < 0x05 0x05 0x05 0x0a 0x05 0x0d 0x05 0x25 0x05 0x85 0x05 0x86 0x05 0x87 0x05 0x89 0x05 0x8c 0x05 0x8d 0x05 0xe7 >;
  1926. reset-names = "viu\0venc\0vcbus\0bt656\0rdma\0venci\0vencp\0vdac\0vdi6\0vencl\0vid_lock";
  1927. clocks = < 0x02 0x74 0x02 0x7c >;
  1928. clock-names = "vpu\0vapb";
  1929. assigned-clocks = < 0x02 0x6e 0x02 0x70 0x02 0x74 0x02 0x75 0x02 0x77 0x02 0x7b >;
  1930. assigned-clock-parents = < 0x02 0x03 0x00 0x02 0x70 0x02 0x04 0x00 0x02 0x77 >;
  1931. assigned-clock-rates = < 0x00 0x27bc86aa 0x00 0x00 0xee6b280 0x00 >;
  1932. phandle = < 0x03 >;
  1933. };
  1934. };
  1935. };
  1936.  
  1937. phy@46000 {
  1938. compatible = "amlogic,g12a-usb3-pcie-phy";
  1939. reg = < 0x00 0x46000 0x00 0x2000 >;
  1940. clocks = < 0x02 0xc9 >;
  1941. clock-names = "ref_clk";
  1942. resets = < 0x05 0x0e >;
  1943. reset-names = "phy";
  1944. assigned-clocks = < 0x02 0xc9 >;
  1945. assigned-clock-rates = < 0x5f5e100 >;
  1946. #phy-cells = < 0x01 >;
  1947. phandle = < 0x06 >;
  1948. };
  1949.  
  1950. mdio-multiplexer@4c000 {
  1951. compatible = "amlogic,g12a-mdio-mux";
  1952. reg = < 0x00 0x4c000 0x00 0xa4 >;
  1953. clocks = < 0x02 0x13 0x1d 0x02 0xb1 >;
  1954. clock-names = "pclk\0clkin0\0clkin1";
  1955. mdio-parent-bus = < 0x20 >;
  1956. #address-cells = < 0x01 >;
  1957. #size-cells = < 0x00 >;
  1958. phandle = < 0xde >;
  1959.  
  1960. mdio@0 {
  1961. reg = < 0x00 >;
  1962. #address-cells = < 0x01 >;
  1963. #size-cells = < 0x00 >;
  1964. phandle = < 0xdf >;
  1965.  
  1966. ethernet-phy@0 {
  1967. reg = < 0x00 >;
  1968. max-speed = < 0x3e8 >;
  1969. reset-assert-us = < 0x2710 >;
  1970. reset-deassert-us = < 0x7530 >;
  1971. reset-gpios = < 0x07 0x0f 0x07 >;
  1972. interrupt-parent = < 0x21 >;
  1973. interrupts = < 0x1a 0x08 >;
  1974. phandle = < 0x15 >;
  1975. };
  1976. };
  1977.  
  1978. mdio@1 {
  1979. reg = < 0x01 >;
  1980. #address-cells = < 0x01 >;
  1981. #size-cells = < 0x00 >;
  1982. phandle = < 0xe0 >;
  1983.  
  1984. ethernet_phy@8 {
  1985. compatible = "ethernet-phy-id0180.3301\0ethernet-phy-ieee802.3-c22";
  1986. interrupts = < 0x00 0x09 0x04 >;
  1987. reg = < 0x08 >;
  1988. max-speed = < 0x64 >;
  1989. phandle = < 0xe1 >;
  1990. };
  1991. };
  1992. };
  1993.  
  1994. bus@60000 {
  1995. compatible = "simple-bus";
  1996. reg = < 0x00 0x60000 0x00 0x1000 >;
  1997. #address-cells = < 0x02 >;
  1998. #size-cells = < 0x02 >;
  1999. ranges = < 0x00 0x00 0x00 0x60000 0x00 0x1000 >;
  2000. phandle = < 0xe2 >;
  2001.  
  2002. clock-controller@0 {
  2003. status = "okay";
  2004. compatible = "amlogic,sm1-audio-clkc";
  2005. reg = < 0x00 0x00 0x00 0xb4 >;
  2006. #clock-cells = < 0x01 >;
  2007. #reset-cells = < 0x01 >;
  2008. clocks = < 0x02 0x25 0x02 0x0b 0x02 0x0c 0x02 0x0d 0x02 0x0e 0x02 0x4a 0x02 0x03 0x02 0x04 0x02 0x05 >;
  2009. clock-names = "pclk\0mst_in0\0mst_in1\0mst_in2\0mst_in3\0mst_in4\0mst_in5\0mst_in6\0mst_in7";
  2010. resets = < 0x05 0x41 >;
  2011. phandle = < 0x22 >;
  2012. };
  2013.  
  2014. audio-controller@100 {
  2015. compatible = "amlogic,sm1-toddr\0amlogic,axg-toddr";
  2016. reg = < 0x00 0x100 0x00 0x2c >;
  2017. #sound-dai-cells = < 0x00 >;
  2018. sound-name-prefix = "TODDR_A";
  2019. interrupts = < 0x00 0x94 0x01 >;
  2020. clocks = < 0x22 0x29 >;
  2021. resets = < 0x23 0x00 0x22 0x06 >;
  2022. reset-names = "arb\0rst";
  2023. amlogic,fifo-depth = < 0x2000 >;
  2024. status = "disabled";
  2025. phandle = < 0xe3 >;
  2026. };
  2027.  
  2028. audio-controller@140 {
  2029. compatible = "amlogic,sm1-toddr\0amlogic,axg-toddr";
  2030. reg = < 0x00 0x140 0x00 0x2c >;
  2031. #sound-dai-cells = < 0x00 >;
  2032. sound-name-prefix = "TODDR_B";
  2033. interrupts = < 0x00 0x95 0x01 >;
  2034. clocks = < 0x22 0x2a >;
  2035. resets = < 0x23 0x01 0x22 0x07 >;
  2036. reset-names = "arb\0rst";
  2037. amlogic,fifo-depth = < 0x100 >;
  2038. status = "disabled";
  2039. phandle = < 0xe4 >;
  2040. };
  2041.  
  2042. audio-controller@180 {
  2043. compatible = "amlogic,sm1-toddr\0amlogic,axg-toddr";
  2044. reg = < 0x00 0x180 0x00 0x2c >;
  2045. #sound-dai-cells = < 0x00 >;
  2046. sound-name-prefix = "TODDR_C";
  2047. interrupts = < 0x00 0x96 0x01 >;
  2048. clocks = < 0x22 0x2b >;
  2049. resets = < 0x23 0x02 0x22 0x08 >;
  2050. reset-names = "arb\0rst";
  2051. amlogic,fifo-depth = < 0x100 >;
  2052. status = "disabled";
  2053. phandle = < 0xe5 >;
  2054. };
  2055.  
  2056. audio-controller@1c0 {
  2057. compatible = "amlogic,sm1-frddr\0amlogic,axg-frddr";
  2058. reg = < 0x00 0x1c0 0x00 0x2c >;
  2059. #sound-dai-cells = < 0x00 >;
  2060. sound-name-prefix = "FRDDR_A";
  2061. interrupts = < 0x00 0x98 0x01 >;
  2062. clocks = < 0x22 0x26 >;
  2063. resets = < 0x23 0x03 0x22 0x09 >;
  2064. reset-names = "arb\0rst";
  2065. amlogic,fifo-depth = < 0x200 >;
  2066. status = "okay";
  2067. phandle = < 0x49 >;
  2068. };
  2069.  
  2070. audio-controller@200 {
  2071. compatible = "amlogic,sm1-frddr\0amlogic,axg-frddr";
  2072. reg = < 0x00 0x200 0x00 0x2c >;
  2073. #sound-dai-cells = < 0x00 >;
  2074. sound-name-prefix = "FRDDR_B";
  2075. interrupts = < 0x00 0x99 0x01 >;
  2076. clocks = < 0x22 0x27 >;
  2077. resets = < 0x23 0x04 0x22 0x0a >;
  2078. reset-names = "arb\0rst";
  2079. amlogic,fifo-depth = < 0x100 >;
  2080. status = "okay";
  2081. phandle = < 0x4a >;
  2082. };
  2083.  
  2084. audio-controller@240 {
  2085. compatible = "amlogic,sm1-frddr\0amlogic,axg-frddr";
  2086. reg = < 0x00 0x240 0x00 0x2c >;
  2087. #sound-dai-cells = < 0x00 >;
  2088. sound-name-prefix = "FRDDR_C";
  2089. interrupts = < 0x00 0x9a 0x01 >;
  2090. clocks = < 0x22 0x28 >;
  2091. resets = < 0x23 0x05 0x22 0x0b >;
  2092. reset-names = "arb\0rst";
  2093. amlogic,fifo-depth = < 0x100 >;
  2094. status = "okay";
  2095. phandle = < 0x4b >;
  2096. };
  2097.  
  2098. reset-controller@280 {
  2099. status = "okay";
  2100. compatible = "amlogic,meson-sm1-audio-arb";
  2101. reg = < 0x00 0x280 0x00 0x04 >;
  2102. #reset-cells = < 0x01 >;
  2103. clocks = < 0x22 0x1d >;
  2104. phandle = < 0x23 >;
  2105. };
  2106.  
  2107. audio-controller@300 {
  2108. compatible = "amlogic,sm1-tdmin\0amlogic,axg-tdmin";
  2109. reg = < 0x00 0x300 0x00 0x40 >;
  2110. sound-name-prefix = "TDMIN_A";
  2111. resets = < 0x22 0x01 >;
  2112. clocks = < 0x22 0x1f 0x22 0x7b 0x22 0x74 0x22 0x82 0x22 0x82 >;
  2113. clock-names = "pclk\0sclk\0sclk_sel\0lrclk\0lrclk_sel";
  2114. status = "disabled";
  2115. phandle = < 0xe6 >;
  2116. };
  2117.  
  2118. audio-controller@340 {
  2119. compatible = "amlogic,sm1-tdmin\0amlogic,axg-tdmin";
  2120. reg = < 0x00 0x340 0x00 0x40 >;
  2121. sound-name-prefix = "TDMIN_B";
  2122. resets = < 0x22 0x02 >;
  2123. clocks = < 0x22 0x20 0x22 0x7c 0x22 0x75 0x22 0x83 0x22 0x83 >;
  2124. clock-names = "pclk\0sclk\0sclk_sel\0lrclk\0lrclk_sel";
  2125. status = "disabled";
  2126. phandle = < 0xe7 >;
  2127. };
  2128.  
  2129. audio-controller@380 {
  2130. compatible = "amlogic,sm1-tdmin\0amlogic,axg-tdmin";
  2131. reg = < 0x00 0x380 0x00 0x40 >;
  2132. sound-name-prefix = "TDMIN_C";
  2133. resets = < 0x22 0x03 >;
  2134. clocks = < 0x22 0x21 0x22 0x7d 0x22 0x76 0x22 0x84 0x22 0x84 >;
  2135. clock-names = "pclk\0sclk\0sclk_sel\0lrclk\0lrclk_sel";
  2136. status = "disabled";
  2137. phandle = < 0xe8 >;
  2138. };
  2139.  
  2140. audio-controller@3c0 {
  2141. compatible = "amlogic,sm1-tdmin\0amlogic,axg-tdmin";
  2142. reg = < 0x00 0x3c0 0x00 0x40 >;
  2143. sound-name-prefix = "TDMIN_LB";
  2144. resets = < 0x22 0x04 >;
  2145. clocks = < 0x22 0x22 0x22 0x7e 0x22 0x77 0x22 0x85 0x22 0x85 >;
  2146. clock-names = "pclk\0sclk\0sclk_sel\0lrclk\0lrclk_sel";
  2147. status = "disabled";
  2148. phandle = < 0xe9 >;
  2149. };
  2150.  
  2151. audio-controller@500 {
  2152. compatible = "amlogic,sm1-tdmout";
  2153. reg = < 0x00 0x500 0x00 0x40 >;
  2154. sound-name-prefix = "TDMOUT_A";
  2155. resets = < 0x22 0x0c >;
  2156. clocks = < 0x22 0x23 0x22 0x7f 0x22 0x78 0x22 0x86 0x22 0x86 >;
  2157. clock-names = "pclk\0sclk\0sclk_sel\0lrclk\0lrclk_sel";
  2158. status = "disabled";
  2159. phandle = < 0xea >;
  2160. };
  2161.  
  2162. audio-controller@540 {
  2163. compatible = "amlogic,sm1-tdmout";
  2164. reg = < 0x00 0x540 0x00 0x40 >;
  2165. sound-name-prefix = "TDMOUT_B";
  2166. resets = < 0x22 0x0d >;
  2167. clocks = < 0x22 0x24 0x22 0x80 0x22 0x79 0x22 0x87 0x22 0x87 >;
  2168. clock-names = "pclk\0sclk\0sclk_sel\0lrclk\0lrclk_sel";
  2169. status = "okay";
  2170. phandle = < 0x48 >;
  2171. };
  2172.  
  2173. audio-controller@580 {
  2174. compatible = "amlogic,sm1-tdmout";
  2175. reg = < 0x00 0x580 0x00 0x40 >;
  2176. sound-name-prefix = "TDMOUT_C";
  2177. resets = < 0x22 0x0e >;
  2178. clocks = < 0x22 0x25 0x22 0x81 0x22 0x7a 0x22 0x88 0x22 0x88 >;
  2179. clock-names = "pclk\0sclk\0sclk_sel\0lrclk\0lrclk_sel";
  2180. status = "disabled";
  2181. phandle = < 0xeb >;
  2182. };
  2183.  
  2184. audio-controller@744 {
  2185. compatible = "amlogic,sm1-tohdmitx\0amlogic,g12a-tohdmitx";
  2186. reg = < 0x00 0x744 0x00 0x04 >;
  2187. #sound-dai-cells = < 0x01 >;
  2188. sound-name-prefix = "TOHDMITX";
  2189. resets = < 0x22 0x18 >;
  2190. status = "okay";
  2191. phandle = < 0x4d >;
  2192. };
  2193.  
  2194. audio-controller@840 {
  2195. compatible = "amlogic,sm1-toddr\0amlogic,axg-toddr";
  2196. reg = < 0x00 0x840 0x00 0x2c >;
  2197. #sound-dai-cells = < 0x00 >;
  2198. sound-name-prefix = "TODDR_D";
  2199. interrupts = < 0x00 0x31 0x01 >;
  2200. clocks = < 0x22 0xab >;
  2201. resets = < 0x23 0x06 0x22 0x21 >;
  2202. reset-names = "arb\0rst";
  2203. amlogic,fifo-depth = < 0x100 >;
  2204. status = "disabled";
  2205. phandle = < 0xec >;
  2206. };
  2207.  
  2208. audio-controller@880 {
  2209. compatible = "amlogic,sm1-frddr\0amlogic,axg-frddr";
  2210. reg = < 0x00 0x880 0x00 0x2c >;
  2211. #sound-dai-cells = < 0x00 >;
  2212. sound-name-prefix = "FRDDR_D";
  2213. interrupts = < 0x00 0x32 0x01 >;
  2214. clocks = < 0x22 0xaa >;
  2215. resets = < 0x23 0x07 0x22 0x20 >;
  2216. reset-names = "arb\0rst";
  2217. amlogic,fifo-depth = < 0x100 >;
  2218. status = "disabled";
  2219. phandle = < 0xed >;
  2220. };
  2221. };
  2222.  
  2223. audio-controller@61000 {
  2224. compatible = "amlogic,sm1-pdm\0amlogic,axg-pdm";
  2225. reg = < 0x00 0x61000 0x00 0x34 >;
  2226. #sound-dai-cells = < 0x00 >;
  2227. sound-name-prefix = "PDM";
  2228. clocks = < 0x22 0x1e 0x22 0x39 0x22 0x3a >;
  2229. clock-names = "pclk\0dclk\0sysclk";
  2230. resets = < 0x22 0x00 >;
  2231. status = "disabled";
  2232. phandle = < 0xee >;
  2233. };
  2234. };
  2235.  
  2236. bus@ff800000 {
  2237. compatible = "simple-bus";
  2238. reg = < 0x00 0xff800000 0x00 0x100000 >;
  2239. #address-cells = < 0x02 >;
  2240. #size-cells = < 0x02 >;
  2241. ranges = < 0x00 0x00 0x00 0xff800000 0x00 0x100000 >;
  2242. phandle = < 0xef >;
  2243.  
  2244. sys-ctrl@0 {
  2245. compatible = "amlogic,meson-gx-ao-sysctrl\0simple-mfd\0syscon";
  2246. reg = < 0x00 0x00 0x00 0x100 >;
  2247. #address-cells = < 0x02 >;
  2248. #size-cells = < 0x02 >;
  2249. ranges = < 0x00 0x00 0x00 0x00 0x00 0x100 >;
  2250. phandle = < 0x1f >;
  2251.  
  2252. clock-controller {
  2253. compatible = "amlogic,meson-g12a-aoclkc";
  2254. #clock-cells = < 0x01 >;
  2255. #reset-cells = < 0x01 >;
  2256. clocks = < 0x1d 0x02 0x0a >;
  2257. clock-names = "xtal\0mpeg-clk";
  2258. phandle = < 0x25 >;
  2259. };
  2260.  
  2261. pinctrl@14 {
  2262. compatible = "amlogic,meson-g12a-aobus-pinctrl";
  2263. #address-cells = < 0x02 >;
  2264. #size-cells = < 0x02 >;
  2265. ranges;
  2266. phandle = < 0x24 >;
  2267.  
  2268. bank@14 {
  2269. reg = < 0x00 0x14 0x00 0x08 0x00 0x1c 0x00 0x08 0x00 0x24 0x00 0x14 >;
  2270. reg-names = "mux\0ds\0gpio";
  2271. gpio-controller;
  2272. #gpio-cells = < 0x02 >;
  2273. gpio-ranges = < 0x24 0x00 0x00 0x0f >;
  2274. gpio-line-names = "\0\0\0\0PIN_47\0\0\0PIN_45\0PIN_46\0PIN_44\0PIN_42\0\0\0\0";
  2275. phandle = < 0x43 >;
  2276. };
  2277.  
  2278. i2c_ao_sck_pins {
  2279. phandle = < 0xf0 >;
  2280.  
  2281. mux {
  2282. groups = "i2c_ao_sck";
  2283. function = "i2c_ao";
  2284. bias-disable;
  2285. drive-strength-microamp = < 0xbb8 >;
  2286. };
  2287. };
  2288.  
  2289. i2c_ao_sda {
  2290. phandle = < 0xf1 >;
  2291.  
  2292. mux {
  2293. groups = "i2c_ao_sda";
  2294. function = "i2c_ao";
  2295. bias-disable;
  2296. drive-strength-microamp = < 0xbb8 >;
  2297. };
  2298. };
  2299.  
  2300. i2c_ao_sck_e {
  2301. phandle = < 0xf2 >;
  2302.  
  2303. mux {
  2304. groups = "i2c_ao_sck_e";
  2305. function = "i2c_ao";
  2306. bias-disable;
  2307. drive-strength-microamp = < 0xbb8 >;
  2308. };
  2309. };
  2310.  
  2311. i2c_ao_sda_e {
  2312. phandle = < 0xf3 >;
  2313.  
  2314. mux {
  2315. groups = "i2c_ao_sda_e";
  2316. function = "i2c_ao";
  2317. bias-disable;
  2318. drive-strength-microamp = < 0xbb8 >;
  2319. };
  2320. };
  2321.  
  2322. mclk0-ao {
  2323. phandle = < 0xf4 >;
  2324.  
  2325. mux {
  2326. groups = "mclk0_ao";
  2327. function = "mclk0_ao";
  2328. bias-disable;
  2329. drive-strength-microamp = < 0xbb8 >;
  2330. };
  2331. };
  2332.  
  2333. tdm-ao-b-din0 {
  2334. phandle = < 0xf5 >;
  2335.  
  2336. mux {
  2337. groups = "tdm_ao_b_din0";
  2338. function = "tdm_ao_b";
  2339. bias-disable;
  2340. };
  2341. };
  2342.  
  2343. spdif-ao-out {
  2344. phandle = < 0xf6 >;
  2345.  
  2346. mux {
  2347. groups = "spdif_ao_out";
  2348. function = "spdif_ao_out";
  2349. drive-strength-microamp = < 0x1f4 >;
  2350. bias-disable;
  2351. };
  2352. };
  2353.  
  2354. tdm-ao-b-din1 {
  2355. phandle = < 0xf7 >;
  2356.  
  2357. mux {
  2358. groups = "tdm_ao_b_din1";
  2359. function = "tdm_ao_b";
  2360. bias-disable;
  2361. };
  2362. };
  2363.  
  2364. tdm-ao-b-din2 {
  2365. phandle = < 0xf8 >;
  2366.  
  2367. mux {
  2368. groups = "tdm_ao_b_din2";
  2369. function = "tdm_ao_b";
  2370. bias-disable;
  2371. };
  2372. };
  2373.  
  2374. tdm-ao-b-dout0 {
  2375. phandle = < 0xf9 >;
  2376.  
  2377. mux {
  2378. groups = "tdm_ao_b_dout0";
  2379. function = "tdm_ao_b";
  2380. bias-disable;
  2381. drive-strength-microamp = < 0xbb8 >;
  2382. };
  2383. };
  2384.  
  2385. tdm-ao-b-dout1 {
  2386. phandle = < 0xfa >;
  2387.  
  2388. mux {
  2389. groups = "tdm_ao_b_dout1";
  2390. function = "tdm_ao_b";
  2391. bias-disable;
  2392. drive-strength-microamp = < 0xbb8 >;
  2393. };
  2394. };
  2395.  
  2396. tdm-ao-b-dout2 {
  2397. phandle = < 0xfb >;
  2398.  
  2399. mux {
  2400. groups = "tdm_ao_b_dout2";
  2401. function = "tdm_ao_b";
  2402. bias-disable;
  2403. drive-strength-microamp = < 0xbb8 >;
  2404. };
  2405. };
  2406.  
  2407. tdm-ao-b-fs {
  2408. phandle = < 0xfc >;
  2409.  
  2410. mux {
  2411. groups = "tdm_ao_b_fs";
  2412. function = "tdm_ao_b";
  2413. bias-disable;
  2414. drive-strength-microamp = < 0xbb8 >;
  2415. };
  2416. };
  2417.  
  2418. tdm-ao-b-sclk {
  2419. phandle = < 0xfd >;
  2420.  
  2421. mux {
  2422. groups = "tdm_ao_b_sclk";
  2423. function = "tdm_ao_b";
  2424. bias-disable;
  2425. drive-strength-microamp = < 0xbb8 >;
  2426. };
  2427. };
  2428.  
  2429. tdm-ao-b-slv-fs {
  2430. phandle = < 0xfe >;
  2431.  
  2432. mux {
  2433. groups = "tdm_ao_b_slv_fs";
  2434. function = "tdm_ao_b";
  2435. bias-disable;
  2436. };
  2437. };
  2438.  
  2439. tdm-ao-b-slv-sclk {
  2440. phandle = < 0xff >;
  2441.  
  2442. mux {
  2443. groups = "tdm_ao_b_slv_sclk";
  2444. function = "tdm_ao_b";
  2445. bias-disable;
  2446. };
  2447. };
  2448.  
  2449. uart-a-ao {
  2450. phandle = < 0x27 >;
  2451.  
  2452. mux {
  2453. groups = "uart_ao_a_tx\0uart_ao_a_rx";
  2454. function = "uart_ao_a";
  2455. bias-disable;
  2456. };
  2457. };
  2458.  
  2459. uart-ao-a-cts-rts {
  2460. phandle = < 0x100 >;
  2461.  
  2462. mux {
  2463. groups = "uart_ao_a_cts\0uart_ao_a_rts";
  2464. function = "uart_ao_a";
  2465. bias-disable;
  2466. };
  2467. };
  2468.  
  2469. pwm-a-e {
  2470. phandle = < 0x101 >;
  2471.  
  2472. mux {
  2473. groups = "pwm_a_e";
  2474. function = "pwm_a_e";
  2475. bias-disable;
  2476. };
  2477. };
  2478.  
  2479. pwm-ao-a {
  2480. phandle = < 0x102 >;
  2481.  
  2482. mux {
  2483. groups = "pwm_ao_a";
  2484. function = "pwm_ao_a";
  2485. bias-disable;
  2486. };
  2487. };
  2488.  
  2489. pwm-ao-b {
  2490. phandle = < 0x103 >;
  2491.  
  2492. mux {
  2493. groups = "pwm_ao_b";
  2494. function = "pwm_ao_b";
  2495. bias-disable;
  2496. };
  2497. };
  2498.  
  2499. pwm-ao-c-4 {
  2500. phandle = < 0x104 >;
  2501.  
  2502. mux {
  2503. groups = "pwm_ao_c_4";
  2504. function = "pwm_ao_c";
  2505. bias-disable;
  2506. };
  2507. };
  2508.  
  2509. pwm-ao-c-6 {
  2510. phandle = < 0x105 >;
  2511.  
  2512. mux {
  2513. groups = "pwm_ao_c_6";
  2514. function = "pwm_ao_c";
  2515. bias-disable;
  2516. };
  2517. };
  2518.  
  2519. pwm-ao-d-5 {
  2520. phandle = < 0x106 >;
  2521.  
  2522. mux {
  2523. groups = "pwm_ao_d_5";
  2524. function = "pwm_ao_d";
  2525. bias-disable;
  2526. };
  2527. };
  2528.  
  2529. pwm-ao-d-10 {
  2530. phandle = < 0x107 >;
  2531.  
  2532. mux {
  2533. groups = "pwm_ao_d_10";
  2534. function = "pwm_ao_d";
  2535. bias-disable;
  2536. };
  2537. };
  2538.  
  2539. pwm-ao-d-e {
  2540. phandle = < 0x26 >;
  2541.  
  2542. mux {
  2543. groups = "pwm_ao_d_e";
  2544. function = "pwm_ao_d";
  2545. };
  2546. };
  2547.  
  2548. remote-input-ao {
  2549. phandle = < 0x28 >;
  2550.  
  2551. mux {
  2552. groups = "remote_ao_input";
  2553. function = "remote_ao_input";
  2554. bias-disable;
  2555. };
  2556. };
  2557. };
  2558. };
  2559.  
  2560. rtc@0a8 {
  2561. compatible = "amlogic,meson-vrtc";
  2562. reg = < 0x00 0xa8 0x00 0x04 >;
  2563. phandle = < 0x108 >;
  2564. };
  2565.  
  2566. cec@100 {
  2567. compatible = "amlogic,meson-gx-ao-cec";
  2568. reg = < 0x00 0x100 0x00 0x14 >;
  2569. interrupts = < 0x00 0xc7 0x01 >;
  2570. clocks = < 0x25 0x1b >;
  2571. clock-names = "core";
  2572. status = "disabled";
  2573. phandle = < 0x109 >;
  2574. };
  2575.  
  2576. ao-secure@140 {
  2577. compatible = "amlogic,meson-gx-ao-secure\0syscon";
  2578. reg = < 0x00 0x140 0x00 0x140 >;
  2579. amlogic,has-chip-id;
  2580. phandle = < 0x1c >;
  2581. };
  2582.  
  2583. cec@280 {
  2584. compatible = "amlogic,meson-sm1-ao-cec";
  2585. reg = < 0x00 0x280 0x00 0x1c >;
  2586. interrupts = < 0x00 0xcb 0x01 >;
  2587. clocks = < 0x25 0x13 >;
  2588. clock-names = "oscin";
  2589. status = "disabled";
  2590. phandle = < 0x10a >;
  2591. };
  2592.  
  2593. pwm@2000 {
  2594. compatible = "amlogic,meson-g12a-ao-pwm-cd";
  2595. reg = < 0x00 0x2000 0x00 0x20 >;
  2596. #pwm-cells = < 0x03 >;
  2597. status = "okay";
  2598. pinctrl-0 = < 0x26 >;
  2599. pinctrl-names = "default";
  2600. clocks = < 0x1d >;
  2601. clock-names = "clkin1";
  2602. phandle = < 0x46 >;
  2603. };
  2604.  
  2605. serial@3000 {
  2606. compatible = "amlogic,meson-gx-uart\0amlogic,meson-ao-uart";
  2607. reg = < 0x00 0x3000 0x00 0x18 >;
  2608. interrupts = < 0x00 0xc1 0x01 >;
  2609. clocks = < 0x1d 0x25 0x04 0x1d >;
  2610. clock-names = "xtal\0pclk\0baud";
  2611. status = "okay";
  2612. pinctrl-0 = < 0x27 >;
  2613. pinctrl-names = "default";
  2614. phandle = < 0x10b >;
  2615. };
  2616.  
  2617. serial@4000 {
  2618. compatible = "amlogic,meson-gx-uart\0amlogic,meson-ao-uart";
  2619. reg = < 0x00 0x4000 0x00 0x18 >;
  2620. interrupts = < 0x00 0xc5 0x01 >;
  2621. clocks = < 0x1d 0x25 0x06 0x1d >;
  2622. clock-names = "xtal\0pclk\0baud";
  2623. status = "disabled";
  2624. phandle = < 0x10c >;
  2625. };
  2626.  
  2627. i2c@5000 {
  2628. compatible = "amlogic,meson-axg-i2c";
  2629. status = "disabled";
  2630. reg = < 0x00 0x5000 0x00 0x20 >;
  2631. interrupts = < 0x00 0xc3 0x01 >;
  2632. #address-cells = < 0x01 >;
  2633. #size-cells = < 0x00 >;
  2634. clocks = < 0x02 0x18 >;
  2635. phandle = < 0x10d >;
  2636. };
  2637.  
  2638. pwm@7000 {
  2639. compatible = "amlogic,meson-g12a-ao-pwm-ab";
  2640. reg = < 0x00 0x7000 0x00 0x20 >;
  2641. #pwm-cells = < 0x03 >;
  2642. status = "disabled";
  2643. phandle = < 0x10e >;
  2644. };
  2645.  
  2646. ir@8000 {
  2647. compatible = "amlogic,meson-gxbb-ir";
  2648. reg = < 0x00 0x8000 0x00 0x20 >;
  2649. interrupts = < 0x00 0xc4 0x01 >;
  2650. status = "okay";
  2651. pinctrl-0 = < 0x28 >;
  2652. pinctrl-names = "default";
  2653. linux,rc-map-name = "rc-odroid";
  2654. phandle = < 0x10f >;
  2655. };
  2656.  
  2657. adc@9000 {
  2658. compatible = "amlogic,meson-g12a-saradc\0amlogic,meson-saradc";
  2659. reg = < 0x00 0x9000 0x00 0x48 >;
  2660. #io-channel-cells = < 0x01 >;
  2661. interrupts = < 0x00 0xc8 0x01 >;
  2662. clocks = < 0x1d 0x25 0x08 0x25 0x12 0x25 0x10 >;
  2663. clock-names = "clkin\0core\0adc_clk\0adc_sel";
  2664. status = "okay";
  2665. phandle = < 0x110 >;
  2666. };
  2667. };
  2668.  
  2669. video-decoder@ff620000 {
  2670. compatible = "amlogic,sm1-vdec";
  2671. reg = < 0x00 0xff620000 0x00 0x10000 0x00 0xffd0e180 0x00 0xe4 >;
  2672. reg-names = "dos\0esparser";
  2673. interrupts = < 0x00 0x2c 0x01 0x00 0x20 0x01 >;
  2674. interrupt-names = "vdec\0esparser";
  2675. amlogic,ao-sysctrl = < 0x1f >;
  2676. amlogic,canvas = < 0x29 >;
  2677. clocks = < 0x02 0x2e 0x02 0x10 0x02 0xcc 0x02 0xcf 0x02 0xd2 >;
  2678. clock-names = "dos_parser\0dos\0vdec_1\0vdec_hevc\0vdec_hevcf";
  2679. resets = < 0x05 0x28 >;
  2680. reset-names = "esparser";
  2681. phandle = < 0x111 >;
  2682. };
  2683.  
  2684. vpu@ff900000 {
  2685. compatible = "amlogic,meson-g12a-vpu";
  2686. reg = < 0x00 0xff900000 0x00 0x100000 0x00 0xff63c000 0x00 0x1000 >;
  2687. reg-names = "vpu\0hhi";
  2688. interrupts = < 0x00 0x03 0x01 >;
  2689. #address-cells = < 0x01 >;
  2690. #size-cells = < 0x00 >;
  2691. amlogic,canvas = < 0x29 >;
  2692. power-domains = < 0x03 0x00 >;
  2693. phandle = < 0x112 >;
  2694.  
  2695. port@0 {
  2696. reg = < 0x00 >;
  2697. phandle = < 0x113 >;
  2698. };
  2699.  
  2700. port@1 {
  2701. reg = < 0x01 >;
  2702. phandle = < 0x114 >;
  2703.  
  2704. endpoint {
  2705. remote-endpoint = < 0x2a >;
  2706. phandle = < 0x19 >;
  2707. };
  2708. };
  2709. };
  2710.  
  2711. interrupt-controller@ffc01000 {
  2712. compatible = "arm,gic-400";
  2713. reg = < 0x00 0xffc01000 0x00 0x1000 0x00 0xffc02000 0x00 0x2000 0x00 0xffc04000 0x00 0x2000 0x00 0xffc06000 0x00 0x2000 >;
  2714. interrupt-controller;
  2715. interrupts = < 0x01 0x09 0xff04 >;
  2716. #interrupt-cells = < 0x03 >;
  2717. #address-cells = < 0x00 >;
  2718. phandle = < 0x01 >;
  2719. };
  2720.  
  2721. bus@ffd00000 {
  2722. compatible = "simple-bus";
  2723. reg = < 0x00 0xffd00000 0x00 0x100000 >;
  2724. #address-cells = < 0x02 >;
  2725. #size-cells = < 0x02 >;
  2726. ranges = < 0x00 0x00 0x00 0xffd00000 0x00 0x100000 >;
  2727. phandle = < 0x115 >;
  2728.  
  2729. reset-controller@1004 {
  2730. compatible = "amlogic,meson-axg-reset";
  2731. reg = < 0x00 0x1004 0x00 0x9c >;
  2732. #reset-cells = < 0x01 >;
  2733. phandle = < 0x05 >;
  2734. };
  2735.  
  2736. interrupt-controller@f080 {
  2737. compatible = "amlogic,meson-sm1-gpio-intc\0amlogic,meson-gpio-intc";
  2738. reg = < 0x00 0xf080 0x00 0x10 >;
  2739. interrupt-controller;
  2740. #interrupt-cells = < 0x02 >;
  2741. amlogic,channel-interrupts = < 0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47 >;
  2742. phandle = < 0x21 >;
  2743. };
  2744.  
  2745. wdt@f0d0 {
  2746. compatible = "amlogic,meson-gxbb-wdt";
  2747. reg = < 0x00 0xf0d0 0x00 0x10 >;
  2748. clocks = < 0x1d >;
  2749. phandle = < 0x116 >;
  2750. };
  2751.  
  2752. spi@13000 {
  2753. compatible = "amlogic,meson-g12a-spicc";
  2754. reg = < 0x00 0x13000 0x00 0x44 >;
  2755. interrupts = < 0x00 0x51 0x04 >;
  2756. clocks = < 0x02 0x17 0x02 0x102 >;
  2757. clock-names = "core\0pclk";
  2758. #address-cells = < 0x01 >;
  2759. #size-cells = < 0x00 >;
  2760. status = "okay";
  2761. pinctrl-names = "default\0gpio_periphs";
  2762. pinctrl-0 = < 0x2b >;
  2763. pinctrl-1 = < 0x2c >;
  2764. num_chipselect = < 0x01 >;
  2765. cs-gpios = < 0x07 0x4b 0x01 >;
  2766. phandle = < 0x117 >;
  2767.  
  2768. spidev@0 {
  2769. status = "okay";
  2770. compatible = "linux,spidev";
  2771. spi-max-frequency = < 0x5f5e100 >;
  2772. reg = < 0x00 >;
  2773. };
  2774. };
  2775.  
  2776. spi@15000 {
  2777. compatible = "amlogic,meson-g12a-spicc";
  2778. reg = < 0x00 0x15000 0x00 0x44 >;
  2779. interrupts = < 0x00 0x5a 0x04 >;
  2780. clocks = < 0x02 0x1d 0x02 0x105 >;
  2781. clock-names = "core\0pclk";
  2782. #address-cells = < 0x01 >;
  2783. #size-cells = < 0x00 >;
  2784. status = "disabled";
  2785. phandle = < 0x118 >;
  2786. };
  2787.  
  2788. spi@14000 {
  2789. compatible = "amlogic,meson-gxbb-spifc";
  2790. status = "disabled";
  2791. reg = < 0x00 0x14000 0x00 0x80 >;
  2792. #address-cells = < 0x01 >;
  2793. #size-cells = < 0x00 >;
  2794. clocks = < 0x02 0x0a >;
  2795. phandle = < 0x119 >;
  2796. };
  2797.  
  2798. pwm@19000 {
  2799. compatible = "amlogic,meson-g12a-ee-pwm";
  2800. reg = < 0x00 0x19000 0x00 0x20 >;
  2801. #pwm-cells = < 0x03 >;
  2802. status = "disabled";
  2803. phandle = < 0x11a >;
  2804. };
  2805.  
  2806. pwm@1a000 {
  2807. compatible = "amlogic,meson-g12a-ee-pwm";
  2808. reg = < 0x00 0x1a000 0x00 0x20 >;
  2809. #pwm-cells = < 0x03 >;
  2810. status = "okay";
  2811. pinctrl-names = "default";
  2812. pinctrl-0 = < 0x2d >;
  2813. phandle = < 0x4f >;
  2814. };
  2815.  
  2816. pwm@1b000 {
  2817. compatible = "amlogic,meson-g12a-ee-pwm";
  2818. reg = < 0x00 0x1b000 0x00 0x20 >;
  2819. #pwm-cells = < 0x03 >;
  2820. status = "disabled";
  2821. phandle = < 0x11b >;
  2822. };
  2823.  
  2824. i2c@1c000 {
  2825. compatible = "amlogic,meson-axg-i2c";
  2826. status = "okay";
  2827. reg = < 0x00 0x1c000 0x00 0x20 >;
  2828. interrupts = < 0x00 0x27 0x01 >;
  2829. #address-cells = < 0x01 >;
  2830. #size-cells = < 0x00 >;
  2831. clocks = < 0x02 0x18 >;
  2832. pinctrl-names = "default";
  2833. pinctrl-0 = < 0x2e >;
  2834. clock-frequency = < 0x186a0 >;
  2835. phandle = < 0x11c >;
  2836. };
  2837.  
  2838. i2c@1d000 {
  2839. compatible = "amlogic,meson-axg-i2c";
  2840. status = "okay";
  2841. reg = < 0x00 0x1d000 0x00 0x20 >;
  2842. interrupts = < 0x00 0xd7 0x01 >;
  2843. #address-cells = < 0x01 >;
  2844. #size-cells = < 0x00 >;
  2845. clocks = < 0x02 0x18 >;
  2846. pinctrl-names = "default";
  2847. pinctrl-0 = < 0x2f >;
  2848. clock-frequency = < 0x61a80 >;
  2849. phandle = < 0x11d >;
  2850. };
  2851.  
  2852. i2c@1e000 {
  2853. compatible = "amlogic,meson-axg-i2c";
  2854. status = "disabled";
  2855. reg = < 0x00 0x1e000 0x00 0x20 >;
  2856. interrupts = < 0x00 0xd6 0x01 >;
  2857. #address-cells = < 0x01 >;
  2858. #size-cells = < 0x00 >;
  2859. clocks = < 0x02 0x18 >;
  2860. phandle = < 0x11e >;
  2861. };
  2862.  
  2863. i2c@1f000 {
  2864. compatible = "amlogic,meson-axg-i2c";
  2865. status = "disabled";
  2866. reg = < 0x00 0x1f000 0x00 0x20 >;
  2867. interrupts = < 0x00 0x15 0x01 >;
  2868. #address-cells = < 0x01 >;
  2869. #size-cells = < 0x00 >;
  2870. clocks = < 0x02 0x18 >;
  2871. phandle = < 0x11f >;
  2872. };
  2873.  
  2874. clock-measure@18000 {
  2875. compatible = "amlogic,meson-sm1-clk-measure";
  2876. reg = < 0x00 0x18000 0x00 0x10 >;
  2877. phandle = < 0x120 >;
  2878. };
  2879.  
  2880. serial@22000 {
  2881. compatible = "amlogic,meson-gx-uart";
  2882. reg = < 0x00 0x22000 0x00 0x18 >;
  2883. interrupts = < 0x00 0x5d 0x01 >;
  2884. clocks = < 0x1d 0x02 0x39 0x1d >;
  2885. clock-names = "xtal\0pclk\0baud";
  2886. status = "disabled";
  2887. phandle = < 0x121 >;
  2888. };
  2889.  
  2890. serial@23000 {
  2891. compatible = "amlogic,meson-gx-uart";
  2892. reg = < 0x00 0x23000 0x00 0x18 >;
  2893. interrupts = < 0x00 0x4b 0x01 >;
  2894. clocks = < 0x1d 0x02 0x2a 0x1d >;
  2895. clock-names = "xtal\0pclk\0baud";
  2896. status = "disabled";
  2897. phandle = < 0x122 >;
  2898. };
  2899.  
  2900. serial@24000 {
  2901. compatible = "amlogic,meson-gx-uart";
  2902. reg = < 0x00 0x24000 0x00 0x18 >;
  2903. interrupts = < 0x00 0x1a 0x01 >;
  2904. clocks = < 0x1d 0x02 0x1c 0x1d >;
  2905. clock-names = "xtal\0pclk\0baud";
  2906. status = "okay";
  2907. pinctrl-names = "default";
  2908. pinctrl-0 = < 0x30 >;
  2909. phandle = < 0x123 >;
  2910. };
  2911. };
  2912.  
  2913. sd@ffe03000 {
  2914. compatible = "amlogic,meson-axg-mmc";
  2915. reg = < 0x00 0xffe03000 0x00 0x800 >;
  2916. interrupts = < 0x00 0xbd 0x01 >;
  2917. status = "disabled";
  2918. clocks = < 0x02 0x21 0x02 0x3c 0x02 0x02 >;
  2919. clock-names = "core\0clkin0\0clkin1";
  2920. resets = < 0x05 0x2c >;
  2921. phandle = < 0x124 >;
  2922. };
  2923.  
  2924. sd@ffe05000 {
  2925. compatible = "amlogic,meson-axg-mmc";
  2926. reg = < 0x00 0xffe05000 0x00 0x800 >;
  2927. interrupts = < 0x00 0xbe 0x01 >;
  2928. status = "okay";
  2929. clocks = < 0x02 0x22 0x02 0x3d 0x02 0x02 >;
  2930. clock-names = "core\0clkin0\0clkin1";
  2931. resets = < 0x05 0x2d >;
  2932. pinctrl-0 = < 0x31 >;
  2933. pinctrl-1 = < 0x32 >;
  2934. pinctrl-names = "default\0clk-gate";
  2935. bus-width = < 0x04 >;
  2936. cap-sd-highspeed;
  2937. max-frequency = < 0xbebc200 >;
  2938. sd-uhs-sdr12;
  2939. sd-uhs-sdr25;
  2940. sd-uhs-sdr50;
  2941. sd-uhs-sdr104;
  2942. disable-wp;
  2943. cd-gpios = < 0x07 0x2f 0x01 >;
  2944. vmmc-supply = < 0x33 >;
  2945. vqmmc-supply = < 0x34 >;
  2946. phandle = < 0x125 >;
  2947. };
  2948.  
  2949. mmc@ffe07000 {
  2950. compatible = "amlogic,meson-axg-mmc";
  2951. reg = < 0x00 0xffe07000 0x00 0x800 >;
  2952. interrupts = < 0x00 0xbf 0x01 >;
  2953. status = "okay";
  2954. clocks = < 0x02 0x23 0x02 0x3e 0x02 0x02 >;
  2955. clock-names = "core\0clkin0\0clkin1";
  2956. resets = < 0x05 0x2e >;
  2957. pinctrl-0 = < 0x35 0x36 0x37 >;
  2958. pinctrl-1 = < 0x38 >;
  2959. pinctrl-names = "default\0clk-gate";
  2960. bus-width = < 0x08 >;
  2961. cap-mmc-highspeed;
  2962. mmc-ddr-1_8v;
  2963. mmc-hs200-1_8v;
  2964. max-frequency = < 0xbebc200 >;
  2965. disable-wp;
  2966. mmc-pwrseq = < 0x39 >;
  2967. vmmc-supply = < 0x3a >;
  2968. vqmmc-supply = < 0x3b >;
  2969. phandle = < 0x126 >;
  2970. };
  2971.  
  2972. usb@ffe09000 {
  2973. status = "okay";
  2974. compatible = "amlogic,meson-g12a-usb-ctrl";
  2975. reg = < 0x00 0xffe09000 0x00 0xa0 >;
  2976. interrupts = < 0x00 0x10 0x04 >;
  2977. #address-cells = < 0x02 >;
  2978. #size-cells = < 0x02 >;
  2979. ranges;
  2980. clocks = < 0x02 0x2f >;
  2981. resets = < 0x05 0x22 >;
  2982. dr_mode = "otg";
  2983. phys = < 0x3c 0x3d >;
  2984. phy-names = "usb2-phy0\0usb2-phy1";
  2985. power-domains = < 0x03 0x02 >;
  2986. vbus-supply = < 0x3e >;
  2987. phandle = < 0x127 >;
  2988.  
  2989. usb@ff400000 {
  2990. compatible = "amlogic,meson-g12a-usb\0snps,dwc2";
  2991. reg = < 0x00 0xff400000 0x00 0x40000 >;
  2992. interrupts = < 0x00 0x1f 0x04 >;
  2993. clocks = < 0x02 0x37 >;
  2994. clock-names = "otg";
  2995. phys = < 0x3d >;
  2996. phy-names = "usb2-phy";
  2997. dr_mode = "peripheral";
  2998. g-rx-fifo-size = < 0xc0 >;
  2999. g-np-tx-fifo-size = < 0x80 >;
  3000. g-tx-fifo-size = < 0x80 0x80 0x10 0x10 0x10 >;
  3001. phandle = < 0x128 >;
  3002. };
  3003.  
  3004. usb@ff500000 {
  3005. compatible = "snps,dwc3";
  3006. reg = < 0x00 0xff500000 0x00 0x100000 >;
  3007. interrupts = < 0x00 0x1e 0x04 >;
  3008. dr_mode = "host";
  3009. snps,dis_u2_susphy_quirk;
  3010. snps,quirk-frame-length-adjustment;
  3011. snps,parkmode-disable-ss-quirk;
  3012. phandle = < 0x129 >;
  3013. };
  3014. };
  3015.  
  3016. gpu@ffe40000 {
  3017. compatible = "amlogic,meson-g12a-mali\0arm,mali-bifrost";
  3018. reg = < 0x00 0xffe40000 0x00 0x40000 >;
  3019. interrupt-parent = < 0x01 >;
  3020. interrupts = < 0x00 0xa2 0x04 0x00 0xa1 0x04 0x00 0xa0 0x04 >;
  3021. interrupt-names = "job\0mmu\0gpu";
  3022. clocks = < 0x02 0xaf >;
  3023. resets = < 0x05 0x14 0x05 0x4e >;
  3024. operating-points-v2 = < 0x3f >;
  3025. #cooling-cells = < 0x02 >;
  3026. phandle = < 0x12 >;
  3027. };
  3028. };
  3029.  
  3030. timer {
  3031. compatible = "arm,armv8-timer";
  3032. interrupts = < 0x01 0x0d 0xff08 0x01 0x0e 0xff08 0x01 0x0b 0xff08 0x01 0x0a 0xff08 >;
  3033. arm,no-tick-in-suspend;
  3034. };
  3035.  
  3036. xtal-clk {
  3037. compatible = "fixed-clock";
  3038. clock-frequency = < 0x16e3600 >;
  3039. clock-output-names = "xtal";
  3040. #clock-cells = < 0x00 >;
  3041. phandle = < 0x1d >;
  3042. };
  3043.  
  3044. audio-controller-0 {
  3045. compatible = "amlogic,axg-tdm-iface";
  3046. #sound-dai-cells = < 0x00 >;
  3047. sound-name-prefix = "TDM_A";
  3048. clocks = < 0x22 0x31 0x22 0x4f 0x22 0x56 >;
  3049. clock-names = "mclk\0sclk\0lrclk";
  3050. status = "disabled";
  3051. phandle = < 0x12a >;
  3052. };
  3053.  
  3054. audio-controller-1 {
  3055. compatible = "amlogic,axg-tdm-iface";
  3056. #sound-dai-cells = < 0x00 >;
  3057. sound-name-prefix = "TDM_B";
  3058. clocks = < 0x22 0x32 0x22 0x50 0x22 0x57 >;
  3059. clock-names = "mclk\0sclk\0lrclk";
  3060. status = "okay";
  3061. phandle = < 0x4c >;
  3062. };
  3063.  
  3064. audio-controller-2 {
  3065. compatible = "amlogic,axg-tdm-iface";
  3066. #sound-dai-cells = < 0x00 >;
  3067. sound-name-prefix = "TDM_C";
  3068. clocks = < 0x22 0x33 0x22 0x51 0x22 0x58 >;
  3069. clock-names = "mclk\0sclk\0lrclk";
  3070. status = "disabled";
  3071. phandle = < 0x12b >;
  3072. };
  3073.  
  3074. cpus {
  3075. #address-cells = < 0x02 >;
  3076. #size-cells = < 0x00 >;
  3077.  
  3078. cpu@0 {
  3079. device_type = "cpu";
  3080. compatible = "arm,cortex-a55";
  3081. reg = < 0x00 0x00 >;
  3082. enable-method = "psci";
  3083. next-level-cache = < 0x40 >;
  3084. #cooling-cells = < 0x02 >;
  3085. cpu-supply = < 0x41 >;
  3086. operating-points-v2 = < 0x42 >;
  3087. clocks = < 0x02 0xbb >;
  3088. clock-latency = < 0xc350 >;
  3089. phandle = < 0x0a >;
  3090. };
  3091.  
  3092. cpu@1 {
  3093. device_type = "cpu";
  3094. compatible = "arm,cortex-a55";
  3095. reg = < 0x00 0x01 >;
  3096. enable-method = "psci";
  3097. next-level-cache = < 0x40 >;
  3098. #cooling-cells = < 0x02 >;
  3099. cpu-supply = < 0x41 >;
  3100. operating-points-v2 = < 0x42 >;
  3101. clocks = < 0x02 0xfd >;
  3102. clock-latency = < 0xc350 >;
  3103. phandle = < 0x0b >;
  3104. };
  3105.  
  3106. cpu@2 {
  3107. device_type = "cpu";
  3108. compatible = "arm,cortex-a55";
  3109. reg = < 0x00 0x02 >;
  3110. enable-method = "psci";
  3111. next-level-cache = < 0x40 >;
  3112. #cooling-cells = < 0x02 >;
  3113. cpu-supply = < 0x41 >;
  3114. operating-points-v2 = < 0x42 >;
  3115. clocks = < 0x02 0xfe >;
  3116. clock-latency = < 0xc350 >;
  3117. phandle = < 0x0c >;
  3118. };
  3119.  
  3120. cpu@3 {
  3121. device_type = "cpu";
  3122. compatible = "arm,cortex-a55";
  3123. reg = < 0x00 0x03 >;
  3124. enable-method = "psci";
  3125. next-level-cache = < 0x40 >;
  3126. #cooling-cells = < 0x02 >;
  3127. cpu-supply = < 0x41 >;
  3128. operating-points-v2 = < 0x42 >;
  3129. clocks = < 0x02 0xff >;
  3130. clock-latency = < 0xc350 >;
  3131. phandle = < 0x0d >;
  3132. };
  3133.  
  3134. l2-cache0 {
  3135. compatible = "cache";
  3136. phandle = < 0x40 >;
  3137. };
  3138. };
  3139.  
  3140. opp-table {
  3141. compatible = "operating-points-v2";
  3142. opp-shared;
  3143. phandle = < 0x42 >;
  3144.  
  3145. opp-100000000 {
  3146. opp-hz = < 0x00 0x5f5e100 >;
  3147. opp-microvolt = < 0xb2390 >;
  3148. };
  3149.  
  3150. opp-250000000 {
  3151. opp-hz = < 0x00 0xee6b280 >;
  3152. opp-microvolt = < 0xb2390 >;
  3153. };
  3154.  
  3155. opp-500000000 {
  3156. opp-hz = < 0x00 0x1dcd6500 >;
  3157. opp-microvolt = < 0xb2390 >;
  3158. };
  3159.  
  3160. opp-667000000 {
  3161. opp-hz = < 0x00 0x27bc86aa >;
  3162. opp-microvolt = < 0xb71b0 >;
  3163. };
  3164.  
  3165. opp-1000000000 {
  3166. opp-hz = < 0x00 0x3b9aca00 >;
  3167. opp-microvolt = < 0xbbfd0 >;
  3168. };
  3169.  
  3170. opp-1200000000 {
  3171. opp-hz = < 0x00 0x47868c00 >;
  3172. opp-microvolt = < 0xbe6e0 >;
  3173. };
  3174.  
  3175. opp-1404000000 {
  3176. opp-hz = < 0x00 0x53af5700 >;
  3177. opp-microvolt = < 0xc0df0 >;
  3178. };
  3179.  
  3180. opp-1500000000 {
  3181. opp-hz = < 0x00 0x59682f00 >;
  3182. opp-microvolt = < 0xc3500 >;
  3183. };
  3184.  
  3185. opp-1608000000 {
  3186. opp-hz = < 0x00 0x5fd82200 >;
  3187. opp-microvolt = < 0xc5c10 >;
  3188. };
  3189.  
  3190. opp-1704000000 {
  3191. opp-hz = < 0x00 0x6590fa00 >;
  3192. opp-microvolt = < 0xcf850 >;
  3193. };
  3194.  
  3195. opp-1800000000 {
  3196. opp-hz = < 0x00 0x6b49d200 >;
  3197. opp-microvolt = < 0xdbba0 >;
  3198. };
  3199.  
  3200. opp-1908000000 {
  3201. opp-hz = < 0x00 0x71b9c500 >;
  3202. opp-microvolt = < 0xe7ef0 >;
  3203. };
  3204.  
  3205. opp-2016000000 {
  3206. opp-hz = < 0x00 0x7829b800 >;
  3207. opp-microvolt = < 0xf4240 >;
  3208. };
  3209.  
  3210. opp-2100000000 {
  3211. opp-hz = < 0x00 0x7d2b7500 >;
  3212. opp-microvolt = < 0xf9830 >;
  3213. };
  3214. };
  3215.  
  3216. odroid-reboot {
  3217. compatible = "odroid,reboot";
  3218. sys_reset = < 0x84000009 >;
  3219. sys_poweroff = < 0x84000008 >;
  3220. sd-vqen = < 0x43 0x0e 0x00 >;
  3221. sd-vqsw = < 0x43 0x06 0x00 >;
  3222. sd-vmmc = < 0x43 0x03 0x00 >;
  3223. };
  3224.  
  3225. aliases {
  3226. ethernet0 = "/soc/ethernet@ff3f0000";
  3227. i2c0 = "/soc/bus@ffd00000/i2c@1d000";
  3228. i2c1 = "/soc/bus@ffd00000/i2c@1c000";
  3229. serial0 = "/soc/bus@ff800000/serial@3000";
  3230. serial1 = "/soc/bus@ffd00000/serial@24000";
  3231. spi0 = "/soc/bus@ffd00000/spi@13000";
  3232. };
  3233.  
  3234. memory@0 {
  3235. device_type = "memory";
  3236. reg = < 0x00 0x00 0x00 0x40000000 >;
  3237. };
  3238.  
  3239. emmc-pwrseq {
  3240. compatible = "mmc-pwrseq-emmc";
  3241. reset-gpios = < 0x07 0x25 0x01 >;
  3242. phandle = < 0x39 >;
  3243. };
  3244.  
  3245. leds {
  3246. compatible = "gpio-leds";
  3247.  
  3248. led-blue {
  3249. color = < 0x03 >;
  3250. function = "status";
  3251. gpios = < 0x43 0x0b 0x00 >;
  3252. linux,default-trigger = "heartbeat";
  3253. panic-indicator;
  3254. };
  3255.  
  3256. led-red {
  3257. color = < 0x01 >;
  3258. function = "power";
  3259. gpios = < 0x43 0x07 0x00 >;
  3260. linux,default-trigger = "default-on";
  3261. };
  3262. };
  3263.  
  3264. regulator-tflash_vdd {
  3265. compatible = "regulator-fixed";
  3266. regulator-name = "TFLASH_VDD";
  3267. regulator-min-microvolt = < 0x325aa0 >;
  3268. regulator-max-microvolt = < 0x325aa0 >;
  3269. gpio = < 0x43 0x03 0x00 >;
  3270. enable-active-high;
  3271. regulator-always-on;
  3272. phandle = < 0x33 >;
  3273. };
  3274.  
  3275. gpio-regulator-tf_io {
  3276. compatible = "regulator-gpio";
  3277. regulator-name = "TF_IO";
  3278. regulator-min-microvolt = < 0x1b7740 >;
  3279. regulator-max-microvolt = < 0x325aa0 >;
  3280. gpios = < 0x43 0x06 0x00 >;
  3281. gpios-states = < 0x00 >;
  3282. states = < 0x325aa0 0x00 0x1b7740 0x01 >;
  3283. phandle = < 0x34 >;
  3284. };
  3285.  
  3286. regulator-flash_1v8 {
  3287. compatible = "regulator-fixed";
  3288. regulator-name = "FLASH_1V8";
  3289. regulator-min-microvolt = < 0x1b7740 >;
  3290. regulator-max-microvolt = < 0x1b7740 >;
  3291. vin-supply = < 0x3a >;
  3292. regulator-always-on;
  3293. phandle = < 0x3b >;
  3294. };
  3295.  
  3296. regulator-main_12v {
  3297. compatible = "regulator-fixed";
  3298. regulator-name = "12V";
  3299. regulator-min-microvolt = < 0xb71b00 >;
  3300. regulator-max-microvolt = < 0xb71b00 >;
  3301. regulator-always-on;
  3302. phandle = < 0x44 >;
  3303. };
  3304.  
  3305. regulator-vcc_5v {
  3306. compatible = "regulator-fixed";
  3307. regulator-name = "5V";
  3308. regulator-min-microvolt = < 0x4c4b40 >;
  3309. regulator-max-microvolt = < 0x4c4b40 >;
  3310. regulator-always-on;
  3311. vin-supply = < 0x44 >;
  3312. phandle = < 0x18 >;
  3313. };
  3314.  
  3315. regulator-vcc_1v8 {
  3316. compatible = "regulator-fixed";
  3317. regulator-name = "VCC_1V8";
  3318. regulator-min-microvolt = < 0x1b7740 >;
  3319. regulator-max-microvolt = < 0x1b7740 >;
  3320. vin-supply = < 0x3a >;
  3321. regulator-always-on;
  3322. phandle = < 0x12c >;
  3323. };
  3324.  
  3325. regulator-vcc_3v3 {
  3326. compatible = "regulator-fixed";
  3327. regulator-name = "VCC_3V3";
  3328. regulator-min-microvolt = < 0x325aa0 >;
  3329. regulator-max-microvolt = < 0x325aa0 >;
  3330. vin-supply = < 0x45 >;
  3331. regulator-always-on;
  3332. phandle = < 0x3a >;
  3333. };
  3334.  
  3335. regulator-vddcpu {
  3336. compatible = "pwm-regulator";
  3337. regulator-name = "VDDCPU";
  3338. regulator-min-microvolt = < 0xb0068 >;
  3339. regulator-max-microvolt = < 0xf9830 >;
  3340. vin-supply = < 0x44 >;
  3341. pwms = < 0x46 0x01 0x4e2 0x00 >;
  3342. pwm-dutycycle-range = < 0x64 0x00 >;
  3343. regulator-boot-on;
  3344. regulator-always-on;
  3345. phandle = < 0x41 >;
  3346. };
  3347.  
  3348. regulator-hub_5v {
  3349. compatible = "regulator-fixed";
  3350. regulator-name = "HUB_5V";
  3351. regulator-min-microvolt = < 0x4c4b40 >;
  3352. regulator-max-microvolt = < 0x4c4b40 >;
  3353. vin-supply = < 0x18 >;
  3354. phandle = < 0x1e >;
  3355. };
  3356.  
  3357. regulator-usb_pwr_en {
  3358. compatible = "regulator-fixed";
  3359. regulator-name = "USB_PWR_EN";
  3360. regulator-min-microvolt = < 0x4c4b40 >;
  3361. regulator-max-microvolt = < 0x4c4b40 >;
  3362. vin-supply = < 0x18 >;
  3363. gpio = < 0x43 0x02 0x00 >;
  3364. enable-active-high;
  3365. phandle = < 0x3e >;
  3366. };
  3367.  
  3368. regulator-vddao_1v8 {
  3369. compatible = "regulator-fixed";
  3370. regulator-name = "VDDAO_1V8";
  3371. regulator-min-microvolt = < 0x1b7740 >;
  3372. regulator-max-microvolt = < 0x1b7740 >;
  3373. vin-supply = < 0x45 >;
  3374. regulator-always-on;
  3375. phandle = < 0x12d >;
  3376. };
  3377.  
  3378. regulator-vddao_3v3 {
  3379. compatible = "regulator-fixed";
  3380. regulator-name = "VDDAO_3V3";
  3381. regulator-min-microvolt = < 0x325aa0 >;
  3382. regulator-max-microvolt = < 0x325aa0 >;
  3383. vin-supply = < 0x44 >;
  3384. regulator-always-on;
  3385. phandle = < 0x45 >;
  3386. };
  3387.  
  3388. hdmi-connector {
  3389. compatible = "hdmi-connector";
  3390. type = [ 61 00 ];
  3391.  
  3392. port {
  3393.  
  3394. endpoint {
  3395. remote-endpoint = < 0x47 >;
  3396. phandle = < 0x1a >;
  3397. };
  3398. };
  3399. };
  3400.  
  3401. sound {
  3402. compatible = "amlogic,axg-sound-card";
  3403. model = "SM1-ODROID-C4";
  3404. audio-aux-devs = < 0x48 >;
  3405. audio-routing = "TDMOUT_B IN 0\0FRDDR_A OUT 1\0TDMOUT_B IN 1\0FRDDR_B OUT 1\0TDMOUT_B IN 2\0FRDDR_C OUT 1\0TDM_B Playback\0TDMOUT_B OUT";
  3406. assigned-clocks = < 0x02 0x0d 0x02 0x0b 0x02 0x0c >;
  3407. assigned-clock-parents = < 0x00 0x00 0x00 >;
  3408. assigned-clock-rates = < 0x11940000 0x10266000 0x17700000 >;
  3409. status = "okay";
  3410.  
  3411. dai-link-0 {
  3412. sound-dai = < 0x49 >;
  3413. };
  3414.  
  3415. dai-link-1 {
  3416. sound-dai = < 0x4a >;
  3417. };
  3418.  
  3419. dai-link-2 {
  3420. sound-dai = < 0x4b >;
  3421. };
  3422.  
  3423. dai-link-3 {
  3424. sound-dai = < 0x4c >;
  3425. dai-format = "i2s";
  3426. dai-tdm-slot-tx-mask-0 = < 0x01 0x01 >;
  3427. dai-tdm-slot-tx-mask-1 = < 0x01 0x01 >;
  3428. dai-tdm-slot-tx-mask-2 = < 0x01 0x01 >;
  3429. dai-tdm-slot-tx-mask-3 = < 0x01 0x01 >;
  3430. mclk-fs = < 0x100 >;
  3431.  
  3432. codec {
  3433. sound-dai = < 0x4d 0x01 >;
  3434. };
  3435. };
  3436.  
  3437. dai-link-4 {
  3438. sound-dai = < 0x4d 0x03 >;
  3439.  
  3440. codec {
  3441. sound-dai = < 0x4e >;
  3442. };
  3443. };
  3444. };
  3445.  
  3446. pwm-fan {
  3447. compatible = "pwm-fan";
  3448. #cooling-cells = < 0x02 >;
  3449. cooling-min-state = < 0x00 >;
  3450. cooling-max-state = < 0x03 >;
  3451. cooling-levels = < 0x00 0x78 0xaa 0xdc >;
  3452. pwms = < 0x4f 0x01 0x9c40 0x00 >;
  3453. fan-supply = < 0x18 >;
  3454. interrupt-parent = < 0x21 >;
  3455. interrupts = < 0x54 0x02 >;
  3456. pulses-per-revolutions = < 0x02 >;
  3457. phandle = < 0x0f >;
  3458. };
  3459.  
  3460. __symbols__ {
  3461. simplefb_cvbs = "/chosen/framebuffer-cvbs";
  3462. simplefb_hdmi = "/chosen/framebuffer-hdmi";
  3463. efuse = "/efuse";
  3464. gpu_opp_table = "/gpu-opp-table";
  3465. secmon_reserved = "/reserved-memory/secmon@5000000";
  3466. sm = "/secure-monitor";
  3467. pcie = "/soc/pcie@fc000000";
  3468. cpu_thermal = "/soc/thermal-zones/cpu-thermal";
  3469. cpu_passive = "/soc/thermal-zones/cpu-thermal/trips/cpu-passive";
  3470. cpu_hot = "/soc/thermal-zones/cpu-thermal/trips/cpu-hot";
  3471. cpu_critical = "/soc/thermal-zones/cpu-thermal/trips/cpu-critical";
  3472. ddr_thermal = "/soc/thermal-zones/ddr-thermal";
  3473. ddr_passive = "/soc/thermal-zones/ddr-thermal/trips/ddr-passive";
  3474. ddr_critical = "/soc/thermal-zones/ddr-thermal/trips/ddr-critical";
  3475. ethmac = "/soc/ethernet@ff3f0000";
  3476. mdio0 = "/soc/ethernet@ff3f0000/mdio";
  3477. apb = "/soc/bus@ff600000";
  3478. hdmi_tx = "/soc/bus@ff600000/hdmi-tx@0";
  3479. hdmi_tx_venc_port = "/soc/bus@ff600000/hdmi-tx@0/port@0";
  3480. hdmi_tx_in = "/soc/bus@ff600000/hdmi-tx@0/port@0/endpoint";
  3481. hdmi_tx_tmds_port = "/soc/bus@ff600000/hdmi-tx@0/port@1";
  3482. hdmi_tx_tmds_out = "/soc/bus@ff600000/hdmi-tx@0/port@1/endpoint";
  3483. apb_efuse = "/soc/bus@ff600000/bus@30000";
  3484. hwrng = "/soc/bus@ff600000/bus@30000/rng@218";
  3485. acodec = "/soc/bus@ff600000/audio-controller@32000";
  3486. periphs = "/soc/bus@ff600000/bus@34400";
  3487. periphs_pinctrl = "/soc/bus@ff600000/bus@34400/pinctrl@40";
  3488. gpio = "/soc/bus@ff600000/bus@34400/pinctrl@40/bank@40";
  3489. cec_ao_a_h_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/cec_ao_a_h";
  3490. cec_ao_b_h_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/cec_ao_b_h";
  3491. emmc_ctrl_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/emmc-ctrl";
  3492. emmc_data_4b_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/emmc-data-4b";
  3493. emmc_data_8b_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/emmc-data-8b";
  3494. emmc_ds_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/emmc-ds";
  3495. emmc_clk_gate_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/emmc_clk_gate";
  3496. hdmitx_ddc_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/hdmitx_ddc";
  3497. hdmitx_hpd_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/hdmitx_hpd";
  3498. i2c0_sda_c_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/i2c0-sda-c";
  3499. i2c0_sck_c_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/i2c0-sck-c";
  3500. i2c0_sda_z0_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/i2c0-sda-z0";
  3501. i2c0_sck_z1_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/i2c0-sck-z1";
  3502. i2c0_sda_z7_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/i2c0-sda-z7";
  3503. i2c0_sda_z8_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/i2c0-sda-z8";
  3504. i2c1_sda_x_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/i2c1-sda-x";
  3505. i2c1_sck_x_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/i2c1-sck-x";
  3506. i2c1_sda_h2_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/i2c1-sda-h2";
  3507. i2c1_sck_h3_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/i2c1-sck-h3";
  3508. i2c1_sda_h6_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/i2c1-sda-h6";
  3509. i2c1_sck_h7_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/i2c1-sck-h7";
  3510. i2c2_sda_x_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/i2c2-sda-x";
  3511. i2c2_sck_x_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/i2c2-sck-x";
  3512. i2c2_sda_z_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/i2c2-sda-z";
  3513. i2c2_sck_z_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/i2c2-sck-z";
  3514. i2c3_sda_h_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/i2c3-sda-h";
  3515. i2c3_sck_h_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/i2c3-sck-h";
  3516. i2c3_sda_a_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/i2c3-sda-a";
  3517. i2c3_sck_a_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/i2c3-sck-a";
  3518. mclk0_a_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/mclk0-a";
  3519. mclk1_a_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/mclk1-a";
  3520. mclk1_x_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/mclk1-x";
  3521. mclk1_z_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/mclk1-z";
  3522. nor_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/nor";
  3523. pdm_din0_a_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/pdm-din0-a";
  3524. pdm_din0_c_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/pdm-din0-c";
  3525. pdm_din0_x_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/pdm-din0-x";
  3526. pdm_din0_z_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/pdm-din0-z";
  3527. pdm_din1_a_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/pdm-din1-a";
  3528. pdm_din1_c_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/pdm-din1-c";
  3529. pdm_din1_x_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/pdm-din1-x";
  3530. pdm_din1_z_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/pdm-din1-z";
  3531. pdm_din2_a_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/pdm-din2-a";
  3532. pdm_din2_c_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/pdm-din2-c";
  3533. pdm_din2_x_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/pdm-din2-x";
  3534. pdm_din2_z_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/pdm-din2-z";
  3535. pdm_din3_a_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/pdm-din3-a";
  3536. pdm_din3_c_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/pdm-din3-c";
  3537. pdm_din3_x_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/pdm-din3-x";
  3538. pdm_din3_z_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/pdm-din3-z";
  3539. pdm_dclk_a_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/pdm-dclk-a";
  3540. pdm_dclk_c_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/pdm-dclk-c";
  3541. pdm_dclk_x_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/pdm-dclk-x";
  3542. pdm_dclk_z_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/pdm-dclk-z";
  3543. pwm_a_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/pwm-a";
  3544. pwm_b_x7_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/pwm-b-x7";
  3545. pwm_b_x19_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/pwm-b-x19";
  3546. pwm_c_c_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/pwm-c-c";
  3547. pwm_c_x5_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/pwm-c-x5";
  3548. pwm_c_x8_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/pwm-c-x8";
  3549. pwm_d_x3_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/pwm-d-x3";
  3550. pwm_d_x6_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/pwm-d-x6";
  3551. pwm_e_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/pwm-e";
  3552. pwm_f_x_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/pwm-f-x";
  3553. pwm_f_h_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/pwm-f-h";
  3554. sdcard_c_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/sdcard_c";
  3555. sdcard_clk_gate_c_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/sdcard_clk_gate_c";
  3556. sdcard_z_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/sdcard_z";
  3557. sdcard_clk_gate_z_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/sdcard_clk_gate_z";
  3558. sdio_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/sdio";
  3559. sdio_clk_gate_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/sdio_clk_gate";
  3560. spdif_in_a10_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/spdif-in-a10";
  3561. spdif_in_a12_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/spdif-in-a12";
  3562. spdif_in_h_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/spdif-in-h";
  3563. spdif_out_h_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/spdif-out-h";
  3564. spdif_out_a11_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/spdif-out-a11";
  3565. spdif_out_a13_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/spdif-out-a13";
  3566. spicc0_x_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/spicc0-x";
  3567. spicc0_ss0_x_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/spicc0-ss0-x";
  3568. spicc0_c_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/spicc0-c";
  3569. spicc1_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/spicc1";
  3570. spicc1_ss0_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/spicc1-ss0";
  3571. tdm_a_din0_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-a-din0";
  3572. tdm_a_din1_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-a-din1";
  3573. tdm_a_dout0_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-a-dout0";
  3574. tdm_a_dout1_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-a-dout1";
  3575. tdm_a_fs_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-a-fs";
  3576. tdm_a_sclk_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-a-sclk";
  3577. tdm_a_slv_fs_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-a-slv-fs";
  3578. tdm_a_slv_sclk_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-a-slv-sclk";
  3579. tdm_b_din0_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-b-din0";
  3580. tdm_b_din1_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-b-din1";
  3581. tdm_b_din2_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-b-din2";
  3582. tdm_b_din3_a_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-b-din3-a";
  3583. tdm_b_din3_h_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-b-din3-h";
  3584. tdm_b_dout0_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-b-dout0";
  3585. tdm_b_dout1_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-b-dout1";
  3586. tdm_b_dout2_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-b-dout2";
  3587. tdm_b_dout3_a_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-b-dout3-a";
  3588. tdm_b_dout3_h_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-b-dout3-h";
  3589. tdm_b_fs_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-b-fs";
  3590. tdm_b_sclk_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-b-sclk";
  3591. tdm_b_slv_fs_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-b-slv-fs";
  3592. tdm_b_slv_sclk_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-b-slv-sclk";
  3593. tdm_c_din0_a_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-c-din0-a";
  3594. tdm_c_din0_z_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-c-din0-z";
  3595. tdm_c_din1_a_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-c-din1-a";
  3596. tdm_c_din1_z_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-c-din1-z";
  3597. tdm_c_din2_a_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-c-din2-a";
  3598. eth_leds_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/eth-leds";
  3599. eth_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/eth";
  3600. eth_rgmii_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/eth-rgmii";
  3601. tdm_c_din2_z_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-c-din2-z";
  3602. tdm_c_din3_a_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-c-din3-a";
  3603. tdm_c_din3_z_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-c-din3-z";
  3604. tdm_c_dout0_a_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-c-dout0-a";
  3605. tdm_c_dout0_z_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-c-dout0-z";
  3606. tdm_c_dout1_a_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-c-dout1-a";
  3607. tdm_c_dout1_z_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-c-dout1-z";
  3608. tdm_c_dout2_a_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-c-dout2-a";
  3609. tdm_c_dout2_z_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-c-dout2-z";
  3610. tdm_c_dout3_a_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-c-dout3-a";
  3611. tdm_c_dout3_z_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-c-dout3-z";
  3612. tdm_c_fs_a_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-c-fs-a";
  3613. tdm_c_fs_z_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-c-fs-z";
  3614. tdm_c_sclk_a_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-c-sclk-a";
  3615. tdm_c_sclk_z_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-c-sclk-z";
  3616. tdm_c_slv_fs_a_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-c-slv-fs-a";
  3617. tdm_c_slv_fs_z_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-c-slv-fs-z";
  3618. tdm_c_slv_sclk_a_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-c-slv-sclk-a";
  3619. tdm_c_slv_sclk_z_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-c-slv-sclk-z";
  3620. uart_a_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/uart-a";
  3621. uart_a_cts_rts_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/uart-a-cts-rts";
  3622. uart_b_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/uart-b";
  3623. uart_c_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/uart-c";
  3624. uart_c_cts_rts_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/uart-c-cts-rts";
  3625. i2c2_master_pins1 = "/soc/bus@ff600000/bus@34400/pinctrl@40/i2c2-master-pins1";
  3626. i2c3_master_pins2 = "/soc/bus@ff600000/bus@34400/pinctrl@40/i2c3-master-pins2";
  3627. cpu_temp = "/soc/bus@ff600000/temperature-sensor@34800";
  3628. ddr_temp = "/soc/bus@ff600000/temperature-sensor@34c00";
  3629. usb2_phy0 = "/soc/bus@ff600000/phy@36000";
  3630. dmc = "/soc/bus@ff600000/bus@38000";
  3631. canvas = "/soc/bus@ff600000/bus@38000/video-lut@48";
  3632. usb2_phy1 = "/soc/bus@ff600000/phy@3a000";
  3633. hiu = "/soc/bus@ff600000/bus@3c000";
  3634. hhi = "/soc/bus@ff600000/bus@3c000/system-controller@0";
  3635. clkc = "/soc/bus@ff600000/bus@3c000/system-controller@0/clock-controller";
  3636. pwrc = "/soc/bus@ff600000/bus@3c000/system-controller@0/power-controller";
  3637. usb3_pcie_phy = "/soc/bus@ff600000/phy@46000";
  3638. eth_phy = "/soc/bus@ff600000/mdio-multiplexer@4c000";
  3639. ext_mdio = "/soc/bus@ff600000/mdio-multiplexer@4c000/mdio@0";
  3640. external_phy = "/soc/bus@ff600000/mdio-multiplexer@4c000/mdio@0/ethernet-phy@0";
  3641. int_mdio = "/soc/bus@ff600000/mdio-multiplexer@4c000/mdio@1";
  3642. internal_ephy = "/soc/bus@ff600000/mdio-multiplexer@4c000/mdio@1/ethernet_phy@8";
  3643. audio = "/soc/bus@ff600000/bus@60000";
  3644. clkc_audio = "/soc/bus@ff600000/bus@60000/clock-controller@0";
  3645. toddr_a = "/soc/bus@ff600000/bus@60000/audio-controller@100";
  3646. toddr_b = "/soc/bus@ff600000/bus@60000/audio-controller@140";
  3647. toddr_c = "/soc/bus@ff600000/bus@60000/audio-controller@180";
  3648. frddr_a = "/soc/bus@ff600000/bus@60000/audio-controller@1c0";
  3649. frddr_b = "/soc/bus@ff600000/bus@60000/audio-controller@200";
  3650. frddr_c = "/soc/bus@ff600000/bus@60000/audio-controller@240";
  3651. arb = "/soc/bus@ff600000/bus@60000/reset-controller@280";
  3652. tdmin_a = "/soc/bus@ff600000/bus@60000/audio-controller@300";
  3653. tdmin_b = "/soc/bus@ff600000/bus@60000/audio-controller@340";
  3654. tdmin_c = "/soc/bus@ff600000/bus@60000/audio-controller@380";
  3655. tdmin_lb = "/soc/bus@ff600000/bus@60000/audio-controller@3c0";
  3656. tdmout_a = "/soc/bus@ff600000/bus@60000/audio-controller@500";
  3657. tdmout_b = "/soc/bus@ff600000/bus@60000/audio-controller@540";
  3658. tdmout_c = "/soc/bus@ff600000/bus@60000/audio-controller@580";
  3659. tohdmitx = "/soc/bus@ff600000/bus@60000/audio-controller@744";
  3660. toddr_d = "/soc/bus@ff600000/bus@60000/audio-controller@840";
  3661. frddr_d = "/soc/bus@ff600000/bus@60000/audio-controller@880";
  3662. pdm = "/soc/bus@ff600000/audio-controller@61000";
  3663. aobus = "/soc/bus@ff800000";
  3664. rti = "/soc/bus@ff800000/sys-ctrl@0";
  3665. clkc_AO = "/soc/bus@ff800000/sys-ctrl@0/clock-controller";
  3666. ao_pinctrl = "/soc/bus@ff800000/sys-ctrl@0/pinctrl@14";
  3667. gpio_ao = "/soc/bus@ff800000/sys-ctrl@0/pinctrl@14/bank@14";
  3668. i2c_ao_sck_pins = "/soc/bus@ff800000/sys-ctrl@0/pinctrl@14/i2c_ao_sck_pins";
  3669. i2c_ao_sda_pins = "/soc/bus@ff800000/sys-ctrl@0/pinctrl@14/i2c_ao_sda";
  3670. i2c_ao_sck_e_pins = "/soc/bus@ff800000/sys-ctrl@0/pinctrl@14/i2c_ao_sck_e";
  3671. i2c_ao_sda_e_pins = "/soc/bus@ff800000/sys-ctrl@0/pinctrl@14/i2c_ao_sda_e";
  3672. mclk0_ao_pins = "/soc/bus@ff800000/sys-ctrl@0/pinctrl@14/mclk0-ao";
  3673. tdm_ao_b_din0_pins = "/soc/bus@ff800000/sys-ctrl@0/pinctrl@14/tdm-ao-b-din0";
  3674. spdif_ao_out_pins = "/soc/bus@ff800000/sys-ctrl@0/pinctrl@14/spdif-ao-out";
  3675. tdm_ao_b_din1_pins = "/soc/bus@ff800000/sys-ctrl@0/pinctrl@14/tdm-ao-b-din1";
  3676. tdm_ao_b_din2_pins = "/soc/bus@ff800000/sys-ctrl@0/pinctrl@14/tdm-ao-b-din2";
  3677. tdm_ao_b_dout0_pins = "/soc/bus@ff800000/sys-ctrl@0/pinctrl@14/tdm-ao-b-dout0";
  3678. tdm_ao_b_dout1_pins = "/soc/bus@ff800000/sys-ctrl@0/pinctrl@14/tdm-ao-b-dout1";
  3679. tdm_ao_b_dout2_pins = "/soc/bus@ff800000/sys-ctrl@0/pinctrl@14/tdm-ao-b-dout2";
  3680. tdm_ao_b_fs_pins = "/soc/bus@ff800000/sys-ctrl@0/pinctrl@14/tdm-ao-b-fs";
  3681. tdm_ao_b_sclk_pins = "/soc/bus@ff800000/sys-ctrl@0/pinctrl@14/tdm-ao-b-sclk";
  3682. tdm_ao_b_slv_fs_pins = "/soc/bus@ff800000/sys-ctrl@0/pinctrl@14/tdm-ao-b-slv-fs";
  3683. tdm_ao_b_slv_sclk_pins = "/soc/bus@ff800000/sys-ctrl@0/pinctrl@14/tdm-ao-b-slv-sclk";
  3684. uart_ao_a_pins = "/soc/bus@ff800000/sys-ctrl@0/pinctrl@14/uart-a-ao";
  3685. uart_ao_a_cts_rts_pins = "/soc/bus@ff800000/sys-ctrl@0/pinctrl@14/uart-ao-a-cts-rts";
  3686. pwm_a_e_pins = "/soc/bus@ff800000/sys-ctrl@0/pinctrl@14/pwm-a-e";
  3687. pwm_ao_a_pins = "/soc/bus@ff800000/sys-ctrl@0/pinctrl@14/pwm-ao-a";
  3688. pwm_ao_b_pins = "/soc/bus@ff800000/sys-ctrl@0/pinctrl@14/pwm-ao-b";
  3689. pwm_ao_c_4_pins = "/soc/bus@ff800000/sys-ctrl@0/pinctrl@14/pwm-ao-c-4";
  3690. pwm_ao_c_6_pins = "/soc/bus@ff800000/sys-ctrl@0/pinctrl@14/pwm-ao-c-6";
  3691. pwm_ao_d_5_pins = "/soc/bus@ff800000/sys-ctrl@0/pinctrl@14/pwm-ao-d-5";
  3692. pwm_ao_d_10_pins = "/soc/bus@ff800000/sys-ctrl@0/pinctrl@14/pwm-ao-d-10";
  3693. pwm_ao_d_e_pins = "/soc/bus@ff800000/sys-ctrl@0/pinctrl@14/pwm-ao-d-e";
  3694. remote_input_ao_pins = "/soc/bus@ff800000/sys-ctrl@0/pinctrl@14/remote-input-ao";
  3695. vrtc = "/soc/bus@ff800000/rtc@0a8";
  3696. cec_AO = "/soc/bus@ff800000/cec@100";
  3697. sec_AO = "/soc/bus@ff800000/ao-secure@140";
  3698. cecb_AO = "/soc/bus@ff800000/cec@280";
  3699. pwm_AO_cd = "/soc/bus@ff800000/pwm@2000";
  3700. uart_AO = "/soc/bus@ff800000/serial@3000";
  3701. uart_AO_B = "/soc/bus@ff800000/serial@4000";
  3702. i2c_AO = "/soc/bus@ff800000/i2c@5000";
  3703. pwm_AO_ab = "/soc/bus@ff800000/pwm@7000";
  3704. ir = "/soc/bus@ff800000/ir@8000";
  3705. saradc = "/soc/bus@ff800000/adc@9000";
  3706. vdec = "/soc/video-decoder@ff620000";
  3707. vpu = "/soc/vpu@ff900000";
  3708. cvbs_vdac_port = "/soc/vpu@ff900000/port@0";
  3709. hdmi_tx_port = "/soc/vpu@ff900000/port@1";
  3710. hdmi_tx_out = "/soc/vpu@ff900000/port@1/endpoint";
  3711. gic = "/soc/interrupt-controller@ffc01000";
  3712. cbus = "/soc/bus@ffd00000";
  3713. reset = "/soc/bus@ffd00000/reset-controller@1004";
  3714. gpio_intc = "/soc/bus@ffd00000/interrupt-controller@f080";
  3715. watchdog = "/soc/bus@ffd00000/wdt@f0d0";
  3716. spicc0 = "/soc/bus@ffd00000/spi@13000";
  3717. spicc1 = "/soc/bus@ffd00000/spi@15000";
  3718. spifc = "/soc/bus@ffd00000/spi@14000";
  3719. pwm_ef = "/soc/bus@ffd00000/pwm@19000";
  3720. pwm_cd = "/soc/bus@ffd00000/pwm@1a000";
  3721. pwm_ab = "/soc/bus@ffd00000/pwm@1b000";
  3722. i2c3 = "/soc/bus@ffd00000/i2c@1c000";
  3723. i2c2 = "/soc/bus@ffd00000/i2c@1d000";
  3724. i2c1 = "/soc/bus@ffd00000/i2c@1e000";
  3725. i2c0 = "/soc/bus@ffd00000/i2c@1f000";
  3726. clk_msr = "/soc/bus@ffd00000/clock-measure@18000";
  3727. uart_C = "/soc/bus@ffd00000/serial@22000";
  3728. uart_B = "/soc/bus@ffd00000/serial@23000";
  3729. uart_A = "/soc/bus@ffd00000/serial@24000";
  3730. sd_emmc_a = "/soc/sd@ffe03000";
  3731. sd_emmc_b = "/soc/sd@ffe05000";
  3732. sd_emmc_c = "/soc/mmc@ffe07000";
  3733. usb = "/soc/usb@ffe09000";
  3734. dwc2 = "/soc/usb@ffe09000/usb@ff400000";
  3735. dwc3 = "/soc/usb@ffe09000/usb@ff500000";
  3736. mali = "/soc/gpu@ffe40000";
  3737. xtal = "/xtal-clk";
  3738. tdmif_a = "/audio-controller-0";
  3739. tdmif_b = "/audio-controller-1";
  3740. tdmif_c = "/audio-controller-2";
  3741. cpu0 = "/cpus/cpu@0";
  3742. cpu1 = "/cpus/cpu@1";
  3743. cpu2 = "/cpus/cpu@2";
  3744. cpu3 = "/cpus/cpu@3";
  3745. l2 = "/cpus/l2-cache0";
  3746. cpu_opp_table = "/opp-table";
  3747. emmc_pwrseq = "/emmc-pwrseq";
  3748. tflash_vdd = "/regulator-tflash_vdd";
  3749. tf_io = "/gpio-regulator-tf_io";
  3750. flash_1v8 = "/regulator-flash_1v8";
  3751. main_12v = "/regulator-main_12v";
  3752. vcc_5v = "/regulator-vcc_5v";
  3753. vcc_1v8 = "/regulator-vcc_1v8";
  3754. vcc_3v3 = "/regulator-vcc_3v3";
  3755. vddcpu = "/regulator-vddcpu";
  3756. hub_5v = "/regulator-hub_5v";
  3757. usb_pwr_en = "/regulator-usb_pwr_en";
  3758. vddao_1v8 = "/regulator-vddao_1v8";
  3759. vddao_3v3 = "/regulator-vddao_3v3";
  3760. hdmi_connector_in = "/hdmi-connector/port/endpoint";
  3761. fan0 = "/pwm-fan";
  3762. };
  3763. };
  3764.  
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