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ciusss89

LEDE_rbspi_diff

Oct 2nd, 2017
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  1. diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-rbspi.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-rbspi.c
  2. index 9b4c53a57877..0746779f417b 100644
  3. --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-rbspi.c
  4. +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-rbspi.c
  5. @@ -40,6 +40,8 @@
  6.  #include <linux/mtd/partitions.h>
  7.  
  8.  #include <linux/ar8216_platform.h>
  9. +#include <linux/platform_data/phy-at803x.h>
  10. +#include <linux/platform_data/mdio-gpio.h>
  11.  
  12.  #include <asm/prom.h>
  13.  #include <asm/mach-ath79/ar71xx_regs.h>
  14. @@ -68,6 +70,7 @@
  15.  #define RBSPI_HAS_POE          BIT(5)
  16.  #define RBSPI_HAS_MDIO1                BIT(6)
  17.  #define RBSPI_HAS_PCI          BIT(7)
  18. +#define RBSPI_HAS_TS           BIT(8)
  19.  
  20.  #define RB_ROUTERBOOT_OFFSET    0x0000
  21.  #define RB_BIOS_SIZE            0x1000
  22. @@ -134,6 +137,7 @@ static struct flash_platform_data rbspi_spi_flash_data = {
  23.  };
  24.  
  25.  /* Several boards only have a single reset button wired to GPIO 16 */
  26. +#define RBSPI_GPIO_BTN_RESET01 1
  27.  #define RBSPI_GPIO_BTN_RESET16 16
  28.  #define RBSPI_GPIO_BTN_RESET20 20
  29.  
  30. @@ -159,6 +163,17 @@ static struct gpio_keys_button rbspi_gpio_keys_reset20[] __initdata = {
  31.         },
  32.  };
  33.  
  34. +static struct gpio_keys_button rbspi_gpio_keys_reset1[] __initdata = {
  35. +       {
  36. +               .desc = "reset",
  37. +               .type = EV_KEY,
  38. +               .code = KEY_RESTART,
  39. +               .debounce_interval = RBSPI_KEYS_DEBOUNCE_INTERVAL,
  40. +               .gpio = RBSPI_GPIO_BTN_RESET01,
  41. +               .active_low = 1,
  42. +       },
  43. +};
  44. +
  45.  /* RB mAP L-2nD gpios */
  46.  #define RBMAPL_GPIO_LED_POWER  17
  47.  #define RBMAPL_GPIO_LED_USER   14
  48. @@ -493,6 +508,7 @@ static struct gen_74x164_chip_platform_data rbspi_ssr_data = {
  49.  static int rbspi_spi_cs_gpios[] = {
  50.         -ENOENT,        /* CS0 is always -ENOENT: natively handled */
  51.         -ENOENT,        /* CS1 can be updated by the code as necessary */
  52. +       -ENOENT,        /* CS2 */
  53.  };
  54.  
  55.  static struct ath79_spi_platform_data rbspi_ath79_spi_data = {
  56. @@ -501,8 +517,10 @@ static struct ath79_spi_platform_data rbspi_ath79_spi_data = {
  57.  };
  58.  
  59.  /*
  60. - * Global spi_board_info: devices that don't have an SSR only have the SPI NOR
  61. - * flash on bus0 CS0, while devices that have an SSR add it on the same bus CS1
  62. + * Global spi_board_info:
  63. + * *   CS 0 : Nor flash ( always present )
  64. + *     CS 1 : Serial in/parallel-out Shift Register
  65. + *     CS 2 : Touch Screan controller, voltage and temperature reader.
  66.   */
  67.  static struct spi_board_info rbspi_spi_info[] = {
  68.         {
  69. @@ -517,6 +535,18 @@ static struct spi_board_info rbspi_spi_info[] = {
  70.                 .max_speed_hz   = 25000000,
  71.                 .modalias       = "74x164",
  72.                 .platform_data  = &rbspi_ssr_data,
  73. +       }, {
  74. +               /*
  75. +                * IC: ZT2046Q
  76. +                * Set the modalias to spidev (gpl mikrotik uses rb2011-spi-ts)
  77. +                * for now. I don't know a driver yet.
  78. +                */
  79. +               .bus_num        = 0,
  80. +               .chip_select    = 2,
  81. +               .max_speed_hz   = 2500 * 1000,
  82. +               .mode           = SPI_MODE_3,
  83. +               .modalias       = "spidev",
  84. +               .platform_data  = (void *) 16,
  85.         }
  86.  };
  87.  
  88. @@ -577,8 +607,12 @@ static void __init rbspi_peripherals_setup(u32 flags)
  89.  {
  90.         unsigned spi_n;
  91.  
  92. -       if (flags & RBSPI_HAS_SSR)
  93. +       if (flags & RBSPI_HAS_SSR & RBSPI_HAS_TS )
  94.                 spi_n = ARRAY_SIZE(rbspi_spi_info);
  95. +       else if (flags & RBSPI_HAS_SSR )
  96. +               spi_n = 2;
  97. +       else if (flags & RBSPI_HAS_TS )
  98. +               spi_n = 2;
  99.         else
  100.                 spi_n = 1;     /* only one device on bus0 */
  101.  
  102. @@ -639,6 +673,22 @@ static void __init rbspi_network_setup(u32 flags, int gmac1_offset,
  103.                 rbspi_wlan_init(1, wmac1_offset);
  104.  }
  105.  
  106. +/*
  107. + * Common WiFi init routine for all SPI NOR devices.
  108. + * Sets WiFi
  109. + */
  110. +static void __init rbspi_wifi_registrer(u32 flags,
  111. +                               int wmac0_offset, int wmac1_offset)
  112. +{
  113. +
  114. +       if (flags & RBSPI_HAS_WLAN0)
  115. +               rbspi_wlan_init(0, wmac0_offset);
  116. +
  117. +       if (flags & RBSPI_HAS_WLAN1)
  118. +               rbspi_wlan_init(1, wmac1_offset);
  119. +
  120. +}
  121. +
  122.  /*
  123.   * Init the mAP lite hardware (QCA953x).
  124.   * The mAP L-2nD (mAP lite) has a single ethernet port, connected to PHY0.
  125. @@ -933,7 +983,81 @@ static void __init rbmap_setup(void)
  126.         ath79_register_leds_gpio(-1, ARRAY_SIZE(rbmap_leds), rbmap_leds);
  127.  }
  128.  
  129. +/*
  130. + * RBwAPG-5HacT2HnD board:
  131. + *  -Power     : PoE AT - DC.in (12 - 57V)
  132. + *  -SoC       : QCA9556
  133. + *  -Net:      : AR8033
  134. + *  -Phy0      : Built-in SoC, mimo 2x2:2
  135. + *  -Phy1      : QCA9880 3x3
  136. + *  -RAM       : 64 MiB
  137. + *  -FLASH     : 16 MiB
  138. + *  -Antennas  : Gain 2dbi ( both bands )
  139. + *  -IC                : ZT2046Q provide a temperature and voltage sensor.
  140. + *
  141. + *  Magic: wapg-sc
  142. + */
  143. +
  144. +#define RBWAPG_LED1            1
  145. +#define RBWAPG_LED2            8
  146. +#define RBWAPG_LED3            9
  147. +#define RBWAPG_POWERLED                16
  148. +
  149. +#define RBWAPG_GPIO_MDIO_MDC           12
  150. +#define RBWAPG_GPIO_MDIO_DATA          11
  151. +
  152. +#define RBWAPG_MDIO_PHYMASK            0
  153. +
  154. +static struct mdio_gpio_platform_data rbwap_mdio_data = {
  155. +       .mdc            = RBWAPG_GPIO_MDIO_MDC,
  156. +       .mdio           = RBWAPG_GPIO_MDIO_DATA,
  157. +       .phy_mask       = ~BIT(RBWAPG_MDIO_PHYMASK),
  158. +};
  159. +
  160. +static struct platform_device rbwap_phy_device = {
  161. +       .name   = "mdio-gpio",
  162. +       .id     = 1,
  163. +       .dev    = {
  164. +               .platform_data = &rbwap_mdio_data
  165. +       },
  166. +};
  167. +
  168. +static void __init rbwapg_setup(void)
  169. +{
  170. +       u32 flags = RBSPI_HAS_WLAN1 | RBSPI_HAS_PCI
  171. +               | RBSPI_HAS_TS;
  172. +
  173. +       if (rbspi_platform_setup())
  174. +               return;
  175. +
  176. +       /* Sets SPI and USB */
  177. +       rbspi_peripherals_setup(flags);
  178. +
  179. +       /* SoC setup: MDIO Interface  */
  180. +       platform_device_register(&rbwap_phy_device);
  181. +
  182. +       /* GMAC1 is connect by SGMII to AR8083  */
  183. +       ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 0);
  184. +       ath79_eth1_data.mii_bus_dev = &rbwap_phy_device.dev;
  185. +       ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII;
  186. +       ath79_eth1_data.phy_mask = BIT(RBWAPG_MDIO_PHYMASK);
  187. +       ath79_eth1_pll_data.pll_1000 = 0x03000101;
  188. +       ath79_eth1_pll_data.pll_100 = 0x80000101;
  189. +       ath79_eth1_pll_data.pll_10 = 0x80001313;
  190. +       ath79_eth1_data.speed = SPEED_1000;
  191. +       ath79_eth1_data.duplex = DUPLEX_FULL;
  192. +       ath79_register_eth(1);
  193. +
  194. +       /*Radios*/
  195. +       rbspi_wifi_registrer(flags, 0, 1);
  196. +
  197. +       /*GPIO*/
  198. +       ath79_register_gpio_keys_polled(-1, RBSPI_KEYS_POLL_INTERVAL,
  199. +               ARRAY_SIZE(rbspi_gpio_keys_reset1),
  200. +               rbspi_gpio_keys_reset1);
  201. +}
  202.  
  203. +MIPS_MACHINE_NONAME(ATH79_MACH_RB_WAPG, "wapg-sc", rbwapg_setup)
  204.  MIPS_MACHINE_NONAME(ATH79_MACH_RB_MAPL, "map-hb", rbmapl_setup);
  205.  MIPS_MACHINE_NONAME(ATH79_MACH_RB_941, "H951L", rbhapl_setup);
  206.  MIPS_MACHINE_NONAME(ATH79_MACH_RB_952, "952-hb", rb952_setup);
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