LEDE_rbspi_diff

diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-rbspi.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-rbspi.c
index 9b4c53a57877..0746779f417b 100644
--- a/target/linux/ar71xx/files/arch/mips/ath79/mach-rbspi.c
+++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-rbspi.c
@@ -40,6 +40,8 @@
 #include <linux/mtd/partitions.h>

 #include <linux/ar8216_platform.h>
+#include <linux/platform_data/phy-at803x.h>
+#include <linux/platform_data/mdio-gpio.h>

 #include <asm/prom.h>
 #include <asm/mach-ath79/ar71xx_regs.h>
@@ -68,6 +70,7 @@
 #define RBSPI_HAS_POE          BIT(5)
 #define RBSPI_HAS_MDIO1                BIT(6)
 #define RBSPI_HAS_PCI          BIT(7)
+#define RBSPI_HAS_TS           BIT(8)

 #define RB_ROUTERBOOT_OFFSET    0x0000
 #define RB_BIOS_SIZE            0x1000
@@ -134,6 +137,7 @@ static struct flash_platform_data rbspi_spi_flash_data = {
 };

 /* Several boards only have a single reset button wired to GPIO 16 */
+#define RBSPI_GPIO_BTN_RESET01 1
 #define RBSPI_GPIO_BTN_RESET16 16
 #define RBSPI_GPIO_BTN_RESET20 20

@@ -159,6 +163,17 @@ static struct gpio_keys_button rbspi_gpio_keys_reset20[] __initdata = {
        },
 };

+static struct gpio_keys_button rbspi_gpio_keys_reset1[] __initdata = {
+       {
+               .desc = "reset",
+               .type = EV_KEY,
+               .code = KEY_RESTART,
+               .debounce_interval = RBSPI_KEYS_DEBOUNCE_INTERVAL,
+               .gpio = RBSPI_GPIO_BTN_RESET01,
+               .active_low = 1,
+       },
+};
+
 /* RB mAP L-2nD gpios */
 #define RBMAPL_GPIO_LED_POWER  17
 #define RBMAPL_GPIO_LED_USER   14
@@ -493,6 +508,7 @@ static struct gen_74x164_chip_platform_data rbspi_ssr_data = {
 static int rbspi_spi_cs_gpios[] = {
        -ENOENT,        /* CS0 is always -ENOENT: natively handled */
        -ENOENT,        /* CS1 can be updated by the code as necessary */
+       -ENOENT,        /* CS2 */
 };

 static struct ath79_spi_platform_data rbspi_ath79_spi_data = {
@@ -501,8 +517,10 @@ static struct ath79_spi_platform_data rbspi_ath79_spi_data = {
 };

 /*
- * Global spi_board_info: devices that don't have an SSR only have the SPI NOR
- * flash on bus0 CS0, while devices that have an SSR add it on the same bus CS1
+ * Global spi_board_info:
+ * *   CS 0 : Nor flash ( always present )
+ *     CS 1 : Serial in/parallel-out Shift Register
+ *     CS 2 : Touch Screan controller, voltage and temperature reader.
  */
 static struct spi_board_info rbspi_spi_info[] = {
        {
@@ -517,6 +535,18 @@ static struct spi_board_info rbspi_spi_info[] = {
                .max_speed_hz   = 25000000,
                .modalias       = "74x164",
                .platform_data  = &rbspi_ssr_data,
+       }, {
+               /*
+                * IC: ZT2046Q
+                * Set the modalias to spidev (gpl mikrotik uses rb2011-spi-ts)
+                * for now. I don't know a driver yet.
+                */
+               .bus_num        = 0,
+               .chip_select    = 2,
+               .max_speed_hz   = 2500 * 1000,
+               .mode           = SPI_MODE_3,
+               .modalias       = "spidev",
+               .platform_data  = (void *) 16,
        }
 };

@@ -577,8 +607,12 @@ static void __init rbspi_peripherals_setup(u32 flags)
 {
        unsigned spi_n;

-       if (flags & RBSPI_HAS_SSR)
+       if (flags & RBSPI_HAS_SSR & RBSPI_HAS_TS )
                spi_n = ARRAY_SIZE(rbspi_spi_info);
+       else if (flags & RBSPI_HAS_SSR )
+               spi_n = 2;
+       else if (flags & RBSPI_HAS_TS )
+               spi_n = 2;
        else
                spi_n = 1;     /* only one device on bus0 */

@@ -639,6 +673,22 @@ static void __init rbspi_network_setup(u32 flags, int gmac1_offset,
                rbspi_wlan_init(1, wmac1_offset);
 }

+/*
+ * Common WiFi init routine for all SPI NOR devices.
+ * Sets WiFi
+ */
+static void __init rbspi_wifi_registrer(u32 flags,
+                               int wmac0_offset, int wmac1_offset)
+{
+
+       if (flags & RBSPI_HAS_WLAN0)
+               rbspi_wlan_init(0, wmac0_offset);
+
+       if (flags & RBSPI_HAS_WLAN1)
+               rbspi_wlan_init(1, wmac1_offset);
+
+}
+
 /*
  * Init the mAP lite hardware (QCA953x).
  * The mAP L-2nD (mAP lite) has a single ethernet port, connected to PHY0.
@@ -933,7 +983,81 @@ static void __init rbmap_setup(void)
        ath79_register_leds_gpio(-1, ARRAY_SIZE(rbmap_leds), rbmap_leds);
 }

+/*
+ * RBwAPG-5HacT2HnD board:
+ *  -Power     : PoE AT - DC.in (12 - 57V)
+ *  -SoC       : QCA9556
+ *  -Net:      : AR8033
+ *  -Phy0      : Built-in SoC, mimo 2x2:2
+ *  -Phy1      : QCA9880 3x3
+ *  -RAM       : 64 MiB
+ *  -FLASH     : 16 MiB
+ *  -Antennas  : Gain 2dbi ( both bands )
+ *  -IC                : ZT2046Q provide a temperature and voltage sensor.
+ *
+ *  Magic: wapg-sc
+ */
+
+#define RBWAPG_LED1            1
+#define RBWAPG_LED2            8
+#define RBWAPG_LED3            9
+#define RBWAPG_POWERLED                16
+
+#define RBWAPG_GPIO_MDIO_MDC           12
+#define RBWAPG_GPIO_MDIO_DATA          11
+
+#define RBWAPG_MDIO_PHYMASK            0
+
+static struct mdio_gpio_platform_data rbwap_mdio_data = {
+       .mdc            = RBWAPG_GPIO_MDIO_MDC,
+       .mdio           = RBWAPG_GPIO_MDIO_DATA,
+       .phy_mask       = ~BIT(RBWAPG_MDIO_PHYMASK),
+};
+
+static struct platform_device rbwap_phy_device = {
+       .name   = "mdio-gpio",
+       .id     = 1,
+       .dev    = {
+               .platform_data = &rbwap_mdio_data
+       },
+};
+
+static void __init rbwapg_setup(void)
+{
+       u32 flags = RBSPI_HAS_WLAN1 | RBSPI_HAS_PCI
+               | RBSPI_HAS_TS;
+
+       if (rbspi_platform_setup())
+               return;
+
+       /* Sets SPI and USB */
+       rbspi_peripherals_setup(flags);
+
+       /* SoC setup: MDIO Interface  */
+       platform_device_register(&rbwap_phy_device);
+
+       /* GMAC1 is connect by SGMII to AR8083  */
+       ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 0);
+       ath79_eth1_data.mii_bus_dev = &rbwap_phy_device.dev;
+       ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII;
+       ath79_eth1_data.phy_mask = BIT(RBWAPG_MDIO_PHYMASK);
+       ath79_eth1_pll_data.pll_1000 = 0x03000101;
+       ath79_eth1_pll_data.pll_100 = 0x80000101;
+       ath79_eth1_pll_data.pll_10 = 0x80001313;
+       ath79_eth1_data.speed = SPEED_1000;
+       ath79_eth1_data.duplex = DUPLEX_FULL;
+       ath79_register_eth(1);
+
+       /*Radios*/
+       rbspi_wifi_registrer(flags, 0, 1);
+
+       /*GPIO*/
+       ath79_register_gpio_keys_polled(-1, RBSPI_KEYS_POLL_INTERVAL,
+               ARRAY_SIZE(rbspi_gpio_keys_reset1),
+               rbspi_gpio_keys_reset1);
+}

+MIPS_MACHINE_NONAME(ATH79_MACH_RB_WAPG, "wapg-sc", rbwapg_setup)
 MIPS_MACHINE_NONAME(ATH79_MACH_RB_MAPL, "map-hb", rbmapl_setup);
 MIPS_MACHINE_NONAME(ATH79_MACH_RB_941, "H951L", rbhapl_setup);
 MIPS_MACHINE_NONAME(ATH79_MACH_RB_952, "952-hb", rb952_setup);