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- module Preskaler_1Hz(CLK, CE, Q_preskaler, CEO_preskaler);
- input CLK, CE;
- output reg [27:0] Q_preskaler;
- output CEO_preskaler;
- always @(posedge CLK)
- begin
- if(CE)
- if(Q_preskaler != 28'd149999999)
- Q_preskaler <= Q_preskaler + 1;
- else
- Q_preskaler <= 28'd0;
- end
- assign CEO_preskaler = CE & (Q_preskaler == 28'd149999999);
- endmodule
- /////////////////////////////////////////////////////////////////////////////////////////////////////////////////
- module Memory_counter(CLK, CE, Q_mem_cnt);
- input CLK, CE;
- output reg [3:0]Q_mem_cnt;
- always @(posedge CLK)
- begin
- if(CE)
- if(Q_mem_cnt != 4'd15)
- Q_mem_cnt <= Q_mem_cnt + 1;
- else
- Q_mem_cnt <= 4'd0;
- end
- endmodule
- /////////////////////////////////////////////////////////////////////////////////////////////////////////////////
- module register(CLK,CE,IN_reg, OUT_reg);
- input CLK, CE;
- input [7:0]IN_reg;
- output reg [7:0]OUT_reg;
- always @(posedge CLK)
- begin
- if(CE)
- OUT_reg <= IN_reg;
- else
- OUT_reg <= 8'd0;
- end
- endmodule
- /////////////////////////////////////////////////////////////////////////////////////////////////////////////////
- module dwojka(CLK, CE,OUT);
- input CLK, CE;
- output reg OUT;
- always @(posedge CLK)
- begin
- if(CE)
- OUT <= OUT +1;
- end
- endmodule
- /////////////////////////////////////////////////////////////////////////////////////////////////////////////////
- module TOP(CLK, CEO_preskaler, Q_mem_cnt, douta, OUT);
- input CLK;
- output CEO_preskaler, OUT;
- output [3:0]Q_mem_cnt;
- output [7:0]douta;
- //module Preskaler_1Hz(CLK,CE, Q_preskaler, CEO_preskaler);
- Preskaler_1Hz Hz_1(CLK, 1'b1, , CEO_preskaler);
- //module Memory_counter(CLK,CE, Q_mem_cnt);
- Memory_counter counter(CLK, CEO_preskaler, Q_mem_cnt );
- //module register(CLK,CE,IN_reg, OUT_reg);
- register reg_mem(CLK, 1'b1, douta[7:0] , );
- //module dwojka(CLK, CE, OUT);
- dwojka dw(CLK, CEO_preskaler, OUT);
- VGA_ROM your_instance_name
- (
- .clka(CLK), // input clka
- .addra(Q_mem_cnt), // input [3 : 0] addra
- .douta(douta) // output [7 : 0] douta
- );
- endmodule
- /////////////////////////////////////////////////////////////////////////////////////////////////////////////////
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