Error (10349): VHDL Association List error at REU_TOP_MII.vhd(916): formal "input_port_to_the_I2C_RTC" does not exist
Error (10346): VHDL error at REU_TOP_MII.vhd(850): formal port or parameter "in_port_to_the_ID_Signals" must have actual or default value
Error (10784): HDL error at NIOS.vhd(10646): see declaration for object "in_port_to_the_ID_Signals"
Error (10346): VHDL error at REU_TOP_MII.vhd(850): formal port or parameter "in_port_to_the_IP_Address" must have actual or default value
Error (10784): HDL error at NIOS.vhd(10649): see declaration for object "in_port_to_the_IP_Address"
Error (10346): VHDL error at REU_TOP_MII.vhd(850): formal port or parameter "in_port_to_the_PRP_or_HSR" must have actual or default value
Error (10784): HDL error at NIOS.vhd(10652): see declaration for object "in_port_to_the_PRP_or_HSR"
Error (10346): VHDL error at REU_TOP_MII.vhd(850): formal port or parameter "in_port_to_the_Read_Relays" must have actual or default value
Error (10784): HDL error at NIOS.vhd(10665): see declaration for object "in_port_to_the_Read_Relays"
Error (10346): VHDL error at REU_TOP_MII.vhd(850): formal port or parameter "in_port_to_the_Switch_Mode" must have actual or default value
Error (10784): HDL error at NIOS.vhd(10678): see declaration for object "in_port_to_the_Switch_Mode"
Error (10346): VHDL error at REU_TOP_MII.vhd(850): formal port or parameter "in_port_to_the_Version" must have actual or default value
Error (10784): HDL error at NIOS.vhd(10684): see declaration for object "in_port_to_the_Version"
Error (10346): VHDL error at REU_TOP_MII.vhd(850): formal port or parameter "in_port_to_the_mdio_in_phy1" must have actual or default value
Error (10784): HDL error at NIOS.vhd(10687): see declaration for object "in_port_to_the_mdio_in_phy1"
Error (10346): VHDL error at REU_TOP_MII.vhd(850): formal port or parameter "in_port_to_the_mdio_in_phy2" must have actual or default value
Error (10784): HDL error at NIOS.vhd(10690): see declaration for object "in_port_to_the_mdio_in_phy2"
Error (10346): VHDL error at REU_TOP_MII.vhd(850): formal port or parameter "rxd_to_the_uart_0" must have actual or default value
Error (10784): HDL error at NIOS.vhd(10717): see declaration for object "rxd_to_the_uart_0"
Error: Quartus II 32-bit Analysis & Synthesis was unsuccessful. 19 errors, 3 warnings
	Error: Peak virtual memory: 323 megabytes
	Error: Processing ended: Tue Jan 14 16:26:38 2014
	Error: Elapsed time: 00:00:10
	Error: Total CPU time (on all processors): 00:00:08