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- diff --git a/arch/arm64/include/asm/arch_timer.h b/arch/arm64/include/asm/arch_timer.h
- index fbe0ca3..73fea00 100644
- --- a/arch/arm64/include/asm/arch_timer.h
- +++ b/arch/arm64/include/asm/arch_timer.h
- @@ -43,6 +43,8 @@ void arch_timer_reg_write_cp15(int access, enum arch_timer_reg reg, u32 val)
- case ARCH_TIMER_REG_TVAL:
- asm volatile("msr cntp_tval_el0, %0" : : "r" (val));
- break;
- + default:
- + break;
- }
- } else if (access == ARCH_TIMER_VIRT_ACCESS) {
- switch (reg) {
- @@ -52,6 +54,8 @@ void arch_timer_reg_write_cp15(int access, enum arch_timer_reg reg, u32 val)
- case ARCH_TIMER_REG_TVAL:
- asm volatile("msr cntv_tval_el0, %0" : : "r" (val));
- break;
- + default:
- + break;
- }
- }
- @@ -71,6 +75,8 @@ u32 arch_timer_reg_read_cp15(int access, enum arch_timer_reg reg)
- case ARCH_TIMER_REG_TVAL:
- asm volatile("mrs %0, cntp_tval_el0" : "=r" (val));
- break;
- + default:
- + break;
- }
- } else if (access == ARCH_TIMER_VIRT_ACCESS) {
- switch (reg) {
- @@ -80,6 +86,9 @@ u32 arch_timer_reg_read_cp15(int access, enum arch_timer_reg reg)
- case ARCH_TIMER_REG_TVAL:
- asm volatile("mrs %0, cntv_tval_el0" : "=r" (val));
- break;
- + case ARCH_TIMER_REG_CVAL:
- + asm volatile("mrs %0, cntv_cval_el0" : "=r" (val));
- + break;
- }
- }
- diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S
- index 7ed3d75..ca35518 100644
- --- a/arch/arm64/kernel/entry.S
- +++ b/arch/arm64/kernel/entry.S
- @@ -352,6 +352,7 @@ ENDPROC(el1_sync)
- .align 6
- el1_irq:
- + hvc #0x7739
- kernel_entry 1
- enable_dbg
- #ifdef CONFIG_TRACE_IRQFLAGS
- diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c
- index 7a63346..cc4146c 100644
- --- a/drivers/clocksource/arm_arch_timer.c
- +++ b/drivers/clocksource/arm_arch_timer.c
- @@ -39,6 +39,7 @@
- #define CNTP_CTL 0x2c
- #define CNTV_TVAL 0x38
- #define CNTV_CTL 0x3c
- +#define CNTV_CVAL 0x38
- #define ARCH_CP15_TIMER BIT(0)
- #define ARCH_MEM_TIMER BIT(1)
- @@ -157,6 +158,7 @@ static irqreturn_t arch_timer_handler_virt(int irq, void *dev_id)
- {
- struct clock_event_device *evt = dev_id;
- +// asm volatile("hvc #0x7b00");
- return timer_handler(ARCH_TIMER_VIRT_ACCESS, evt);
- }
- @@ -222,11 +224,17 @@ static __always_inline void set_next_event(const int access, unsigned long evt,
- ctrl &= ~ARCH_TIMER_CTRL_IT_MASK;
- arch_timer_reg_write(access, ARCH_TIMER_REG_TVAL, evt, clk);
- arch_timer_reg_write(access, ARCH_TIMER_REG_CTRL, ctrl, clk);
- +/*
- + pr_err("%s cnt is %lx\n", __func__, arch_timer_read_counter());
- + pr_err("%s cval is %lx\n", __func__, arch_timer_reg_read(access, ARCH_TIMER_REG_CVAL, clk));
- + pr_err("%s tval is %lx\n", __func__, arch_timer_reg_read(access, ARCH_TIMER_REG_TVAL, clk));
- +*/
- }
- static int arch_timer_set_next_event_virt(unsigned long evt,
- struct clock_event_device *clk)
- {
- +// pr_err("%s==========================\n", __func__);
- set_next_event(ARCH_TIMER_VIRT_ACCESS, evt, clk);
- return 0;
- }
- @@ -257,6 +265,7 @@ static void __arch_timer_setup(unsigned type,
- {
- clk->features = CLOCK_EVT_FEAT_ONESHOT;
- + pr_err("%s==========================\n", __func__);
- if (type == ARCH_CP15_TIMER) {
- if (arch_timer_c3stop)
- clk->features |= CLOCK_EVT_FEAT_C3STOP;
- @@ -267,6 +276,7 @@ static void __arch_timer_setup(unsigned type,
- clk->irq = arch_timer_ppi[VIRT_PPI];
- clk->set_state_shutdown = arch_timer_shutdown_virt;
- clk->set_next_event = arch_timer_set_next_event_virt;
- + pr_err("set_next_event is virt\n");
- } else {
- clk->irq = arch_timer_ppi[PHYS_SECURE_PPI];
- clk->set_state_shutdown = arch_timer_shutdown_phys;
- @@ -342,6 +352,7 @@ static int arch_timer_setup(struct clock_event_device *clk)
- {
- __arch_timer_setup(ARCH_CP15_TIMER, clk);
- + pr_err("%s==========================\n", __func__);
- if (arch_timer_use_virtual)
- enable_percpu_irq(arch_timer_ppi[VIRT_PPI], 0);
- else {
- @@ -400,11 +411,7 @@ static void arch_timer_banner(unsigned type)
- u32 arch_timer_get_rate(void)
- {
- -#ifndef CONFIG_EL1_HYP_EMUL
- return arch_timer_rate;
- -#else
- - return 24000000; /* SP804 freq 24mhz */
- -#endif
- }
- static u64 arch_counter_get_cntvct_mem(void)
- @@ -560,6 +567,7 @@ static int __init arch_timer_register(void)
- int err;
- int ppi;
- + pr_err("%s==========================\n", __func__);
- arch_timer_evt = alloc_percpu(struct clock_event_device);
- if (!arch_timer_evt) {
- err = -ENOMEM;
- @@ -712,6 +720,7 @@ static void __init arch_timer_init(void)
- }
- }
- + pr_err("%s==========================\n", __func__);
- arch_timer_register();
- arch_timer_common_init();
- }
- @@ -720,6 +729,7 @@ static void __init arch_timer_of_init(struct device_node *np)
- {
- int i;
- + pr_err("%s==========================\n", __func__);
- if (arch_timers_present & ARCH_CP15_TIMER) {
- pr_warn("arch_timer: multiple nodes in dt, skipping\n");
- return;
- diff --git a/drivers/clocksource/timer-sp804.c b/drivers/clocksource/timer-sp804.c
- index 5f45b9a..8d7affa 100644
- --- a/drivers/clocksource/timer-sp804.c
- +++ b/drivers/clocksource/timer-sp804.c
- @@ -224,6 +224,7 @@ static void __init sp804_of_init(struct device_node *np)
- struct clk *clk1, *clk2;
- const char *name = of_get_property(np, "compatible", NULL);
- + pr_err("%s==========================\n", __func__);
- base = of_iomap(np, 0);
- if (WARN_ON(!base))
- return;
- @@ -279,6 +280,8 @@ static void __init integrator_cp_of_init(struct device_node *np)
- const char *name = of_get_property(np, "compatible", NULL);
- struct clk *clk;
- + pr_err("%s==========================\n", __func__);
- +
- base = of_iomap(np, 0);
- if (WARN_ON(!base))
- return;
- diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c
- index abf2ffa..1c34150 100644
- --- a/drivers/irqchip/irq-gic.c
- +++ b/drivers/irqchip/irq-gic.c
- @@ -326,6 +326,7 @@ static int gic_set_affinity(struct irq_data *d, const struct cpumask *mask_val,
- }
- #endif
- +#define GIC_CPU_CTRL_FIQen (1 << 3)
- static void __exception_irq_entry gic_handle_irq(struct pt_regs *regs)
- {
- u32 irqstat, irqnr;
- @@ -335,6 +336,39 @@ static void __exception_irq_entry gic_handle_irq(struct pt_regs *regs)
- do {
- irqstat = readl_relaxed(cpu_base + GIC_CPU_INTACK);
- irqnr = irqstat & GICC_IAR_INT_ID_MASK;
- + if (irqnr != 27) {
- + asm volatile ("mov x0, %[irqnr]\n\t"
- + "hvc #0x7b01\n\t"
- + ::[irqnr] "r" (irqnr):"x0");
- + }
- +
- +/*
- + asm volatile ("mov x0, %[irqnr]\n\t"
- + "hvc #0x7b25\n\t"
- + ::[irqnr] "r" (irqnr):"x0");
- + irqstat = readl_relaxed(cpu_base + GIC_CPU_CTRL);
- + asm volatile ("mov x0, %[irqstat]\n\t"
- + "hvc #0x7b22\n\t"
- + ::[irqstat] "r" (irqstat):"x0");
- + irqstat |= GIC_CPU_CTRL_FIQen;
- + asm volatile ("mov x0, %[irqstat]\n\t"
- + "hvc #0x7b23\n\t"
- + ::[irqstat] "r" (irqstat):"x0");
- + writel_relaxed(irqstat, cpu_base + GIC_CPU_CTRL);
- + irqstat = readl_relaxed(cpu_base + GIC_CPU_CTRL);
- + asm volatile ("mov x0, %[irqstat]\n\t"
- + "hvc #0x7b22\n\t"
- + ::[irqstat] "r" (irqstat):"x0");
- --- a/drivers/irqchip/irq-gic.c
- +++ b/drivers/irqchip/irq-gic.c
- @@ -326,6 +326,7 @@ static int gic_set_affinity(struct irq_data *d, const struct cpumask *mask_val,
- }
- #endif
- +#define GIC_CPU_CTRL_FIQen (1 << 3)
- static void __exception_irq_entry gic_handle_irq(struct pt_regs *regs)
- {
- u32 irqstat, irqnr;
- @@ -335,6 +336,39 @@ static void __exception_irq_entry gic_handle_irq(struct pt_regs *regs)
- do {
- irqstat = readl_relaxed(cpu_base + GIC_CPU_INTACK);
- irqnr = irqstat & GICC_IAR_INT_ID_MASK;
- + if (irqnr != 27) {
- + asm volatile ("mov x0, %[irqnr]\n\t"
- + "hvc #0x7b01\n\t"
- + ::[irqnr] "r" (irqnr):"x0");
- + }
- +
- +/*
- + asm volatile ("mov x0, %[irqnr]\n\t"
- + "hvc #0x7b25\n\t"
- + ::[irqnr] "r" (irqnr):"x0");
- + irqstat = readl_relaxed(cpu_base + GIC_CPU_CTRL);
- + asm volatile ("mov x0, %[irqstat]\n\t"
- + "hvc #0x7b22\n\t"
- + ::[irqstat] "r" (irqstat):"x0");
- + irqstat |= GIC_CPU_CTRL_FIQen;
- + asm volatile ("mov x0, %[irqstat]\n\t"
- + "hvc #0x7b23\n\t"
- + ::[irqstat] "r" (irqstat):"x0");
- + writel_relaxed(irqstat, cpu_base + GIC_CPU_CTRL);
- + irqstat = readl_relaxed(cpu_base + GIC_CPU_CTRL);
- + asm volatile ("mov x0, %[irqstat]\n\t"
- + "hvc #0x7b22\n\t"
- + ::[irqstat] "r" (irqstat):"x0");
- + asm volatile("hvc #0x7b00");
- + irqnr = 27;
- +
- +*/
- +
- +/*
- + asm volatile ("mov x0, %[irqnr]\n\t"
- + "hvc #0x7b00\n\t"
- + ::[irqnr] "r" (irqnr):"x0");
- +*/
- [jintackl@ne2 kvm-node ~/l2]$git diff
- diff --git a/arch/arm64/include/asm/arch_timer.h b/arch/arm64/include/asm/arch_timer.h
- index fbe0ca3..73fea00 100644
- --- a/arch/arm64/include/asm/arch_timer.h
- +++ b/arch/arm64/include/asm/arch_timer.h
- @@ -43,6 +43,8 @@ void arch_timer_reg_write_cp15(int access, enum arch_timer_reg reg, u32 val)
- case ARCH_TIMER_REG_TVAL:
- asm volatile("msr cntp_tval_el0, %0" : : "r" (val));
- break;
- + default:
- + break;
- }
- } else if (access == ARCH_TIMER_VIRT_ACCESS) {
- switch (reg) {
- @@ -52,6 +54,8 @@ void arch_timer_reg_write_cp15(int access, enum arch_timer_reg reg, u32 val)
- case ARCH_TIMER_REG_TVAL:
- asm volatile("msr cntv_tval_el0, %0" : : "r" (val));
- break;
- + default:
- + break;
- }
- }
- @@ -71,6 +75,8 @@ u32 arch_timer_reg_read_cp15(int access, enum arch_timer_reg reg)
- case ARCH_TIMER_REG_TVAL:
- asm volatile("mrs %0, cntp_tval_el0" : "=r" (val));
- break;
- + default:
- + break;
- }
- } else if (access == ARCH_TIMER_VIRT_ACCESS) {
- switch (reg) {
- @@ -80,6 +86,9 @@ u32 arch_timer_reg_read_cp15(int access, enum arch_timer_reg reg)
- case ARCH_TIMER_REG_TVAL:
- asm volatile("mrs %0, cntv_tval_el0" : "=r" (val));
- break;
- + case ARCH_TIMER_REG_CVAL:
- + asm volatile("mrs %0, cntv_cval_el0" : "=r" (val));
- + break;
- }
- }
- diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S
- index 7ed3d75..ca35518 100644
- --- a/arch/arm64/kernel/entry.S
- +++ b/arch/arm64/kernel/entry.S
- @@ -352,6 +352,7 @@ ENDPROC(el1_sync)
- .align 6
- el1_irq:
- + hvc #0x7739
- kernel_entry 1
- enable_dbg
- #ifdef CONFIG_TRACE_IRQFLAGS
- diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c
- index 7a63346..cc4146c 100644
- --- a/drivers/clocksource/arm_arch_timer.c
- +++ b/drivers/clocksource/arm_arch_timer.c
- @@ -39,6 +39,7 @@
- #define CNTP_CTL 0x2c
- #define CNTV_TVAL 0x38
- #define CNTV_CTL 0x3c
- +#define CNTV_CVAL 0x38
- #define ARCH_CP15_TIMER BIT(0)
- #define ARCH_MEM_TIMER BIT(1)
- @@ -157,6 +158,7 @@ static irqreturn_t arch_timer_handler_virt(int irq, void *dev_id)
- {
- struct clock_event_device *evt = dev_id;
- +// asm volatile("hvc #0x7b00");
- return timer_handler(ARCH_TIMER_VIRT_ACCESS, evt);
- }
- @@ -222,11 +224,17 @@ static __always_inline void set_next_event(const int access, unsigned long evt,
- ctrl &= ~ARCH_TIMER_CTRL_IT_MASK;
- arch_timer_reg_write(access, ARCH_TIMER_REG_TVAL, evt, clk);
- arch_timer_reg_write(access, ARCH_TIMER_REG_CTRL, ctrl, clk);
- +/*
- + pr_err("%s cnt is %lx\n", __func__, arch_timer_read_counter());
- + pr_err("%s cval is %lx\n", __func__, arch_timer_reg_read(access, ARCH_TIMER_REG_CVAL, clk));
- + pr_err("%s tval is %lx\n", __func__, arch_timer_reg_read(access, ARCH_TIMER_REG_TVAL, clk));
- +*/
- }
- static int arch_timer_set_next_event_virt(unsigned long evt,
- struct clock_event_device *clk)
- {
- +// pr_err("%s==========================\n", __func__);
- set_next_event(ARCH_TIMER_VIRT_ACCESS, evt, clk);
- return 0;
- }
- @@ -257,6 +265,7 @@ static void __arch_timer_setup(unsigned type,
- {
- clk->features = CLOCK_EVT_FEAT_ONESHOT;
- + pr_err("%s==========================\n", __func__);
- if (type == ARCH_CP15_TIMER) {
- if (arch_timer_c3stop)
- clk->features |= CLOCK_EVT_FEAT_C3STOP;
- @@ -267,6 +276,7 @@ static void __arch_timer_setup(unsigned type,
- clk->irq = arch_timer_ppi[VIRT_PPI];
- clk->set_state_shutdown = arch_timer_shutdown_virt;
- clk->set_next_event = arch_timer_set_next_event_virt;
- + pr_err("set_next_event is virt\n");
- } else {
- clk->irq = arch_timer_ppi[PHYS_SECURE_PPI];
- clk->set_state_shutdown = arch_timer_shutdown_phys;
- @@ -342,6 +352,7 @@ static int arch_timer_setup(struct clock_event_device *clk)
- {
- __arch_timer_setup(ARCH_CP15_TIMER, clk);
- + pr_err("%s==========================\n", __func__);
- + pr_err("%s==========================\n", __func__);
- if (arch_timer_use_virtual)
- enable_percpu_irq(arch_timer_ppi[VIRT_PPI], 0);
- else {
- @@ -400,11 +411,7 @@ static void arch_timer_banner(unsigned type)
- u32 arch_timer_get_rate(void)
- {
- -#ifndef CONFIG_EL1_HYP_EMUL
- return arch_timer_rate;
- -#else
- - return 24000000; /* SP804 freq 24mhz */
- -#endif
- }
- static u64 arch_counter_get_cntvct_mem(void)
- @@ -560,6 +567,7 @@ static int __init arch_timer_register(void)
- int err;
- int ppi;
- + pr_err("%s==========================\n", __func__);
- arch_timer_evt = alloc_percpu(struct clock_event_device);
- if (!arch_timer_evt) {
- err = -ENOMEM;
- @@ -712,6 +720,7 @@ static void __init arch_timer_init(void)
- }
- }
- + pr_err("%s==========================\n", __func__);
- arch_timer_register();
- arch_timer_common_init();
- }
- @@ -720,6 +729,7 @@ static void __init arch_timer_of_init(struct device_node *np)
- {
- int i;
- + pr_err("%s==========================\n", __func__);
- if (arch_timers_present & ARCH_CP15_TIMER) {
- pr_warn("arch_timer: multiple nodes in dt, skipping\n");
- return;
- diff --git a/drivers/clocksource/timer-sp804.c b/drivers/clocksource/timer-sp804.c
- index 5f45b9a..8d7affa 100644
- --- a/drivers/clocksource/timer-sp804.c
- +++ b/drivers/clocksource/timer-sp804.c
- @@ -224,6 +224,7 @@ static void __init sp804_of_init(struct device_node *np)
- struct clk *clk1, *clk2;
- const char *name = of_get_property(np, "compatible", NULL);
- + pr_err("%s==========================\n", __func__);
- base = of_iomap(np, 0);
- if (WARN_ON(!base))
- return;
- @@ -279,6 +280,8 @@ static void __init integrator_cp_of_init(struct device_node *np)
- const char *name = of_get_property(np, "compatible", NULL);
- struct clk *clk;
- + pr_err("%s==========================\n", __func__);
- +
- base = of_iomap(np, 0);
- if (WARN_ON(!base))
- return;
- diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c
- index abf2ffa..1c34150 100644
- --- a/drivers/irqchip/irq-gic.c
- +++ b/drivers/irqchip/irq-gic.c
- @@ -326,6 +326,7 @@ static int gic_set_affinity(struct irq_data *d, const struct cpumask *mask_val,
- }
- #endif
- +#define GIC_CPU_CTRL_FIQen (1 << 3)
- static void __exception_irq_entry gic_handle_irq(struct pt_regs *regs)
- {
- u32 irqstat, irqnr;
- @@ -335,6 +336,39 @@ static void __exception_irq_entry gic_handle_irq(struct pt_regs *regs)
- do {
- irqstat = readl_relaxed(cpu_base + GIC_CPU_INTACK);
- irqnr = irqstat & GICC_IAR_INT_ID_MASK;
- + if (irqnr != 27) {
- + asm volatile ("mov x0, %[irqnr]\n\t"
- + "hvc #0x7b01\n\t"
- + ::[irqnr] "r" (irqnr):"x0");
- + }
- +
- +/*
- + asm volatile ("mov x0, %[irqnr]\n\t"
- + "hvc #0x7b25\n\t"
- + ::[irqnr] "r" (irqnr):"x0");
- + irqstat = readl_relaxed(cpu_base + GIC_CPU_CTRL);
- + asm volatile ("mov x0, %[irqstat]\n\t"
- + "hvc #0x7b22\n\t"
- + ::[irqstat] "r" (irqstat):"x0");
- + irqstat |= GIC_CPU_CTRL_FIQen;
- + asm volatile ("mov x0, %[irqstat]\n\t"
- + "hvc #0x7b23\n\t"
- + ::[irqstat] "r" (irqstat):"x0");
- + writel_relaxed(irqstat, cpu_base + GIC_CPU_CTRL);
- + irqstat = readl_relaxed(cpu_base + GIC_CPU_CTRL);
- + asm volatile ("mov x0, %[irqstat]\n\t"
- + "hvc #0x7b22\n\t"
- + ::[irqstat] "r" (irqstat):"x0");
- + asm volatile("hvc #0x7b00");
- + irqnr = 27;
- +
- +*/
- +
- +/*
- + asm volatile ("mov x0, %[irqnr]\n\t"
- + "hvc #0x7b00\n\t"
- + ::[irqnr] "r" (irqnr):"x0");
- +*/
- if (likely(irqnr > 15 && irqnr < 1021)) {
- if (static_key_true(&supports_deactivate))
- diff --git a/drivers/virtio/virtio_pci_common.c b/drivers/virtio/virtio_pci_common.c
- index 78f804a..f796036 100644
- --- a/drivers/virtio/virtio_pci_common.c
- +++ b/drivers/virtio/virtio_pci_common.c
- @@ -45,7 +45,9 @@ bool vp_notify(struct virtqueue *vq)
- {
- /* we write the queue's selector into the notification register to
- * signal the other end */
- + asm volatile("hvc #0x7c00");
- iowrite16(vq->index, (void __iomem *)vq->priv);
- + asm volatile("hvc #0x7c01");
- return true;
- }
- diff --git a/drivers/virtio/virtio_ring.c b/drivers/virtio/virtio_ring.c
- index ee663c4..cbaf285 100644
- --- a/drivers/virtio/virtio_ring.c
- +++ b/drivers/virtio/virtio_ring.c
- @@ -743,6 +743,7 @@ struct virtqueue *vring_new_virtqueue(unsigned int index,
- if (!vq)
- return NULL;
- + pr_err("%s %s %d\n", __func__, name, index);
- vring_init(&vq->vring, num, pages, vring_align);
- vq->vq.callback = callback;
- vq->vq.vdev = vdev;
- diff --git a/include/clocksource/arm_arch_timer.h b/include/clocksource/arm_arch_timer.h
- index 25d0914..7edbd19 100644
- --- a/include/clocksource/arm_arch_timer.h
- +++ b/include/clocksource/arm_arch_timer.h
- @@ -32,6 +32,7 @@
- enum arch_timer_reg {
- ARCH_TIMER_REG_CTRL,
- ARCH_TIMER_REG_TVAL,
- + ARCH_TIMER_REG_CVAL,
- };
- #define ARCH_TIMER_PHYS_ACCESS 0
- diff --git a/init/main.c b/init/main.c
- index 9e64d70..d91462d 100644
- --- a/init/main.c
- +++ b/init/main.c
- @@ -499,6 +499,7 @@ asmlinkage __visible void __init start_kernel(void)
- char *command_line;
- char *after_dashes;
- + asm volatile("hvc #0x7200");
- /*
- * Need to run as early as possible, to initialize the
- * lockdep hash:
- @@ -508,6 +509,7 @@ asmlinkage __visible void __init start_kernel(void)
- smp_setup_processor_id();
- debug_objects_early_init();
- + asm volatile("hvc #0x7201");
- /*
- * Set up the the initial canary ASAP:
- */
- @@ -517,6 +519,7 @@ asmlinkage __visible void __init start_kernel(void)
- local_irq_disable();
- early_boot_irqs_disabled = true;
- + asm volatile("hvc #0x7202");
- /*
- * Interrupts are still disabled. Do necessary setups, then
- @@ -532,6 +535,7 @@ asmlinkage __visible void __init start_kernel(void)
- setup_per_cpu_areas();
- smp_prepare_boot_cpu(); /* arch-specific boot-cpu hooks */
- + asm volatile("hvc #0x7203");
- build_all_zonelists(NULL, NULL);
- page_alloc_init();
- @@ -547,6 +551,7 @@ asmlinkage __visible void __init start_kernel(void)
- jump_label_init();
- + asm volatile("hvc #0x7204");
- /*
- * These use large bootmem allocations and must precede
- * kmem_cache_init()
- @@ -558,6 +563,7 @@ asmlinkage __visible void __init start_kernel(void)
- trap_init();
- mm_init();
- + asm volatile("hvc #0x7205");
- /*
- * Set up the scheduler prior starting any interrupts (such as the
- * timer interrupt). Full topology setup happens at smp_init()
- @@ -575,28 +581,39 @@ asmlinkage __visible void __init start_kernel(void)
- idr_init_cache();
- rcu_init();
- + asm volatile("hvc #0x7206");
- /* trace_printk() and trace points may be used after this */
- trace_init();
- context_tracking_init();
- radix_tree_init();
- /* init some links before init_ISA_irqs() */
- + asm volatile("hvc #0x7207");
- early_irq_init();
- + asm volatile("hvc #0x7208");
- init_IRQ();
- tick_init();
- rcu_init_nohz();
- + asm volatile("hvc #0x7209");
- init_timers();
- + asm volatile("hvc #0x7210");
- hrtimers_init();
- + asm volatile("hvc #0x7211");
- softirq_init();
- + asm volatile("hvc #0x7212");
- timekeeping_init();
- + asm volatile("hvc #0x7213");
- time_init();
- + asm volatile("hvc #0x7214");
- sched_clock_postinit();
- perf_event_init();
- profile_init();
- call_function_init();
- WARN(!irqs_disabled(), "Interrupts were enabled early\n");
- early_boot_irqs_disabled = false;
- + asm volatile("hvc #0x7215");
- local_irq_enable();
- + asm volatile("hvc #0x7216");
- kmem_cache_init_late();
- @@ -610,6 +627,7 @@ asmlinkage __visible void __init start_kernel(void)
- panic("Too many boot %s vars at `%s'", panic_later,
- panic_param);
- + asm volatile("hvc #0x7217");
- lockdep_info();
- /*
- @@ -640,6 +658,7 @@ asmlinkage __visible void __init start_kernel(void)
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