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- root@EPY00:~# lspci -vv -s 0000:c0:01.1
- c0:01.1 PCI bridge: Advanced Micro Devices, Inc. [AMD] Starship/Matisse GPP Bridge (prog-if 00 [Normal decode])
- Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+
- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
- Latency: 0, Cache Line Size: 64 bytes
- Interrupt: pin ? routed to IRQ 70
- NUMA node: 1
- IOMMU group: 87
- Bus: primary=c0, secondary=c1, subordinate=c1, sec-latency=0
- I/O behind bridge: 0000d000-0000dfff [size=4K]
- Memory behind bridge: 9c000000-9c1fffff [size=2M]
- Prefetchable memory behind bridge: [disabled]
- Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR-
- BridgeCtl: Parity- SERR+ NoISA- VGA- VGA16+ MAbort- >Reset- FastB2B-
- PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
- Capabilities: [50] Power Management version 3
- Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
- Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
- Capabilities: [58] Express (v2) Root Port (Slot+), MSI 00
- DevCap: MaxPayload 512 bytes, PhantFunc 0
- ExtTag+ RBE+
- DevCtl: CorrErr+ NonFatalErr+ FatalErr+ UnsupReq-
- RlxdOrd+ ExtTag+ PhantFunc- AuxPwr- NoSnoop+
- MaxPayload 512 bytes, MaxReadReq 512 bytes
- DevSta: CorrErr- NonFatalErr- FatalErr- UnsupReq- AuxPwr- TransPend-
- LnkCap: Port #0, Speed 16GT/s, Width x8, ASPM L1, Exit Latency L1 <64us
- ClockPM- Surprise- LLActRep+ BwNot+ ASPMOptComp+
- LnkCtl: ASPM Disabled; RCB 64 bytes, Disabled- CommClk+
- ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
- LnkSta: Speed 8GT/s (downgraded), Width x4 (downgraded)
- TrErr- Train- SlotClk+ DLActive+ BWMgmt+ ABWMgmt-
- SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surprise-
- Slot #3, PowerLimit 75.000W; Interlock- NoCompl+
- SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-
- Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock-
- SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock-
- Changed: MRL- PresDet- LinkState-
- RootCap: CRSVisible+
- RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna+ CRSVisible+
- RootSta: PME ReqID 0000, PMEStatus- PMEPending-
- DevCap2: Completion Timeout: Range ABCD, TimeoutDis+ NROPrPrP- LTR-
- 10BitTagComp- 10BitTagReq- OBFF Not Supported, ExtFmt+ EETLPPrefix+, MaxEETLPPrefixes 1
- EmergencyPowerReduction Not Supported, EmergencyPowerReductionInit-
- FRS- LN System CLS Not Supported, TPHComp- ExtTPHComp- ARIFwd+
- AtomicOpsCap: Routing- 32bit+ 64bit+ 128bitCAS-
- DevCtl2: Completion Timeout: 65ms to 210ms, TimeoutDis- LTR- OBFF Disabled, ARIFwd+
- AtomicOpsCtl: ReqEn- EgressBlck-
- LnkCap2: Supported Link Speeds: 2.5-16GT/s, Crosslink- Retimer+ 2Retimers+ DRS-
- LnkCtl2: Target Link Speed: 16GT/s, EnterCompliance- SpeedDis-
- Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
- Compliance De-emphasis: -6dB
- LnkSta2: Current De-emphasis Level: -3.5dB, EqualizationComplete+ EqualizationPhase1+
- EqualizationPhase2+ EqualizationPhase3+ LinkEqualizationRequest-
- Retimer- 2Retimers- CrosslinkRes: unsupported
- Capabilities: [a0] MSI: Enable+ Count=1/1 Maskable- 64bit+
- Address: 00000000fee00000 Data: 0000
- Capabilities: [c0] Subsystem: Gigabyte Technology Co., Ltd Starship/Matisse GPP Bridge
- Capabilities: [c8] HyperTransport: MSI Mapping Enable+ Fixed+
- Capabilities: [100 v1] Vendor Specific Information: ID=0001 Rev=1 Len=010 <?>
- Capabilities: [270 v1] Secondary PCI Express
- LnkCtl3: LnkEquIntrruptEn- PerformEqu-
- LaneErrStat: 0
- Capabilities: [370 v1] L1 PM Substates
- L1SubCap: PCI-PM_L1.2- PCI-PM_L1.1+ ASPM_L1.2- ASPM_L1.1+ L1_PM_Substates+
- L1SubCtl1: PCI-PM_L1.2- PCI-PM_L1.1- ASPM_L1.2- ASPM_L1.1-
- L1SubCtl2:
- Capabilities: [380 v1] Downstream Port Containment
- DpcCap: INT Msg #0, RPExt+ PoisonedTLP+ SwTrigger+ RP PIO Log 6, DL_ActiveErr+
- DpcCtl: Trigger:0 Cmpl- INT- ErrCor- PoisonedTLP- SwTrigger- DL_ActiveErr-
- DpcSta: Trigger- Reason:00 INT- RPBusy- TriggerExt:00 RP PIO ErrPtr:1f
- Source: 0000
- Capabilities: [400 v1] Data Link Feature <?>
- Capabilities: [410 v1] Physical Layer 16.0 GT/s <?>
- Capabilities: [440 v1] Lane Margining at the Receiver <?>
- Kernel driver in use: pcieport
- root@EPY00:~# lspci -vv -s 0000:c0:01.1 | grep x4
- LnkSta: Speed 8GT/s (downgraded), Width x4 (downgraded)
- root@EPY00:~# lspci -vv -s 0000:c0:01.1 | grep x4 -A 15
- LnkSta: Speed 8GT/s (downgraded), Width x4 (downgraded)
- TrErr- Train- SlotClk+ DLActive+ BWMgmt+ ABWMgmt-
- SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surprise-
- Slot #3, PowerLimit 75.000W; Interlock- NoCompl+
- SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-
- Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock-
- SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock-
- Changed: MRL- PresDet- LinkState-
- RootCap: CRSVisible+
- RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna+ CRSVisible+
- RootSta: PME ReqID 0000, PMEStatus- PMEPending-
- DevCap2: Completion Timeout: Range ABCD, TimeoutDis+ NROPrPrP- LTR-
- 10BitTagComp- 10BitTagReq- OBFF Not Supported, ExtFmt+ EETLPPrefix+, MaxEETLPPrefixes 1
- EmergencyPowerReduction Not Supported, EmergencyPowerReductionInit-
- FRS- LN System CLS Not Supported, TPHComp- ExtTPHComp- ARIFwd+
- AtomicOpsCap: Routing- 32bit+ 64bit+ 128bitCAS-
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