ORG 0
ivt_start:
    b reset         ; RESET 0x00000000, Reset
    b undef_short   ; UNDEF 0x00000004, Undefined Instruction
    b swi_short     ; SWI   0x00000008, Software Interrupt
    b pabt_short    ; PABT  0x0000000C, Prefetch Abort

    b dabt_short    ; DABT  0x00000010, Data Abort
    b rsv_short     ; RSV   0x00000014, Reserved
    b irq_short     ; IRQ   0x00000018, Interrupt Request
    b fig_short     ; FIQ   0x0000001C, Fast Interrupt Request

    undef_isr_addr: dd hang
    swi_isr_addr:   dd hang
    pabt_isr_addr:  dd hang
    dabt_isr_addr:  dd hang
    rsv_isr_addr:   dd hang
    irq_isr_addr:   dd irq_isr
    fig_isr_addr:   dd hang

undef_short:
    mov r0, 0x10000
    ldr r1, [undef_isr_addr]
    add r1, r0
    mov pc, r1
swi_short:
    mov r0, 0x10000
    ldr r1, [swi_isr_addr]
    add r1, r0
    mov pc, r1
pabt_short:
    mov r0, 0x10000
    ldr r1, [pabt_isr_addr]
    add r1, r0
    mov pc, r1
dabt_short:
    mov r0, 0x10000
    ldr r1, [dabt_isr_addr]
    add r1, r0
    mov pc, r1
rsv_short:
    mov r0, 0x10000
    ldr r1, [rsv_isr_addr]
    add r1, r0
    mov pc, r1
irq_short:
    mov r0, 0x10000
    ldr r1, [irq_isr_addr]
    add r1, r0
    mov pc, r1
fig_short:
    mov r0, 0x10000
    ldr r1, [fig_isr_addr]
    add r1, r0
    mov pc, r1
ivt_end:
    ;***************
    ;* Timer MMIO  *
    ;***************
    TIMER_CVR    EQU 0x04 ; Current Value Register, TimerXValue
    TIMER_CR     EQU 0x08 ; Control Register, TimerXControl
    TIMER_INTCLR EQU 0x0C ; Interrupt Clear Register, TimerXIntClr
    TIMER_BGLOAD EQU 0x18 ; Background Load Register
    ;*************
    ;* Uart MMIO *
    ;*************
    UART_CR      EQU 0x30 ; Control Register
    UART_ICR     EQU 0x44 ; Interrupt Clear Register
    UART_FR      EQU 0x18 ; Flag Register
    UART_IMSC    EQU 0x38 ; Interrupt Mask Register
    UART_ICR     EQU 0x44 ; Interrupt Clear Register

;*********************************
;* IRQ Interrupt Service Routine *
;*********************************
irq_isr:
    push {r0-r12, r14}
    ldr r0, [VIC_IRQSTATUS]
    ldr r1, [r0]
    ; Timer0 IRQ Source Check
    ands r1, #0x10
    bne irq_isr_timer
    ldr r1, [r0]
    ; UART IRQ Source Check
    ands r1, #0x1000
    bne irq_isr_uart
    b done
UART_CHAR_RX dw 0
irq_isr_uart:
    ldr r0, [UART_BASE]
    ldr r1, [r0]
    str r1, [UART_CHAR_RX]
    bl uart_put32

    ldr r0, [UART_BASE]
    mov r1, #0x10
; Reseting the IRQ source (?) fucks up the futher Rx?
;    str r1, [r0, UART_ICR]

    pop {r0-r12, r14}
    subs pc, r14, #4
irq_isr_timer:
; Any write to INTCLR clears the timer interrupt.
    ldr r0, [TIMER_BASE]
    str r1, [r0, TIMER_INTCLR]
done:
    pop {r0-r12, r14}
    subs pc, r14, #4

reset:
    mov sp, #0x20000
    mov r0, #0x10000
    mov r1, #0
    mov r10, ivt_end - ivt_start
    lsr r10, #3
relocate:
    ldmia r0!, {r2, r3, r4, r5, r6, r7, r8, r9}
    stmia r1!, {r2, r3, r4, r5, r6, r7, r8, r9}
    subs r10, #1
    bne relocate