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Feb 7th, 2022
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  1. #include <msp430.h>
  2. #include <stdbool.h>
  3. #include <stdint.h>
  4.  
  5. /**
  6. * blink.c
  7. */
  8.  
  9. #define gb_pcf8574_WADDR 0b0111111 //Slave Write
  10. #define gb_pcf8574_RADDR 0b01111111 //Slave Read
  11.  
  12. #define SSD1306_WA 0b0111100
  13. void clock_init()
  14. {
  15.  
  16. DCOCTL = 0; // Select lowest DCOx and MODx settings
  17. BCSCTL1 = CALBC1_1MHZ; /* BCSCTL1 Calibration Data for 1MHz */
  18. DCOCTL = CALDCO_1MHZ; /* DCOCTL Calibration Data for 1MHz */
  19. // So DCO is main clock source whose value is 1mhz,
  20. BCSCTL2 &= ~( SELS | DIVS0 | DIVS1);
  21. //now SMCLK will be used for periphrals, smclk by default is derived from dcoclk and its divider is 1
  22. //so SMCLK will be used for deriving uart peripheral
  23. }
  24.  
  25. void i2c_pins_conf()
  26. {
  27. P1SEL |= BIT6 + BIT7; // Assign I2C pins to USCI_B0
  28. P1SEL2|= BIT6 + BIT7; // Assign I2C pins to USCI_B0
  29. }
  30. void i2c_master_init()
  31. {
  32. i2c_pins_conf();
  33.  
  34. UCB0CTL1 |= UCSWRST; // set the UCSSWRST bit, so as to keep USCI in reset condition
  35. // configuration of USCI module should be done when USCI is reset to avoid unpredictable behavious
  36. UCB0CTL0 |= (UCMST | UCMODE_3 | UCSYNC); // I2C Master, synchronous mode
  37. UCB0CTL1 |= UCSSEL_2; // use SMCLK
  38. UCB0BR0 = 10;
  39. UCB0BR1 = 0;
  40. }
  41. void i2c_start()
  42. {
  43. UCB0CTL1 &= ~UCSWRST;
  44.  
  45. UCB0I2CSA = gb_pcf8574_WADDR; // writing desired slave address on UCBxI2CSA register
  46. // UCB0CTL0 &= ~(UCSLA10); // selecting size of slave address as 7 bit
  47. UCB0CTL1 |= UCTR; // setting in master transmitting mode
  48. UCB0CTL1 |= UCTXSTT; // Start condition generated
  49. // UCB0TXBUF = 0x00;
  50. while((UCB0STAT & BUSY)!= 0);
  51. while(!(UC0IFG & UCB0TXIFG)); // wait for start condition to be generated
  52. // while(!(UCB0CTL1 & UCTXSTT)); // waiting for slave to ack address
  53. }
  54. void i2c_master_tran_byte( uint8_t data)
  55. {
  56. while((UCB0STAT & BUSY)!= 0);
  57. while(!(UC0IFG & UCB0TXIFG)); // wait for start condition to be transmitted
  58. UCB0TXBUF = data;
  59. // while(!(UC0IFG & UCB0TXIFG)); // wait for start condition to be transmitted
  60. }
  61.  
  62. void i2c_stop()
  63. {
  64. while((UCB0STAT & BUSY)!= 0);
  65. UCB0CTL1 |= UCTXSTP;
  66. }
  67. void main(void)
  68. {
  69.  
  70. WDTCTL = WDTPW | WDTHOLD; // stop watchdog timer
  71. clock_init();
  72. P1DIR |= 0x01; // configure P1.0 as output
  73.  
  74. volatile unsigned int i; // volatile to prevent optimization
  75. i2c_master_init();
  76. while(1)
  77. {
  78. i2c_start();
  79. i2c_master_tran_byte( 'y');
  80. i2c_stop();
  81.  
  82. P1OUT ^= 0x01; // toggle P1.0
  83. for(i=10000; i>0; i--); // delay
  84. }
  85. }
  86.  
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