Guest User

Untitled

a guest
Feb 16th, 2018
108
0
Never
Not a member of Pastebin yet? Sign Up, it unlocks many cool features!
text 1.16 KB | None | 0 0
  1. diff --git a/artiq/firmware/libboard_artiq/hmc7043_guiexport_6gbps.py b/artiq/firmware/libboard_artiq/hmc7043_guiexport_6gbps.py
  2. index 77841ea0..b5c51dbf 100644
  3. --- a/artiq/firmware/libboard_artiq/hmc7043_guiexport_6gbps.py
  4. +++ b/artiq/firmware/libboard_artiq/hmc7043_guiexport_6gbps.py
  5. @@ -216,8 +216,8 @@ dut.write(0xD3, 0x40)
  6. # clkgrp1_div2_cfg12_divrat_msb[3:0] = 0x0
  7. dut.write(0xD4, 0x0)
  8.  
  9. -# clkgrp1_div2_cfg5_fine_delay[4:0] = 0x0
  10. -dut.write(0xD5, 0x0)
  11. +# clkgrp1_div2_cfg5_fine_delay[4:0] = 0x1
  12. +dut.write(0xD5, 0x1)
  13.  
  14. # clkgrp1_div2_cfg5_sel_coarse_delay[4:0] = 0x0
  15. dut.write(0xD6, 0x0)
  16. @@ -292,8 +292,8 @@ dut.write(0xE7, 0x40)
  17. # clkgrp2_div2_cfg12_divrat_msb[3:0] = 0x0
  18. dut.write(0xE8, 0x0)
  19.  
  20. -# clkgrp2_div2_cfg5_fine_delay[4:0] = 0x0
  21. -dut.write(0xE9, 0x0)
  22. +# clkgrp2_div2_cfg5_fine_delay[4:0] = 0x3
  23. +dut.write(0xE9, 0x3)
  24.  
  25. # clkgrp2_div2_cfg5_sel_coarse_delay[4:0] = 0x0
  26. dut.write(0xEA, 0x0)
  27. @@ -693,4 +693,5 @@ dut.write(0x151, 0x0)
  28. # clkgrp7_div2_cfg5_drvr_mode[4:3] = 0x1
  29. # clkgrp7_div2_cfg_outbuf_dyn[5:5] = 0x0
  30. # clkgrp7_div2_cfg2_mutesel[7:6] = 0x0
  31. -dut.write(0x152, 0xB)
  32. \ No newline at end of file
  33. +dut.write(0x152, 0xB)
  34. +
Add Comment
Please, Sign In to add comment