Advertisement
Guest User

No$GBA Xboo Readme

a guest
Jun 3rd, 2013
831
0
Never
Not a member of Pastebin yet? Sign Up, it unlocks many cool features!
text 18.41 KB | None | 0 0
  1. Nocash Multiboot/Burstboot Uploader (c) 2001,2002 Martin Korth
  2.  
  3. This is the standalone DOS version of the multiboot upload program,
  4. which is also being built-in into the no$gba debuggers utility menu.
  5.  
  6. Contents
  7. --------
  8.  
  9. 1) AUX Multiboot PC-to-GBA Cable
  10. 2) Extended Multiboot Header
  11. 3) Burst Boot Backdoor
  12. 4) Downloading the GBA BIOS
  13.  
  14. I hope this will be easy to use. I've spent about three weeks (fulltime)
  15. into trying to get it as fast and comfortable as possible, and by using
  16. as little hardware as possible...
  17.  
  18. http://www.work.de/nocash/
  19.  
  20. Many thanks to arundel for testing dozens of beta versions on 100MHz,
  21. 350MHz, and 700MHz computers until the code worked with fast CPUs, and
  22. without external pull-up resistors.
  23.  
  24. 1) AUX Multiboot PC-to-GBA Cable
  25. --------------------------------
  26.  
  27. Below describes how to connect a PC parallel port to the GBA link port,
  28. allowing to upload small programs (max 256 KBytes) from no$gba's Utility
  29. menu (or by using the standalone DOS version) into real GBAs.
  30.  
  31. This is possible because the GBA BIOS includes a built-in function for
  32. downloading & executing program code even when no cartridge is inserted.
  33. The program is loaded to 2000000h and up in GBA memory, and must contain
  34. cartridge header information (nintendo logo, checksum, etc) just as for
  35. normal ROM cartridges.
  36.  
  37. Basic Cable Connection
  38. The general connection is very simple (only needs four wires), the only
  39. problem is that you need a special GBA plug or otherwise need to solder
  40. wires directly to the GBA mainboard (see Examples below).
  41. GBA Name Color SUBD CNTR Name
  42. 2 SO Red ------------- 10 10 /ACK
  43. 3 SI Orange ------------- 14 14 /AUTOLF
  44. 5 SC Green ------------- 1 1 /STROBE
  45. 6 GND Blue ------------- 19 19 GND
  46. Optionally, also connect the following signals (see notes below):
  47. 4 SD Brown ------------- 17 36 /SELECT (double speed burst)
  48. - - - +----------- 2..9 2..9 D0..7 (pull-up)
  49. - - - |---[===]--- 14 14 /AUTOLF (pull-up)
  50. - - - |---[===]--- 1 1 /STROBE (pull-up)
  51. - - - +---[===]--- 17 36 /SELECT (pull-up)
  52. RESET (mainboard) ------|>|---- 16 31 /INIT (automatic reset)
  53. Notes: The GBA Pins are arranged from left to right as 2,4,6 in upper
  54. row, and 1,3,5 in lower row; outside view of GBA socket; flat side of
  55. socket upside. The above "Colors" are as used in most or all standard
  56. Nintendo link cables, note that Red/Orange will be exchanged at one end
  57. in cables with crossed SO/SI lines. At the PC side, use the SUBD pin
  58. numbers when connecting to a 25-pin SUBD plug, or CNTR pin numbers for
  59. 36-pin Centronics plug.
  60.  
  61. Optional SD Connection (Double Speed Burst)
  62. The SD line is used for Double Speed Burst transfers only, in case that
  63. you are using a gameboy link plug for the connection, and if that plug
  64. does not have a SD-pin (as such from older 8bit gameboy cables), then
  65. you may leave out this connection. Burst Boot will then only work half
  66. as fast though.
  67.  
  68. Optional Pull-Ups (Improves Low-to-High Transition Speed)
  69. If your parallel port works only with medium or slow delay settings,
  70. try to connect 570 Ohm resistors to each of the strobe/autolf/select
  71. outputs, and the other resistor pin to any or all of the parallel port
  72. pin 2..9 data lines (xboo outputs high to all data lines).
  73.  
  74. Optional Reset Connection
  75. The Reset connection allows to reset & upload data even if a program in
  76. the GBA has locked up (or if you've loaded a program that does not
  77. support nocash burst boot). - Without reset connection you'd then
  78. manually have to reset the GBA by switching it off and on.
  79. The RESET signal is labeled as such on the GBA mainboard. The diode
  80. (1N4148 or similiar) is required because otherwise strong INIT signals
  81. would pull-up the RESET signal, preventing the GBA from automatically
  82. resetting itself when switched on.
  83.  
  84. Optional Power Supply Connection
  85. Also, you may want to connect the power supply to parallel port data
  86. lines. Different parallel ports output different voltages/amperes
  87. though, maybe using a large Z-diode could be used to get a stable
  88. voltage with most ports. Even with strong ports, it'll probably not
  89. work when inserting a very power-hungry cartridge into the GBA.
  90.  
  91. Transmission Speed
  92. The first transfer will be very slow, and the GBA BIOS will display
  93. the boot logo for at least 4 seconds, even if the transfer has
  94. completed in less time. Once when you have uploaded a program with
  95. burst boot backdoor, further transfers will be ways faster. The
  96. table below shows transfer times for 0KByte - 256KByte files:
  97. Boot Mode_____Delay 0_______Delay 1_______Delay 2_____
  98. Double Burst 0.1s - 1.8s 0.1s - 3.7s 0.1s - 5.3s
  99. Single Burst 0.1s - 3.6s 0.1s - 7.1s 0.1s - 10.6s
  100. Normal Bios 4.0s - 9.0s 4.0s - 12.7s 4.0s - 16.3s
  101. All timings measured on a 66MHz computer, best possible transmission
  102. speed should be 150KBytes/second. Timings might slightly vary
  103. depending on the CPU speed and/or operating system. Synchronization
  104. is done by I/O waitstates, that should work even on faster computers.
  105. Non-zero delays are eventually required for cables without pull-ups.
  106.  
  107. Requirements
  108. Beside for the cable and plugs, no special requirements.
  109. The cable should work with all parallel ports, including old-fashined
  110. uni-directional printer ports, as well as modern bi-directional EPP
  111. ports. Transfer timings should work stable regardless of the PCs CPU
  112. speed (see above though), and regardless of multitasking interruptions.
  113. Both no$gba and the actual transmission procedure are using some 32bit
  114. code, so that either one currently requires 80386SX CPUs or above.
  115.  
  116. Windows NT/2000/etc.
  117. NT/2000/etc. prevent to access parallel ports directly, this problem can
  118. be reportedly healed by using special drivers (such like giveio, totalio,
  119. or userport), which would be possibly required to be called from inside
  120. of no$gba. If anybody can supply information on where to download & how
  121. to use these drivers, please let me know!
  122. Note: Windows 95/98/etc. are working fine without such drivers, also,
  123. the DOS version of the uploader might work okay even under NT/2000.
  124.  
  125. Connection Examples
  126. As far as I can imagine, there are four possible methods how to connect
  127. the cable to the GBA. The first two methods don't require to open the
  128. GBA, and the other methods also allow to connect optional power supply
  129. and reset signal.
  130. 1) Connect it to the GBA link port. Advantage: No need to
  131. open/modify the GBA. Disadvantage: You need a special plug,
  132. (typically gained by removing it from a gameboy link cable).
  133. 2) Solder the cable directly to the GBA link port pins. Advantages:
  134. No plug required & no need to open the GBA. Disadvantages:
  135. You can't remove the cable, and the link port becomes unusable.
  136. 3) Solder the cable directly to the GBA mainboard. Advantage: No
  137. plug required at the GBA side. Disadvantage: You'll always
  138. have a cable leaping out of the GBA even when not using it,
  139. unless you put a small standard plug between GBA and cable.
  140. 4) Install a Centronics socket in the GBA (between power switch
  141. and headphone socket). Advantage: You can use a standard
  142. printer cable. Disadvantages: You need to cut a big hole into
  143. the GBAs battery box (which cannot be used anymore), the big
  144. cable might be a bit uncomfortable when holding the GBA.
  145. Personally, I've decided to use the lastmost method as I don't like
  146. ending up with hundreds of special cables for different purposes, and
  147. asides, it's been fun to damage the GAB as much as possible.
  148.  
  149. Note
  150. The above used PC parallel port signals are typically using 5V=HIGH
  151. while GBA link ports deal with 3V=HIGH. From my experiences, the
  152. different voltages do not cause communication problems (and do not
  153. damage the GBA and/or PC hardware), and after all real men don't care
  154. about a handful of volts, however, use at own risk.
  155.  
  156. 2) Extended Multiboot Header
  157. ----------------------------
  158.  
  159. Beside for the normal cartridge header at 2000000h-20000BFh, multiboot
  160. uploaded programs must contain some additional entries: Multiboot
  161. Entry Point(s), and two reserved bytes which will be overwritten by
  162. the GBA BIOS download procedure.
  163.  
  164. 20000C0h - Normal/Multiplay mode Entry Point
  165. This entry is used only if the GBA has been booted by using Normal or
  166. Multiplay transfer mode (but not by Joybus mode).
  167. Typically deposit a ARM-32bit "B <start>" branch opcode at this
  168. location, which is pointing to your actual initialization procedure.
  169. (The normal ROM-entry point at 2000000h (aka 8000000h) is ignored.)
  170.  
  171. 20000C4h (BYTE) - Boot mode
  172. The slave GBA download procedure overwrites this byte by a value which
  173. is indicating the used multiboot transfer mode.
  174. Value Expl.
  175. 01h Joybus mode
  176. 02h Normal mode
  177. 03h Multiplay mode
  178. Typically set this byte to zero by inserting DCB 00h in your source.
  179. Be sure that your uploaded program does not contain important program
  180. code or data at this location, or at the ID-byte location below.
  181.  
  182. 20000C5h (BYTE) - Slave ID Number
  183. If the GBA has been booted in Normal or Multiplay mode, this byte
  184. becomes overwritten by the slave ID number of the local GBA (that'd be
  185. always 01h for normal mode).
  186. Value Expl.
  187. 01h Slave #1
  188. 02h Slave #2
  189. 03h Slave #3
  190. Typically set this byte to zero by inserting DCB 00h in your source.
  191. When booted in Joybus mode, the value is NOT changed and remains the
  192. same as uploaded from the master GBA.
  193.  
  194. 20000C6h..20000DFh - Not used
  195. Appears to be unused.
  196.  
  197. 20000E0h - Joybus mode Entry Point
  198. If the GBA has been booted by using Joybus transfer mode, then the entry
  199. point is loacted at this address rather than at 20000C0h. Either put
  200. your initialization procedure directly at this address, or redirect to
  201. the actual boot procedure by depositing a "B <start>" opcode here,
  202. either one using 32bit ARM code. Or, if you are not intending to support
  203. joybus mode (which is probably rarely used), ignore this entry.
  204.  
  205. Preferably point the ROM-Entry Point at 2000000h/8000000h to a separate
  206. procedure that copies your program from ROM (8000000h) to RAM (2000000h),
  207. and then jump to the RAM entry point at 20000C0h. By this method your
  208. program will work both as ROM cartridge and as multiboot program.
  209. Aye, this should be obvious, but apparently not to everybody out there ;-/
  210.  
  211. 3) Burst Boot Backdoor
  212. ----------------------
  213.  
  214. When writing multiboot compatible programs, always include a burst boot
  215. "backdoor", this will allow yourself (and other people) to upload programs
  216. much faster as when using the normal GBA BIOS multiboot function.
  217. Aside from the improved transmission speed, there's no need to reset the
  218. GBA each time (eventually manually if you do not have reset connect), and,
  219. most important, the time-consuming nintendo-logo intro is bypassed.
  220.  
  221. The Burst Boot Protocol
  222. In your programs IRQ handler, add some code that watches out for burst
  223. boot IRQ requests. When sensing a burst boot request, download the actual
  224. boot procedure, and pass control to that procedure.
  225. Send (PC) Reply (GBA)
  226. "BRST" "BOOT" ;request burst, and reply <prepared> for boot
  227. <wait 1/16s> <process IRQ> ;long delay, allow slave to enter IRQ handler
  228. llllllll "OKAY" ;send length in bytes, reply <ready> to boot
  229. dddddddd -------- ;send data in 32bit units, reply don't care
  230. cccccccc cccccccc ;exchange crc (all data units added together)
  231. Use normal mode, 32bit, external clock for all transfers. The received
  232. highspeed loader (currently approx. 180h bytes) is to be loaded to and
  233. started at 3000000h, which will then handle the actual download
  234. operation.
  235.  
  236. Below is an example program which works with multiboot, burstboot, and as
  237. normal rom/flashcard. The source can be assembled with a22i (the no$gba
  238. built-in assembler, see no$gba utility menu). When using other/mainstream
  239. assemblers, you'll eventually have to change some directives, convert
  240. numbers from NNNh into 0xNNN format, and define the origin somewhere in
  241. linker/makefile instead of in source code.
  242.  
  243. .arm ;select 32bit ARM instruction set
  244. .gba ;indicate that it's a gameboy advance program
  245. .fix ;automatically fix the cartridge header checksum
  246. org 2000000h ;origin in RAM for multiboot-cable/no$gba-cutdown compatibility
  247. ;------------------
  248. ;cartridge header/multiboot header
  249. b rom_start ;-rom entry point
  250. dcb ...insert logo here... ;-nintento logo (156 bytes)
  251. dcb 'XBOO SAMPLE ' ;-title (12 bytes)
  252. dcb 0,0,0,0, 0,0 ;-game code (4 bytes), maker code (2 bytes)
  253. dcb 96h,0,0 ;-fixed value 96h, main unit code, device type
  254. dcb 0,0,0,0,0,0,0 ;-reserved (7 bytes)
  255. dcb 0 ;-software version number
  256. dcb 0 ;-header checksum (set by .fix)
  257. dcb 0,0 ;-reserved (2 bytes)
  258. b ram_start ;-multiboot ram entry point
  259. dcb 0,0 ;-multiboot reserved bytes (destroyed by BIOS)
  260. dcb 0,0 ;-blank padded (32bit alignment)
  261. ;------------------
  262. irq_handler: ;interrupt handler (note: r0-r3 are pushed by BIOS)
  263. mov r1,4000000h ;\get I/O base address,
  264. ldr r0,[r1,200h] ;IE/IF ; read IE and IF,
  265. and r0,r0,r0,lsr 16 ; isolate occurred AND enabled irqs,
  266. add r3,r1,200h ;IF ; and acknowledge these in IF
  267. strh r0,[r3,2] ;/
  268. ldrh r3,[r1,-8] ;\mix up with BIOS irq flags at 3007FF8h,
  269. orr r3,r3,r0 ; aka mirrored at 3FFFFF8h, this is required
  270. strh r3,[r1,-8] ;/when using the (VBlank-)IntrWait functions
  271. and r3,r0,80h ;IE/IF.7 SIO ;\
  272. cmp r3,80h ; check if it's a burst boot interrupt
  273. ldreq r2,[r1,120h] ;SIODATA32 ; (if interrupt caused by serial transfer,
  274. ldreq r3,[msg_brst] ; and if received data is "BRST",
  275. cmpeq r2,r3 ; then jump to burst boot)
  276. beq burst_boot ;/
  277. ;... insert your own interrupt handler code here ...
  278. bx lr ;-return to the BIOS interrupt handler
  279. ;------------------
  280. burst_boot: ;requires incoming r1=4000000h
  281. ;... if your program uses DMA, disable any active DMA transfers here ...
  282. ldr r4,[msg_okay] ;\
  283. bl sio_transfer ; receive transfer length/bytes & reply "OKAY"
  284. mov r2,r0 ;len ;/
  285. mov r3,3000000h ;dst ;\
  286. mov r4,0 ;crc ;
  287. @@lop: ;
  288. bl sio_transfer ; download burst loader to 3000000h and up
  289. stmia [r3]!,r0 ;dst ;
  290. add r4,r4,r0 ;crc ;
  291. subs r2,r2,4 ;len ;
  292. bhi @@lop ;/
  293. bl sio_transfer ;-send crc value to master
  294. b 3000000h ;ARM state! ;-launch actual transfer by starting the loader
  295. ;------------------
  296. sio_transfer: ;serial transfer subroutine, 32bit normal mode, external clock
  297. str r4,[r1,120h] ;siodata32 ;-set reply/send data
  298. ldr r0,[r1,128h] ;siocnt ;\
  299. orr r0,r0,80h ; activate slave transfer
  300. str r0,[r1,128h] ;siocnt ;/
  301. @@wait: ;\
  302. ldr r0,[r1,128h] ;siocnt ; wait until transfer completed
  303. tst r0,80h ;
  304. bne @@wait ;/
  305. ldr r0,[r1,120h] ;siodata32 ;-get received data
  306. bx lr
  307. ;---
  308. msg_boot dcb 'BOOT' ;\
  309. msg_okay dcb "OKAY" ; ID codes for the burstboot protocol
  310. msg_brst dcb "BRST" ;/
  311. ;------------------
  312. download_rom_to_ram:
  313. mov r0,8000000h ;src/rom ;\
  314. mov r1,2000000h ;dst/ram ;
  315. mov r2,40000h/16 ;length ; transfer the ROM content
  316. @@lop: ; into RAM (done in units of 4 words/16 bytes)
  317. ldmia [r0]!,r4,r5,r6,r7 ; currently fills whole 256K of RAM,
  318. stmia [r1]!,r4,r5,r6,r7 ; even though the proggy is smaller
  319. subs r2,r2,1 ;
  320. bne @@lop ;/
  321. sub r15,lr,8000000h-2000000h ;-return (retadr rom/8000XXXh -> ram/2000XXXh)
  322. ;------------------
  323. init_interrupts:
  324. mov r4,4000000h ;-base address for below I/O registers
  325. ldr r0,=irq_handler ;\install IRQ handler address
  326. str r0,[r4,-4] ;IRQ HANDLER ;/at 3FFFFFC aka 3007FFC
  327. mov r0,0008h ;\enable generating vblank irqs
  328. strh r0,[r4,4h] ;DISPSTAT ;/
  329. mrs r0,cpsr ;\
  330. bic r0,r0,80h ; cpu interrupt enable (clear i-flag)
  331. msr cpsr,r0 ;/
  332. mov r0,0 ;\
  333. str r0,[r4,134h] ;RCNT ; init SIO normal mode, external clock,
  334. ldr r0,=5080h ; 32bit, IRQ enable, transfer started
  335. str r0,[r4,128h] ;SIOCNT ; output "BOOT" (indicate burst boot prepared)
  336. ldr r0,[msg_boot] ;
  337. str r0,[r4,120h] ;SIODATA32 ;/
  338. mov r0,1 ;\interrupt master enable
  339. str r0,[r4,208h] ;IME=1 ;/
  340. mov r0,81h ;\enable execution of vblank IRQs,
  341. str r0,[r4,200h] ;IE=81h ;/and of SIO IRQs (burst boot)
  342. bx lr
  343. ;------------------
  344. rom_start: ;entry point when booted from flashcart/rom
  345. bl download_rom_to_ram ;-download ROM to RAM (returns to ram_start)
  346. ram_start: ;entry point for multiboot/burstboot
  347. mov r0,0feh ;\reset all registers, and clear all memory
  348. swi 10000h ;RegisterRamReset ;/(except program code in wram at 2000000h)
  349. bl init_interrupts ;-install burst boot irq handler
  350. mov r4,4000000h ;\enable video,
  351. strh r4,[r4,000h] ;DISPCNT ;/by clearing the forced blank bit
  352. @@mainloop:
  353. swi 50000h ;VBlankIntrWait ;-wait one frame (cpu in low power mode)
  354. mov r5,5000000h ;\increment the backdrop palette color
  355. str r8,[r5] ; (ie. display a blinking screen)
  356. add r8,r8,1 ;/
  357. b @@mainloop
  358. ;------------------
  359. .pool
  360. end
  361.  
  362. Downloading the GBA BIOS
  363. ------------------------
  364.  
  365. The new Xboo version can be used to download the BIOS from the GBA.
  366. Specify "/b <file>" in commandline, <file> may be any GBA program with
  367. valid header. With the /b switch, Xboo will upload that header, followed
  368. by a small download procedure, which will then send the BIOS data to PC,
  369. being saved in file "Xboo.tmp". When using that file with emulators,
  370. rename it to the desired filename (no$gba would accept either Gba.rom, or
  371. No$gba.rom, however, please use only ONE of that filenames, not both!)
  372. 
Advertisement
Add Comment
Please, Sign In to add comment
Advertisement