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  1. /*
  2. Name: main.S
  3. Project: test3
  4. $Author: jcsilva $
  5. Creation Date: 2016-08-06
  6. Tabsize: 4
  7. Copyright: License: GNU GPL v2 (see License.txt)
  8. ;
  9. This Revision: $Id: main.S,v 1.3 2016/08/04 21:02:25 jcsilva Exp $
  10. $Log$
  11. */
  12.  
  13. /*
  14. The code writes to the cal reg the calibration value from the last
  15. flash position (0x3ff), calibration error below 1%.
  16. Timer T1 works in PWM mode at a frequency of 12.5KHz, output OC1 has
  17. an LC low pass filter and the output is connected to a small speaker.
  18. A sine wave is programed in the eeprom by the make file, the values
  19. are reloaded incrementally to the pwm output.
  20. a sine wave of 195 Hz should be output.
  21. */
  22.  
  23. #define __SFR_OFFSET 0
  24. #include <avr/io.h>
  25. #include <avr/eeprom.h>
  26.  
  27. /*
  28. EEPROM
  29. */
  30.  
  31. /*
  32. IO Definitions
  33. */
  34. #define LED PB0
  35. #define OUT PB1
  36.  
  37.  
  38. /*
  39. Constants
  40. */
  41. #define ZERO 0
  42.  
  43. /* Time system constants */
  44.  
  45. /*
  46. Register definition, use only C-style comments (avr-as is stupid)
  47. */
  48. ; from R0-R15 only direct addressing
  49. #define zero R0
  50. #define ptr R1 /* pointer to sine table */
  51.  
  52. ; from R16-R31 ldi possible
  53. #define acc R16 /* working register */
  54. #define calib R17 /* determine if needs calibration 0=yes */
  55.  
  56. /*
  57. Interrupt Routines
  58. */
  59. ;* Addresses of interrupt routines is defined in io.h (for this processor)
  60. ;.global INT0_vect
  61. ;.global IO_PINS_vect
  62. ;.global TIMER1_COMP_vect
  63. ;.global TIMER1_OVF_vect
  64. ;.global TIMER0_OVF_vect
  65. ;.global EE_RDY_vect
  66. ;.global ANA_COMP_vect
  67. ;.global ADC_vect
  68.  
  69. .text
  70.  
  71. ;*
  72. ;* Interrupt 0
  73. ;*
  74. .global INT0_vect
  75. INT0_vect:
  76. reti
  77.  
  78. ;*
  79. ;* Pin change interrupt
  80. ;*
  81. .global IO_PINS_vect
  82. IO_PINS_vect:
  83. reti
  84.  
  85. ;*
  86. ;* Interrupt Timer 1 Overflow
  87. ;*
  88. .global TIMER1_OVF_vect
  89. TIMER1_OVF_vect:
  90. reti
  91.  
  92. ;*
  93. ;* Interrupt Timer 1 Compare
  94. ;*
  95. .global TIMER1_COMP_vect
  96. TIMER1_COMP_vect:
  97. reti
  98.  
  99. ;*
  100. ;* Interrupt Timer 0 Overflow
  101. ;*
  102. .global TIMER0_OVF_vect
  103. TIMER0_OVF_vect:
  104. reti
  105.  
  106. ;*
  107. ;* EEPROM ready interrupt
  108. ;*
  109. .global EE_RDY_vect
  110. EE_RDY_vect:
  111. reti
  112.  
  113. ;.global ANA_COMP_vect
  114. ;*
  115. ;* Analog Comparator Interrupt
  116. ;*
  117. .global ANA_COMP_vect
  118. ANA_COMP_vect:
  119. reti
  120.  
  121. ;*
  122. ;* ADC Converter, End of Convertion
  123. ;*
  124. .global ADC_vect
  125. ADC_vect:
  126. reti
  127.  
  128. ;*
  129. ;* Main routine
  130. ;*
  131. .global main
  132. main:
  133. ldi ZH, 0x03 ; Z -> End of Program memory (pmem)
  134. ldi ZL, 0xff
  135. lpm ; get calibration byte from pmem(0x3ff)
  136. out OSCCAL, R0 ; set calibration byte
  137. ; @factory calibrated clock speed
  138. osc_out:
  139. clr zero ; register zero is always zero
  140.  
  141. ldi acc,0x02 ; PB1 must be programmed as output to work
  142. out DDRB,acc
  143.  
  144. out OCR1A,zero ; clear output
  145.  
  146. ; maximum frequency OCR1B=0;
  147. ; period is OCR1B+1 * tclk
  148. ldi acc,0xff ; maximum length of PWM (for this clock)
  149. out OCR1B,acc
  150.  
  151. ldi acc, 0x64 ; PWM1,COM1A1,CS12 CK->T1 (f=12.5Khz)
  152. out TCCR1,acc
  153.  
  154. clr ptr ; pointer to first position
  155.  
  156. loop:
  157. out EEAR,ptr ; set pointer to eeprom
  158. sbi EECR,EERE ; set read
  159. in acc,EEDR
  160. out OCR1A,acc ; OCR1A:= eeprom(ptr)
  161. inc ptr ; ignore extra bits
  162. wait:
  163. in acc,TIFR ; input Timer Flag register
  164. andi acc,0x40 ; test OC1FA
  165. breq wait ; wait for a valid compare
  166. ldi acc,0x40
  167. out TIFR,acc ; software clear of the flag
  168. rjmp loop
  169.  
  170. rjmp loop ; wait for reset
  171.  
  172. .section .eeprom
  173. .org 0x00 ; dummy space, no eeprom used
  174. .end
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