Question 2

// -------------------------------------------------------------------------------------
// Question 2
// -------------------------------------------------------------------------------------
module  Question_2 #(parameter n = 8)
(
    // Inputs
    input   logic   [17:0]      SW,                 // Switches
    input   logic   [3:0]       KEY,                // Push Buttons
    input   logic               CLOCK_27,           // Clock 27
    input   logic               CLOCK_50,           // Clock 50

    // Outputs
    output  logic   [6:0]       HEX0,               // SSD 0
                                HEX1,               // SSD 1
                                HEX2,               // SSD 2
                                HEX3,               // SSD 3
                                HEX4,               // SSD 4
                                HEX5,               // SSD 5
                                HEX6,               // SSD 6
                                HEX7,               // SSD 7
    output  logic   [17:0]      LEDR,               // Red LEDS
    output  logic   [8:0]       LEDG                // Green LEDS

);

    // Internal Logic
    logic   [n-1:0]     A,
                        B,
                        B_prime,
                        S,
                        LO_AND_out,
                        LO_OR_out,
                        LO_XOR_out,
                        LO_NOR_out,
                        AU_out,
                        LO_out,
                        SLT_extn,
                        ALU_out;
    logic   [3:0]       F;
    logic               AU_XNOR_out,
                        AU_XOR_out,
                        SLT_signed_out,
                        SLT_unsigned_out,
                        Cout,
                        OVs,
                        OVu,
                        OV;

    // Assigning Numbers A, B and F to the switches and keys, respectively
    assign A = SW[15:8];
    assign B = SW[7:0];
    assign F = KEY[3:0];

    // Displaying the inputs A and B on the Hex displays
    disp_8b_SSD disp_A(A[n-1:0], HEX6[6:0], HEX7[6:0]);
    disp_8b_SSD disp_B(B[n-1:0], HEX4[6:0], HEX5[6:0]);

    // ---- Arithmetic Unit ----

    // Choose between Add and Sub Mode
    parameterized_2_1_MUX #(n) mux1(B[n-1:0], ~(B[n-1:0]), F[1], B_prime[n-1:0]);

    // Adding A and B' to get S and Cout
    adder_8_bit(A[n-1:0], B_prime[n-1:0], F[1], S[n-1:0], Cout);
    //{Cout, S[n-1:0]} = A[n-1:0] + B_prime[n-1:0] + F[1];

    // Top XNOR
    assign AU_XNOR_out = ~(B_prime[n-1] ^ A[n-1]);

    // Top XOR
    assign AU_XOR_out = A[n-1] ^ S[n-1];

    // OVs
    assign OVs = AU_XNOR_out & AU_XOR_out;

    // OVu
    assign OVu = Cout ^ F[1];

    // OV
    parameterized_2_1_MUX #(n) mux2(OVs, OVu, F[0], OV);

    // Turning on LED is overflow is detected
    assign LEDR[0] = OV;

    // ---- SLT Logic ----

    // SLT_signed_out
    parameterized_2_1_MUX #(n) mux3(S[n-1], Cout, OVs, SLT_signed_out);

    // SLT_unsigned_out
    parameterized_2_1_MUX #(n) mux4(SLT_signed_out, ~Cout, F[0], SLT_unsigned_out);

    // SLT_extn
    assign SLT_extn[n-1:0] = {{(n-1){1'b0}}, SLT_unsigned_out};

    // AU_out
    parameterized_2_1_MUX #(n) mux5(SLT_extn[n-1:0], S[n-1:0], ~F[2], AU_out[n-1:0]);

    // ---- Logic Operations ----

    // AND_out
    assign LO_AND_out[n-1:0] = A[n-1:0] & B[n-1:0];

    // OR_out
    assign LO_OR_out[n-1:0] = A[n-1:0] | B[n-1:0];

    // XOR_out
    assign LO_XOR_out[n-1:0] = A[n-1:0] ^ B[n-1:0];

    // NOR_out
    assign LO_NOR_out[n-1:0] = ~(A[n-1:0] | B[n-1:0]);

    // LO_out
    parameterized_4_1_MUX #(n) mux6(LO_AND_out[n-1:0], LO_OR_out[n-1:0], LO_XOR_out[n-1:0], LO_NOR_out[n-1:0], F[1:0], LO_out[n-1:0]);

    // ---- Arithmetic Logic Unit ----

    // ALU_out
    parameterized_2_1_MUX #(n) mux7(AU_out[n-1:0], LO_out[n-1:0], F[2], ALU_out[n-1:0]);

    // ---- Displaying the Result ----

    disp_equals_sign(HEX3[6:0]);
    display_8b_with_Cout disp_ALU_out(ALU_out[n-1:0], Cout, HEX0[6:0], HEX1[6:0], HEX2[6:0]);

endmodule