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new timing for LGT8x/gcc-4.9.2

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Jul 28th, 2020
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  1.  
  2. SoftwareSerialExample-492.ino.elf: file format elf32-avr
  3.  
  4. - Tx Timing 1: from start bit to first bit
  5.  
  6. 00000436 <_ZN14SoftwareSerial5writeEh>:
  7. LGT 48c: 40 83 st Z, r20
  8. ------
  9. 1 1 48e: e9 01 movw r28, r18
  10. 490: 21 97 sbiw r28, 0x01 ; delay_loop
  11. 492: 00 00 nop ; not count here
  12. 494: e9 f7 brne .-6 ; not count here
  13. 496: 00 00 nop ; not count here
  14. 1 1 498: 48 e0 ldi r20, 0x08 ; 8
  15. 1 1 49a: 50 81 ld r21, Z
  16. 1 2 49c: 60 ff sbrs r22, 0
  17. 1 49e: 02 c0 rjmp .+4 ; 0x4a4 <_ZN14SoftwareSerial5writeEh+0x6e>
  18. 1 4a0: 59 2b or r21, r25
  19. 1 4a2: 01 c0 rjmp .+2 ; 0x4a6 <_ZN14SoftwareSerial5writeEh+0x70>
  20. 1 4a4: 58 23 and r21, r24
  21. 1 1 4a6: 50 83 st Z, r21
  22. ------
  23. 7 8
  24.  
  25. - Tx Timing 2: between bits
  26.  
  27. 1 1 49a: 50 81 ld r21, Z
  28. 1 2 49c: 60 ff sbrs r22, 0
  29. 1 49e: 02 c0 rjmp .+4 ; 0x4a4 <_ZN14SoftwareSerial5writeEh+0x6e>
  30. 1 4a0: 59 2b or r21, r25
  31. 1 4a2: 01 c0 rjmp .+2 ; 0x4a6 <_ZN14SoftwareSerial5writeEh+0x70>
  32. 1 4a4: 58 23 and r21, r24
  33. 1 1 4a6: 50 83 st Z, r21
  34. 1 1 4a8: e9 01 movw r28, r18
  35. 4aa: 21 97 sbiw r28, 0x01 ; delay_loop
  36. 4ac: 00 00 nop ; not count here
  37. 4ae: e9 f7 brne .-6 ; not count here
  38. 4b0: 00 00 nop ; not count here
  39. 1 1 4b2: 66 95 lsr r22
  40. 1 1 4b4: 41 50 subi r20, 0x01 ; 1
  41. 2 2 4b6: 89 f7 brne .-30 ; 0x49a <_ZN14SoftwareSerial5writeEh+0x64>
  42. ------
  43. 10 11
  44.  
  45. - Tx Timing 3: from last bit to stop bit
  46.  
  47. 4a6: 50 83 st Z, r21
  48. 1 1 4a8: e9 01 movw r28, r18
  49. 4aa: 21 97 sbiw r28, 0x01 ; delay_loop
  50. 4ac: 00 00 nop ; not count here
  51. 4ae: e9 f7 brne .-6 ; not count here
  52. 4b0: 00 00 nop ; not count here
  53. 1 1 4b2: 66 95 lsr r22
  54. 1 1 4b4: 41 50 subi r20, 0x01 ; 1
  55. 1 1 4b6: 89 f7 brne .-30 ; 0x49a <_ZN14SoftwareSerial5writeEh+0x64>
  56. 1 1 4b8: 77 23 and r23, r23
  57. 1 2 4ba: 21 f0 breq .+8 ; 0x4c4 <_ZN14SoftwareSerial5writeEh+0x8e>
  58. 1 4bc: 90 81 ld r25, Z
  59. 1 4be: 89 23 and r24, r25
  60. 1 4c0: 80 83 st Z, r24
  61. 1 4c2: 03 c0 rjmp .+6 ; 0x4ca <_ZN14SoftwareSerial5writeEh+0x94>
  62. 1 4c4: 80 81 ld r24, Z
  63. 1 4c6: 98 2b or r25, r24
  64. 1 4c8: 90 83 st Z, r25
  65. ------
  66. 10 10
  67.  
  68. - Rx Timing 1: raise interrupt signal
  69.  
  70. 4clk cycles, maybe AVR/LGT same
  71.  
  72. - Rx Timing 2: CPU recognize interrupt signal
  73.  
  74. 4clk cycles, maybe AVR/LGT same
  75.  
  76. - Rx Timing 3: jmp @ vectors ~ before centering delay
  77.  
  78. 00000000 <__vectors>:
  79. 3 3 c: 0c 94 7d 03 jmp 0x6fa ; 0x6fa <__vector_3>
  80.  
  81. 000006fa <__vector_3>:
  82. 1 1 6fa: 1f 92 push r1
  83. 1 1 6fc: 0f 92 push r0
  84. 1 1 6fe: 0f b6 in r0, 0x3f ; 63
  85. 1 1 700: 0f 92 push r0
  86. 1 1 702: 11 24 eor r1, r1
  87. 1 1 704: 2f 93 push r18
  88. 1 1 706: 3f 93 push r19
  89. 1 1 708: 4f 93 push r20
  90. 1 1 70a: 5f 93 push r21
  91. 1 1 70c: 6f 93 push r22
  92. 1 1 70e: 7f 93 push r23
  93. 1 1 710: 8f 93 push r24
  94. 1 1 712: 9f 93 push r25
  95. 1 1 714: af 93 push r26
  96. 1 1 716: bf 93 push r27
  97. 1 1 718: ef 93 push r30
  98. 1 1 71a: ff 93 push r31
  99. 2 2 71c: e0 91 88 01 lds r30, 0x0188 ; 0x800188 <_ZN14SoftwareSerial13active_objectE>
  100. 2 2 720: f0 91 89 01 lds r31, 0x0189 ; 0x800189 <_ZN14SoftwareSerial13active_objectE+0x1>
  101. 1 1 724: 30 97 sbiw r30, 0x00 ; 0
  102. 2 2 726: 09 f4 brne .+2 ; 0x72a <__vector_3+0x30>
  103. 728: 57 c0 rjmp .+174 ; 0x7d8 <__vector_3+0xde>
  104. 1 1 72a: 96 8d ldd r25, Z+30 ; 0x1e
  105. 1 1 72c: a6 85 ldd r26, Z+14 ; 0x0e
  106. 1 1 72e: b7 85 ldd r27, Z+15 ; 0x0f
  107. 1 1 730: 85 85 ldd r24, Z+13 ; 0x0d
  108. 1 2 732: 91 ff sbrs r25, 1
  109. 1 734: 04 c0 rjmp .+8 ; 0x73e <__vector_3+0x44>
  110. 1 736: 9c 91 ld r25, X
  111. 1 738: 89 23 and r24, r25
  112. 2 73a: 29 f4 brne .+10 ; 0x746 <__vector_3+0x4c>
  113. 73c: 4d c0 rjmp .+154 ; 0x7d8 <__vector_3+0xde>
  114. 1 73e: 9c 91 ld r25, X
  115. 1 740: 89 23 and r24, r25
  116. 2 742: 09 f0 breq .+2 ; 0x746 <__vector_3+0x4c>
  117. 744: 49 c0 rjmp .+146 ; 0x7d8 <__vector_3+0xde>
  118. 1 1 746: a3 89 ldd r26, Z+19 ; 0x13
  119. 1 1 748: b4 89 ldd r27, Z+20 ; 0x14
  120. 1 1 74a: 9c 91 ld r25, X
  121. 1 1 74c: 85 89 ldd r24, Z+21 ; 0x15
  122. 1 1 74e: 80 95 com r24
  123. 1 1 750: 89 23 and r24, r25
  124. 1 1 752: 8c 93 st X, r24
  125. 1 1 754: 86 89 ldd r24, Z+22 ; 0x16
  126. 1 1 756: 97 89 ldd r25, Z+23 ; 0x17
  127. 758: 01 97 sbiw r24, 0x01 ; delay_loop
  128. 75a: 00 00 nop ; not count here
  129. 75c: e9 f7 brne .-6 ; not count here
  130. 75e: 00 00 nop
  131. ------
  132. 46 46
  133.  
  134. - Rx Timing 4: after centering delay ~ read signal pin
  135.  
  136. 758: 01 97 sbiw r24, 0x01 ; delay_loop
  137. 75a: 00 00 nop ; not count here
  138. 75c: e9 f7 brne .-6 ; not count here
  139. 75e: 00 00 nop
  140. 1 760: 60 8d ldd r22, Z+24 ; 0x18
  141. 1 762: 71 8d ldd r23, Z+25 ; 0x19
  142. 1 764: a6 85 ldd r26, Z+14 ; 0x0e
  143. 1 766: b7 85 ldd r27, Z+15 ; 0x0f
  144. 1 768: 55 85 ldd r21, Z+13 ; 0x0d
  145. 1 76a: 38 e0 ldi r19, 0x08 ; 8
  146. 1 76c: 20 e0 ldi r18, 0x00 ; 0
  147. 1 76e: cb 01 movw r24, r22
  148. 770: 01 97 sbiw r24, 0x01 ; delay_loop
  149. 772: 00 00 nop ; not count here
  150. 774: e9 f7 brne .-6 ; not count here
  151. 776: 00 00 nop ; not count here
  152. 1 778: 82 2f mov r24, r18
  153. 1 77a: 90 e0 ldi r25, 0x00 ; 0
  154. 1 77c: 95 95 asr r25
  155. 1 77e: 87 95 ror r24
  156. 1 780: 28 2f mov r18, r24
  157. 1 782: 4c 91 ld r20, X
  158. ------
  159. 14
  160.  
  161. - Rx Timing 5: inside read loop
  162.  
  163. 1 1 76e: cb 01 movw r24, r22
  164. 770: 01 97 sbiw r24, 0x01 ; delay_loop
  165. 772: 00 00 nop ; not count here
  166. 774: e9 f7 brne .-6 ; not count here
  167. 776: 00 00 nop ; not count here
  168. 1 1 778: 82 2f mov r24, r18
  169. 1 1 77a: 90 e0 ldi r25, 0x00 ; 0
  170. 1 1 77c: 95 95 asr r25
  171. 1 1 77e: 87 95 ror r24
  172. 1 1 780: 28 2f mov r18, r24
  173. 1 1 782: 4c 91 ld r20, X
  174. 1 1 784: 45 23 and r20, r21
  175. 1 2 786: 09 f0 breq .+2 ; 0x78a <__vector_3+0x90>
  176. 1 788: 20 68 ori r18, 0x80 ; 128
  177. 1 1 78a: 31 50 subi r19, 0x01 ; 1
  178. 2 2 78c: 81 f7 brne .-32 ; 0x76e <__vector_3+0x74>
  179. ------
  180. 13 13
  181.  
  182. - Rx Timing 6: after last bit read ~ before stop bit delay
  183.  
  184. 782: 4c 91 ld r20, X
  185. 1 1 784: 45 23 and r20, r21
  186. 1 2 786: 09 f0 breq .+2 ; 0x78a <__vector_3+0x90>
  187. 1 788: 20 68 ori r18, 0x80 ; 128
  188. 1 1 78a: 31 50 subi r19, 0x01 ; 1
  189. 1 1 78c: 81 f7 brne .-32 ; 0x76e <__vector_3+0x74>
  190. 1 1 78e: 86 8d ldd r24, Z+30 ; 0x1e
  191. 1 2 790: 81 fd sbrc r24, 1
  192. 1 792: 20 95 com r18
  193. 2 2 794: 80 91 87 01 lds r24, 0x0187 ; 0x800187 <_ZN14SoftwareSerial20_receive_buffer_tailE>
  194. 1 1 798: 90 e0 ldi r25, 0x00 ; 0
  195. 1 1 79a: 01 96 adiw r24, 0x01 ; 1
  196. 1 1 79c: 8f 73 andi r24, 0x3F ; 63
  197. 1 1 79e: 99 27 eor r25, r25
  198. 2 2 7a0: 30 91 86 01 lds r19, 0x0186 ; 0x800186 <_ZN14SoftwareSerial20_receive_buffer_headE>
  199. 1 1 7a4: 38 17 cp r19, r24
  200. 1 2 7a6: 49 f0 breq .+18 ; 0x7ba <__vector_3+0xc0>
  201. 2 7a8: a0 91 87 01 lds r26, 0x0187 ; 0x800187 <_ZN14SoftwareSerial20_receive_buffer_tailE>
  202. 1 7ac: b0 e0 ldi r27, 0x00 ; 0
  203. 1 7ae: aa 5b subi r26, 0xBA ; 186
  204. 1 7b0: be 4f sbci r27, 0xFE ; 254
  205. 1 7b2: 2c 93 st X, r18
  206. 2 7b4: 80 93 87 01 sts 0x0187, r24 ; 0x800187 <_ZN14SoftwareSerial20_receive_buffer_tailE>
  207. 1 7b8: 03 c0 rjmp .+6 ; 0x7c0 <__vector_3+0xc6>
  208. 1 7ba: 86 8d ldd r24, Z+30 ; 0x1e (overflow)
  209. 1 7bc: 81 60 ori r24, 0x01 ; 1
  210. 1 7be: 86 8f std Z+30, r24 ; 0x1e
  211. 1 1 7c0: 82 8d ldd r24, Z+26 ; 0x1a
  212. 1 1 7c2: 93 8d ldd r25, Z+27 ; 0x1b
  213. 7c4: 01 97 sbiw r24, 0x01 ; delay_loop
  214. 7c6: 00 00 nop ; not count here
  215. 7c8: e9 f7 brne .-6 ; not count here
  216. 7ca: 00 00 nop ; not count here
  217. ------
  218. 29 24
  219.  
  220. - Rx Timing 7: after stop bit delay ~ re-enable interrupt
  221.  
  222. 7c4: 01 97 sbiw r24, 0x01 ; delay_loop
  223. 7c6: 00 00 nop ; not count here
  224. 7c8: e9 f7 brne .-6 ; not count here
  225. 7ca: 00 00 nop ; not count here
  226. 1 7cc: a3 89 ldd r26, Z+19 ; 0x13
  227. 1 7ce: b4 89 ldd r27, Z+20 ; 0x14
  228. 1 7d0: 9c 91 ld r25, X
  229. 1 7d2: 85 89 ldd r24, Z+21 ; 0x15
  230. 1 7d4: 89 2b or r24, r25
  231. 1 7d6: 8c 93 st X, r24
  232. ------
  233. 6
  234.  
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