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clk_summary after "Support more HDMI modes on RK3228/RK3328"

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Jan 21st, 2020
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  1. # cat /sys/kernel/debug/clk/clk_summary
  2. enable prepare protect duty
  3. clock count count count rate accuracy phase cycle
  4. ---------------------------------------------------------------------------------------------
  5. ext_gmac 0 0 0 125000000 0 0 50000
  6. sclk_mac_extclk 0 0 0 125000000 0 0 50000
  7. xin24m 8 8 0 24000000 0 0 50000
  8. hdmiphy_phy 3 3 0 148500000 0 0 50000
  9. hdmiphy 1 1 0 148500000 0 0 50000
  10. dclk_vop 1 1 0 148500000 0 0 50000
  11. hdmiphy_peri 0 0 0 148500000 0 0 50000
  12. hdmiphy_aclk_cpu 0 0 0 148500000 0 0 50000
  13. sclk_uart2 1 1 0 24000000 0 0 50000
  14. sclk_uart1 0 0 0 24000000 0 0 50000
  15. sclk_uart0 0 0 0 24000000 0 0 50000
  16. sclk_tsadc 1 1 0 32743 0 0 50000
  17. sclk_otgphy1 2 2 0 24000000 0 0 50000
  18. usb480m_phy1 6 6 0 480000000 0 0 50000
  19. sclk_otgphy0 2 2 0 24000000 0 0 50000
  20. usb480m_phy0 3 3 0 480000000 0 0 50000
  21. usb480m_phy 0 0 0 480000000 0 0 50000
  22. xin12m 0 0 0 12000000 0 0 50000
  23. sclk_spdif 0 0 0 12000000 0 0 50000
  24. sclk_sdmmc 0 0 0 800000 0 0 50000
  25. sdmmc_sample 0 0 0 400000 0 0 50000
  26. sdmmc_drv 0 0 0 400000 0 90 50000
  27. sclk_timer5 0 0 0 24000000 0 0 50000
  28. sclk_timer4 0 0 0 24000000 0 0 50000
  29. sclk_timer3 0 0 0 24000000 0 0 50000
  30. sclk_timer2 0 0 0 24000000 0 0 50000
  31. sclk_timer1 0 0 0 24000000 0 0 50000
  32. sclk_timer0 0 0 0 24000000 0 0 50000
  33. sclk_hdmi_hdcp 1 1 0 24000000 0 0 50000
  34. usb480m 0 0 0 24000000 0 0 50000
  35. clk_24m 2 2 0 24000000 0 0 50000
  36. pll_apll 0 0 0 816000000 0 0 50000
  37. apll 0 0 0 816000000 0 0 50000
  38. apll_core 0 0 0 816000000 0 0 50000
  39. armclk 0 0 0 816000000 0 0 50000
  40. pclk_dbg 0 0 0 204000000 0 0 50000
  41. armcore 0 0 0 408000000 0 0 50000
  42. apll_ddr 0 0 0 816000000 0 0 50000
  43. pll_dpll 0 0 0 600000000 0 0 50000
  44. dpll 0 0 0 600000000 0 0 50000
  45. dpll_core 0 0 0 600000000 0 0 50000
  46. dpll_ddr 0 0 0 600000000 0 0 50000
  47. ddrphy4x 0 0 0 600000000 0 0 50000
  48. ddrphy 0 0 0 150000000 0 0 50000
  49. pll_cpll 1 1 0 500000000 0 0 50000
  50. cpll 1 1 0 500000000 0 0 50000
  51. sclk_gmac_out 0 0 0 125000000 0 0 50000
  52. sclk_gmac_src 2 2 0 50000000 0 0 50000
  53. sclk_gmac_pre 5 5 0 50000000 0 0 50000
  54. sclk_mac_tx 1 1 0 50000000 0 0 50000
  55. sclk_mac_rx 1 1 0 50000000 0 0 50000
  56. sclk_mac_ref 1 1 0 50000000 0 0 50000
  57. sclk_mac_refout 1 1 0 50000000 0 0 50000
  58. sclk_macphy 1 1 0 50000000 0 0 50000
  59. uart2_src 0 0 0 15625000 0 0 50000
  60. uart2_frac 0 0 0 781250 0 0 50000
  61. uart1_src 0 0 0 15625000 0 0 50000
  62. uart1_frac 0 0 0 781250 0 0 50000
  63. uart0_src 0 0 0 15625000 0 0 50000
  64. uart0_frac 0 0 0 781250 0 0 50000
  65. sclk_spdif_src 0 0 0 15625000 0 0 50000
  66. spdif_frac 0 0 0 781250 0 0 50000
  67. i2s2_src 0 0 0 15625000 0 0 50000
  68. i2s2_pre 0 0 0 15625000 0 0 50000
  69. sclk_i2s2 0 0 0 15625000 0 0 50000
  70. i2s2_frac 0 0 0 781250 0 0 50000
  71. i2s1_src 0 0 0 15625000 0 0 50000
  72. i2s1_pre 0 0 0 15625000 0 0 50000
  73. i2s_out 0 0 0 15625000 0 0 50000
  74. sclk_i2s1 0 0 0 15625000 0 0 50000
  75. i2s1_frac 0 0 0 781250 0 0 50000
  76. i2s0_src 0 0 0 15625000 0 0 50000
  77. i2s0_pre 0 0 0 15625000 0 0 50000
  78. sclk_i2s0 0 0 0 15625000 0 0 50000
  79. i2s0_frac 0 0 0 781250 0 0 50000
  80. cpll_vop 0 0 0 500000000 0 0 50000
  81. sclk_sdio_src 0 0 0 500000000 0 0 50000
  82. sclk_sdio 0 0 0 20833334 0 0 50000
  83. sdio_sample 0 0 0 10416667 0 0 50000
  84. sdio_drv 0 0 0 10416667 0 180 50000
  85. sclk_tsp 0 0 0 31250000 0 0 50000
  86. sclk_crypto 0 0 0 125000000 0 0 50000
  87. cpll_peri 0 0 0 500000000 0 0 50000
  88. cpll_aclk_cpu 0 0 0 500000000 0 0 50000
  89. pll_gpll 1 1 0 594000000 0 0 50000
  90. gpll 11 11 0 594000000 0 0 50000
  91. sclk_nandc 0 0 0 148500000 0 0 50000
  92. sclk_spi0 0 0 0 18562500 0 0 50000
  93. aclk_gpu_pre 2 2 0 297000000 0 0 50000
  94. aclk_gpu_noc 1 1 0 297000000 0 0 50000
  95. aclk_gpu 2 2 0 297000000 0 0 50000
  96. gpll_vop 1 1 0 594000000 0 0 50000
  97. sclk_vop_src 1 1 0 594000000 0 0 50000
  98. sclk_vop_pre 0 0 0 297000000 0 0 50000
  99. dclk_hdmiphy 1 1 0 594000000 0 0 50000
  100. sclk_emmc_src 0 0 0 594000000 0 0 50000
  101. sclk_emmc 0 0 0 74250000 0 0 50000
  102. emmc_sample 0 0 0 37125000 0 0 50000
  103. emmc_drv 0 0 0 37125000 0 90 50000
  104. sclk_wifi 0 0 0 12375000 0 0 50000
  105. gpll_peri 1 1 0 594000000 0 0 50000
  106. aclk_peri_src 3 3 0 148500000 0 0 50000
  107. aclk_peri 2 2 0 148500000 0 0 50000
  108. aclk_gmac 1 1 0 148500000 0 0 50000
  109. aclk_peri_noc 0 0 0 148500000 0 0 50000
  110. hclk_peri 9 9 0 148500000 0 0 50000
  111. hclk_peri_noc 0 0 0 148500000 0 0 50000
  112. hclk_host2_arb 1 1 0 148500000 0 0 50000
  113. hclk_otg_pmu 1 1 0 148500000 0 0 50000
  114. hclk_otg 0 0 0 148500000 0 0 50000
  115. hclk_host2 2 2 0 148500000 0 0 50000
  116. hclk_host1_arb 1 1 0 148500000 0 0 50000
  117. hclk_host1 2 2 0 148500000 0 0 50000
  118. hclk_host0_arb 1 1 0 148500000 0 0 50000
  119. hclk_host0 2 2 0 148500000 0 0 50000
  120. hclk_nandc 0 0 0 148500000 0 0 50000
  121. hclk_emmc 0 0 0 148500000 0 0 50000
  122. hclk_sdio 0 0 0 148500000 0 0 50000
  123. hclk_sdmmc 1 1 0 148500000 0 0 50000
  124. pclk_peri 2 2 0 74250000 0 0 50000
  125. pclk_peri_noc 0 0 0 74250000 0 0 50000
  126. pclk_gmac 1 1 0 74250000 0 0 50000
  127. sclk_hdcp 0 0 0 297000000 0 0 50000
  128. aclk_vop_pre 2 2 0 297000000 0 0 50000
  129. aclk_vop_noc 1 1 0 297000000 0 0 50000
  130. aclk_vop 1 2 0 297000000 0 0 50000
  131. sclk_rga 0 0 0 297000000 0 0 50000
  132. sclk_rga_src 1 1 0 594000000 0 0 50000
  133. aclk_rga_pre 1 1 0 297000000 0 0 50000
  134. aclk_rga_noc 1 1 0 297000000 0 0 50000
  135. aclk_rga 0 0 0 297000000 0 0 50000
  136. aclk_hdcp_pre 1 1 0 297000000 0 0 50000
  137. aclk_hdcp_noc 1 1 0 297000000 0 0 50000
  138. aclk_hdcp 0 0 0 297000000 0 0 50000
  139. aclk_iep_pre 2 3 0 297000000 0 0 50000
  140. aclk_iep_noc 1 1 0 297000000 0 0 50000
  141. aclk_iep 0 1 0 297000000 0 0 50000
  142. hclk_vio_pre 5 6 0 74250000 0 0 50000
  143. pclk_hdcp 0 0 0 74250000 0 0 50000
  144. pclk_vio_h2p 0 0 0 74250000 0 0 50000
  145. pclk_hdmi_ctrl 1 1 0 74250000 0 0 50000
  146. hclk_hdcp_mmu 0 0 0 74250000 0 0 50000
  147. hclk_vio_h2p 0 0 0 74250000 0 0 50000
  148. hclk_vop_noc 1 1 0 74250000 0 0 50000
  149. hclk_vio_noc 1 1 0 74250000 0 0 50000
  150. hclk_vio_ahb_arbi 1 1 0 74250000 0 0 50000
  151. hclk_vop 1 2 0 74250000 0 0 50000
  152. hclk_iep 0 1 0 74250000 0 0 50000
  153. hclk_rga 0 0 0 74250000 0 0 50000
  154. sclk_vdec_core 0 0 0 297000000 0 0 50000
  155. sclk_vdec_cabac 0 0 0 297000000 0 0 50000
  156. aclk_rkvdec_pre 2 2 0 297000000 0 0 50000
  157. aclk_rkvdec_noc 1 1 0 297000000 0 0 50000
  158. aclk_rkvdec 0 0 0 297000000 0 0 50000
  159. hclk_rkvdec_pre 1 1 0 74250000 0 0 50000
  160. hclk_rkvdec_noc 1 1 0 74250000 0 0 50000
  161. hclk_rkvdec 0 0 0 74250000 0 0 50000
  162. aclk_vpu_pre 2 2 0 297000000 0 0 50000
  163. aclk_vpu_noc 1 1 0 297000000 0 0 50000
  164. aclk_vpu 0 0 0 297000000 0 0 50000
  165. hclk_vpu_pre 1 1 0 74250000 0 0 50000
  166. hclk_vpu_noc 1 1 0 74250000 0 0 50000
  167. hclk_vpu 0 0 0 74250000 0 0 50000
  168. gpll_aclk_cpu 1 1 0 594000000 0 0 50000
  169. aclk_cpu_src 3 3 0 148500000 0 0 50000
  170. pclk_bus_src 3 3 0 74250000 0 0 50000
  171. pclk_ddr_pre 3 3 0 74250000 0 0 50000
  172. pclk_msch_noc 1 1 0 74250000 0 0 50000
  173. pclk_ddrmon 1 1 0 74250000 0 0 50000
  174. pclk_ddrupctl 1 1 0 74250000 0 0 50000
  175. pclk_phy_pre 4 4 0 74250000 0 0 50000
  176. pclk_phy_noc 1 1 0 74250000 0 0 50000
  177. pclk_vdacphy 0 0 0 74250000 0 0 50000
  178. pclk_hdmiphy 1 1 0 74250000 0 0 50000
  179. pclk_acodecphy 1 1 0 74250000 0 0 50000
  180. pclk_ddrphy 1 1 0 74250000 0 0 50000
  181. pclk_cpu 6 10 0 74250000 0 0 50000
  182. pclk_sim 0 0 0 74250000 0 0 50000
  183. pclk_sgrf 0 0 0 74250000 0 0 50000
  184. pclk_cru 0 0 0 74250000 0 0 50000
  185. pclk_grf 0 0 0 74250000 0 0 50000
  186. pclk_tsadc 1 1 0 74250000 0 0 50000
  187. pclk_uart2 1 1 0 74250000 0 0 50000
  188. pclk_uart1 0 0 0 74250000 0 0 50000
  189. pclk_uart0 0 0 0 74250000 0 0 50000
  190. pclk_gpio3 0 1 0 74250000 0 0 50000
  191. pclk_gpio2 0 1 0 74250000 0 0 50000
  192. pclk_gpio1 0 1 0 74250000 0 0 50000
  193. pclk_gpio0 0 1 0 74250000 0 0 50000
  194. pclk_rk_pwm 2 4 0 74250000 0 0 50000
  195. pclk_spi0 0 0 0 74250000 0 0 50000
  196. pclk_stimer 1 1 0 74250000 0 0 50000
  197. pclk_timer0 1 1 0 74250000 0 0 50000
  198. pclk_i2c3 0 0 0 74250000 0 0 50000
  199. pclk_i2c2 0 0 0 74250000 0 0 50000
  200. pclk_i2c1 0 0 0 74250000 0 0 50000
  201. pclk_i2c0 0 0 0 74250000 0 0 50000
  202. pclk_efuse_256 0 0 0 74250000 0 0 50000
  203. pclk_efuse_1024 0 0 0 74250000 0 0 50000
  204. hclk_cpu 2 2 0 148500000 0 0 50000
  205. hclk_crypto_slv 0 0 0 148500000 0 0 50000
  206. hclk_crypto_mst 0 0 0 148500000 0 0 50000
  207. hclk_tsp 0 0 0 148500000 0 0 50000
  208. hclk_spdif_8ch 0 0 0 148500000 0 0 50000
  209. hclk_i2s2_2ch 0 0 0 148500000 0 0 50000
  210. hclk_i2s1_8ch 0 0 0 148500000 0 0 50000
  211. hclk_i2s0_8ch 0 0 0 148500000 0 0 50000
  212. hclk_rom 1 1 0 148500000 0 0 50000
  213. aclk_cpu 3 3 0 148500000 0 0 50000
  214. aclk_bus_noc 0 0 0 148500000 0 0 50000
  215. aclk_dmac_bus 0 0 0 148500000 0 0 50000
  216. aclk_initmem 1 1 0 148500000 0 0 50000
  217. sclk_initmem_mbist 1 1 0 148500000 0 0 50000
  218. gpll_core 1 1 0 594000000 0 0 50000
  219. gpll_ddr 0 0 0 594000000 0 0 50000
  220. jtag 0 0 0 0 0 0 50000
  221. sclk_hsadc 0 0 0 0 0 0 50000
  222. sclk_hdmi_cec 1 1 0 0 0 0 50000
  223. ddrc 0 0 0 0 0 0 50000
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