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  1. Looking for coreboot table at 0 4096 bytes.
  2. Mapping 4096B of physical memory at 0x0 (requested 0x0).
  3. Mapping 1320B of physical memory at 0x0 (requested 0x518).
  4. ... padding virtual address with 0x518 bytes.
  5. Found!
  6. coreboot table entry 0x11
  7. Found forwarding entry.
  8. Looking for coreboot table at 7f74b000 4096 bytes.
  9. Mapping 4096B of physical memory at 0x7f74b000 (requested 0x7f74b000).
  10. Mapping 2642B of physical memory at 0x7f74b000 (requested 0x7f74b018).
  11. ... padding virtual address with 0x18 bytes.
  12. Found!
  13. coreboot table entry 0xc8
  14. coreboot table entry 0xcc
  15. coreboot table entry 0x01
  16. Found memory map.
  17. LB_MEM_TABLE found.
  18. LB_MEM_TABLE found.
  19. coreboot table entry 0x03
  20. coreboot table entry 0x04
  21. coreboot table entry 0x05
  22. coreboot table entry 0x06
  23. coreboot table entry 0x07
  24. coreboot table entry 0x26
  25. coreboot table entry 0x12
  26. coreboot table entry 0x29
  27. coreboot table entry 0x16
  28. Found timestamp table.
  29. cbmem_addr = 7f7dc000
  30. coreboot table entry 0x17
  31. Found cbmem console.
  32. cbmem_addr = 7f7dd000
  33. coreboot table entry 0x24
  34. coreboot table entry 0x37
  35. coreboot table entry 0x39
  36. coreboot table entry 0x30
  37. coreboot table entry 0x40
  38. coreboot table entry 0x3a
  39. coreboot table entry 0x32
  40. coreboot table entry 0x31
  41. coreboot table entry 0x31
  42. coreboot table entry 0x31
  43. coreboot table entry 0x31
  44. coreboot table entry 0x31
  45. coreboot table entry 0x31
  46. coreboot table entry 0x31
  47. coreboot table entry 0x31
  48. coreboot table entry 0x31
  49. coreboot table entry 0x31
  50. coreboot table entry 0x31
  51. coreboot table entry 0x31
  52. coreboot table entry 0x31
  53. coreboot table entry 0x31
  54. coreboot table entry 0x31
  55. coreboot table entry 0x31
  56. coreboot table entry 0x31
  57. coreboot table entry 0x31
  58. coreboot table entry 0x31
  59. Mapping 8B of physical memory at 0x7f7dd000 (requested 0x7f7dd000).
  60. Mapping 103640B of physical memory at 0x7f7dd000 (requested 0x7f7dd000).
  61.  
  62. coreboot-4.13-2365-gec05ced278-dirty-GLETA1WW (2.55) Sat Feb 27 00:35:20 UTC 2021 bootblock starting (log level: 4)...
  63. Timestamp - end of bootblock: 344416354
  64. FMAP: Found "FLASH" version 1.1 at 0x70000.
  65. FMAP: base = 0xff400000 size = 0xc00000 #areas = 5
  66. FMAP: area COREBOOT found @ 70200 (12123648 bytes)
  67. CBFS: mcache @0xff7c2e00 built for 16 files, used 0x304 of 0x2000 bytes
  68. CBFS: Found 'fallback/romstage' @0x80 size 0x8b9c in mcache @0xff7c2e2c
  69. Timestamp - starting to load romstage: 345649579
  70. Timestamp - finished loading romstage: 345688164
  71. BS: bootblock times (exec / console): total (unknown) / 0 ms
  72.  
  73.  
  74. coreboot-4.13-2365-gec05ced278-dirty-GLETA1WW (2.55) Sat Feb 27 00:35:20 UTC 2021 romstage starting (log level: 4)...
  75. Disabling Watchdog reboot... done.
  76. SMBus controller enabled
  77. SB: Resume from S3 detected.
  78. Setting up static northbridge registers... done.
  79. Started PEG11 link training.
  80. Temporarily hiding PEG11.
  81. Started PEG10 link training.
  82. Temporarily hiding PEG10.
  83. Initializing IGD...
  84. Back from haswell_early_initialization()
  85. Resume from S3 detected.
  86. Timestamp - before RAM initialization: 500925990
  87. CPU id(306c3) ucode:00000028 Intel(R) Core(TM) i7-4600M CPU @ 2.90GHz
  88. AES supported, TXT supported, VT supported
  89. PCH type: QM87, device id: 8c4f, rev id 5
  90. Starting UEFI PEI System Agent
  91. FMAP: area RW_MRC_CACHE found @ 20000 (65536 bytes)
  92. prepare_mrc_cache: at 0xff420030, size fd4
  93. CBFS: Found 'mrc.bin' @0xb2fdc0 size 0x2e6e4 in mcache @0xff7c3090
  94. System Agent: Starting up...
  95. System Agent: S3 resume detected
  96. System Agent: Initializing PCH
  97. install_ppi: overwrite GUID {ed097352-9041-445a-80b6-b29d509e8845}
  98. install_ppi: overwrite GUID {908c7f8b-5c48-47fb-8357-f5fd4e235276}
  99. System Agent: Initializing PCH (SMBUS)
  100. System Agent: Initializing PCH (USB)
  101. System Agent: Initializing PCH (SA Init)
  102. System Agent: Initializing PCH (Me UMA)
  103. System Agent: Initializing Memory
  104. System Agent: Done.
  105. Sanity checking heap.
  106. MRC Version 1.6.1 Build 2
  107. memcfg DDR3 clock 1600 MHz
  108. memcfg channel assignment: A: 0, B 1, C 2
  109. memcfg channel[0] config (00620020):
  110. ECC inactive
  111. enhanced interleave mode on
  112. rank interleave on
  113. DIMMA 8192 MB width x8 or x32 dual rank, selected
  114. DIMMB 0 MB width x8 or x32 single rank
  115. memcfg channel[1] config (00600010):
  116. ECC inactive
  117. enhanced interleave mode on
  118. rank interleave on
  119. DIMMA 4096 MB width x8 or x32 single rank, selected
  120. DIMMB 0 MB width x8 or x32 single rank
  121. Timestamp - after RAM initialization: 1605367370
  122. Unhiding PEG10.
  123. Unhiding PEG11.
  124. SMM Memory Map
  125. SMRAM : 0x7f800000 0x800000
  126. Subregion 0: 0x7f800000 0x300000
  127. Subregion 1: 0x7fb00000 0x100000
  128. Subregion 2: 0x7fc00000 0x400000
  129. MTRR Range: Start=7f000000 End=80000000 (Size 1000000)
  130. MTRR Range: Start=ff800000 End=0 (Size 800000)
  131. S3 Resume
  132. Timestamp - end of romstage: 2346372267
  133. BS: romstage times (exec / console): total (unknown) / 270 ms
  134.  
  135.  
  136. coreboot-4.13-2365-gec05ced278-dirty-GLETA1WW (2.55) Sat Feb 27 00:35:20 UTC 2021 postcar starting (log level: 4)...
  137. Timestamp - start of postcar: 2379417187
  138. Timestamp - end of postcar: 2379428366
  139. S3 Resume
  140. Jumping to image.
  141.  
  142.  
  143. coreboot-4.13-2365-gec05ced278-dirty-GLETA1WW (2.55) Sat Feb 27 00:35:20 UTC 2021 ramstage starting (log level: 4)...
  144. Timestamp - start of ramstage: 2380330397
  145. S3 Resume
  146. Timestamp - device enumeration: 2380368633
  147. Enumerating buses...
  148. Root Device scanning...
  149. CPU_CLUSTER: 0 enabled
  150. DOMAIN: 0000 enabled
  151. DOMAIN: 0000 scanning...
  152. PCI: pci_scan_bus for bus 00
  153. PCI: 00:00.0 [8086/0c04] enabled
  154. PCI: Static device PCI: 00:01.0 not found, disabling it.
  155. PCI: 00:01.1 [8086/0c05] enabled
  156. PCI: 00:02.0 [8086/0416] enabled
  157. PCI: 00:03.0 [8086/0c0c] enabled
  158. PCI: 00:04.0 [8086/0c03] enabled
  159. PCI: 00:14.0 [8086/8c31] enabled
  160. PCI: 00:16.0 [8086/8c3a] disabled
  161. PCI: 00:16.1: Disabling device
  162. PCI: 00:16.2: Disabling device
  163. PCI: 00:16.3: Disabling device
  164. PCI: 00:19.0 [8086/153a] enabled
  165. PCI: 00:1a.0 [8086/8c2d] enabled
  166. PCI: 00:1b.0 [8086/8c20] enabled
  167. PCIe Root Port 1 ASPM is disabled
  168. PCI: 00:1c.0 [8086/8c10] enabled
  169. PCIe Root Port 2 ASPM is disabled
  170. PCI: 00:1c.1 [8086/8c12] enabled
  171. PCI: 00:1c.2 [8086/8c14] disabled
  172. PCI: 00:1c.3 [8086/8c16] disabled
  173. Adjusted number of PCIe root ports to 5 as per strpfusecfg2
  174. PCI: 00:1c.2: Disabling device
  175. PCI: 00:1c.3: Disabling device
  176. PCI: 00:1c.4: Disabling device
  177. PCI: 00:1c.4 [8086/8c18] disabled
  178. PCI: 00:1d.0 [8086/8c26] enabled
  179. PCI: 00:1f.0 [8086/8c4f] enabled
  180. PCI: 00:1f.2 [8086/8c03] enabled
  181. PCI: 00:1f.3 [8086/8c22] enabled
  182. PCI: 00:1f.5: Disabling device
  183. PCI: 00:1f.6: Disabling device
  184. PCI: Leftover static devices:
  185. PCI: 00:01.0
  186. PCI: 00:16.1
  187. PCI: 00:16.2
  188. PCI: 00:16.3
  189. PCI: 00:1c.5
  190. PCI: 00:1c.6
  191. PCI: 00:1c.7
  192. PCI: 00:1f.5
  193. PCI: 00:1f.6
  194. PCI: Check your devicetree.cb.
  195. PCI: 00:01.1 scanning...
  196. PCI: pci_scan_bus for bus 01
  197. scan_bus: bus PCI: 00:01.1 finished in 0 msecs
  198. PCI: 00:1c.0 scanning...
  199. PCI: pci_scan_bus for bus 02
  200. PCI: 02:00.0 [10ec/5227] enabled
  201. Enabling Common Clock Configuration
  202. ASPM: Enabled L0s and L1
  203. PCIe: Max_Payload_Size adjusted to 128
  204. scan_bus: bus PCI: 00:1c.0 finished in 0 msecs
  205. PCI: 00:1c.1 scanning...
  206. PCI: pci_scan_bus for bus 03
  207. PCI: 03:00.0 [8086/095b] enabled
  208. Enabling Common Clock Configuration
  209. ASPM: Enabled L1
  210. PCIe: Max_Payload_Size adjusted to 128
  211. scan_bus: bus PCI: 00:1c.1 finished in 0 msecs
  212. PCI: 00:1f.0 scanning...
  213. No CMOS option 'touchpad'.
  214. PMH7: ID 05 Revision 01
  215. PNP: 00ff.1 enabled
  216. H8: EC Firmware ID GLHT29WW-3.23, Version 2.01B
  217. No CMOS option 'bluetooth'.
  218. H8: WWAN detection not implemented. Assuming WWAN installed
  219. No CMOS option 'wwan'.
  220. PNP: 00ff.2 enabled
  221. PNP: 0c31.0 enabled
  222. scan_bus: bus PCI: 00:1f.0 finished in 5 msecs
  223. PCI: 00:1f.3 scanning...
  224. scan_bus: bus PCI: 00:1f.3 finished in 0 msecs
  225. scan_bus: bus DOMAIN: 0000 finished in 6 msecs
  226. scan_bus: bus Root Device finished in 6 msecs
  227. done
  228. BS: BS_DEV_ENUMERATE run times (exec / console): 6 / 0 ms
  229. FMAP: area RW_MRC_CACHE found @ 20000 (65536 bytes)
  230. FMAP: area RW_MRC_CACHE found @ 20000 (65536 bytes)
  231. MRC: Checking cached data update for 'RW_MRC_CACHE'.
  232. flash size 0x2800000 bytes
  233. SF: Detected 00 0000 with sector size 0x1000, total 0x2800000
  234. SF size 0x2800000 does not correspond to CONFIG_ROM_SIZE 0xc00000!!
  235. MRC: 'RW_MRC_CACHE' does not need update.
  236. BS: BS_DEV_ENUMERATE exit times (exec / console): 3 / 0 ms
  237. Timestamp - device configuration: 2406894165
  238. found VGA at PCI: 00:02.0
  239. Setting up VGA for PCI: 00:02.0
  240. Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
  241. Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
  242. Allocating resources...
  243. Reading resources...
  244. mc_add_fixed_mmio_resources: Adding MCHBAR @ 48 0xfed10000-0xfed17fff.
  245. mc_add_fixed_mmio_resources: Adding DMIBAR @ 68 0xfed18000-0xfed18fff.
  246. mc_add_fixed_mmio_resources: Adding EPBAR @ 40 0xfed19000-0xfed19fff.
  247. mc_add_fixed_mmio_resources: Adding GDXCBAR @ 5420 0xfed84000-0xfed84fff.
  248. Adding PCIe enhanced config space BAR 0xf0000000-0xf4000000.
  249. MC MAP: TOM: 0x300000000
  250. MC MAP: TOUUD: 0x37de00000
  251. MC MAP: MESEG_BASE: 0x7ffff00000
  252. MC MAP: MESEG_LIMIT: 0xfffff
  253. MC MAP: REMAP_BASE: 0x300000000
  254. MC MAP: REMAP_LIMIT: 0x37ddfffff
  255. MC MAP: TOLUD: 0x82200000
  256. MC MAP: BGSM: 0x80000000
  257. MC MAP: BDSM: 0x80200000
  258. MC MAP: TSEGMB: 0x7f800000
  259. MC MAP: GGC: 0x209
  260. MC MAP: DPR: 0x7f800001
  261. PNP: 00ff.1 missing read_resources
  262. PNP: 00ff.2 missing read_resources
  263. Done reading resources.
  264. ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
  265. PCI: 00:1c.0 io: size: 0 align: 12 gran: 12 limit: ffff
  266. PCI: 00:1c.0 io: size: 0 align: 12 gran: 12 limit: ffff done
  267. PCI: 00:1c.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
  268. PCI: 02:00.0 10 * [0x0 - 0xfff] mem
  269. PCI: 00:1c.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
  270. PCI: 00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
  271. PCI: 00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
  272. PCI: 00:1c.1 io: size: 0 align: 12 gran: 12 limit: ffff
  273. PCI: 00:1c.1 io: size: 0 align: 12 gran: 12 limit: ffff done
  274. PCI: 00:1c.1 mem: size: 0 align: 20 gran: 20 limit: ffffffff
  275. PCI: 03:00.0 10 * [0x0 - 0x1fff] mem
  276. PCI: 00:1c.1 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
  277. PCI: 00:1c.1 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
  278. PCI: 00:1c.1 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
  279. === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
  280. DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
  281. update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
  282. update_constraints: PCI: 00:1f.0 84 base 00001600 limit 0000167f io (fixed)
  283. update_constraints: PCI: 00:1f.0 88 base 000015e0 limit 000015ef io (fixed)
  284. update_constraints: PNP: 00ff.1 77 base 000015e0 limit 000015ef io (fixed)
  285. update_constraints: PCI: 00:1f.3 20 base 00000400 limit 0000041f io (fixed)
  286. DOMAIN: 0000: Resource ranges:
  287. * Base: 1000, Size: 5e0, Tag: 100
  288. * Base: 15f0, Size: 10, Tag: 100
  289. * Base: 1680, Size: e980, Tag: 100
  290. PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
  291. PCI: 00:19.0 18 * [0x1040 - 0x105f] limit: 105f io
  292. PCI: 00:1f.2 20 * [0x1060 - 0x107f] limit: 107f io
  293. PCI: 00:1f.2 10 * [0x1080 - 0x1087] limit: 1087 io
  294. PCI: 00:1f.2 18 * [0x1088 - 0x108f] limit: 108f io
  295. PCI: 00:1f.2 14 * [0x1090 - 0x1093] limit: 1093 io
  296. PCI: 00:1f.2 1c * [0x1094 - 0x1097] limit: 1097 io
  297. DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
  298. DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
  299. update_constraints: PCI: 00:00.0 48 base fed10000 limit fed17fff mem (fixed)
  300. update_constraints: PCI: 00:00.0 68 base fed18000 limit fed18fff mem (fixed)
  301. update_constraints: PCI: 00:00.0 40 base fed19000 limit fed19fff mem (fixed)
  302. update_constraints: PCI: 00:00.0 5420 base fed84000 limit fed84fff mem (fixed)
  303. update_constraints: PCI: 00:00.0 60 base f0000000 limit f3ffffff mem (fixed)
  304. update_constraints: PCI: 00:00.0 00 base fed90000 limit fed90fff mem (fixed)
  305. update_constraints: PCI: 00:00.0 01 base fed91000 limit fed91fff mem (fixed)
  306. update_constraints: PCI: 00:00.0 02 base 00000000 limit 0009ffff mem (fixed)
  307. update_constraints: PCI: 00:00.0 03 base 000c0000 limit 7f7fffff mem (fixed)
  308. update_constraints: PCI: 00:00.0 04 base 7f800000 limit 7fffffff mem (fixed)
  309. update_constraints: PCI: 00:00.0 05 base 80000000 limit 821fffff mem (fixed)
  310. update_constraints: PCI: 00:00.0 06 base 100000000 limit 37ddfffff mem (fixed)
  311. update_constraints: PCI: 00:00.0 07 base 000a0000 limit 000bffff mem (fixed)
  312. update_constraints: PCI: 00:00.0 08 base 000c0000 limit 000fffff mem (fixed)
  313. update_constraints: PCI: 00:1f.0 31fe base fec00000 limit ffffffff mem (fixed)
  314. update_constraints: PNP: 0c31.0 00 base fed40000 limit fed44fff mem (fixed)
  315. DOMAIN: 0000: Resource ranges:
  316. * Base: 82200000, Size: 6de00000, Tag: 200
  317. * Base: f4000000, Size: ac00000, Tag: 200
  318. * Base: 37de00000, Size: 7c82200000, Tag: 100200
  319. PCI: 00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem
  320. PCI: 00:02.0 10 * [0x82400000 - 0x827fffff] limit: 827fffff mem
  321. PCI: 00:1c.0 20 * [0x82200000 - 0x822fffff] limit: 822fffff mem
  322. PCI: 00:1c.1 20 * [0x82300000 - 0x823fffff] limit: 823fffff mem
  323. PCI: 00:19.0 10 * [0x82800000 - 0x8281ffff] limit: 8281ffff mem
  324. PCI: 00:14.0 10 * [0x82820000 - 0x8282ffff] limit: 8282ffff mem
  325. PCI: 00:04.0 10 * [0x82830000 - 0x82837fff] limit: 82837fff mem
  326. PCI: 00:03.0 10 * [0x82838000 - 0x8283bfff] limit: 8283bfff mem
  327. PCI: 00:1b.0 10 * [0x8283c000 - 0x8283ffff] limit: 8283ffff mem
  328. PCI: 00:19.0 14 * [0x82840000 - 0x82840fff] limit: 82840fff mem
  329. PCI: 00:1f.2 24 * [0x82841000 - 0x828417ff] limit: 828417ff mem
  330. PCI: 00:1a.0 10 * [0x82842000 - 0x828423ff] limit: 828423ff mem
  331. PCI: 00:1d.0 10 * [0x82843000 - 0x828433ff] limit: 828433ff mem
  332. PCI: 00:1f.3 10 * [0x82844000 - 0x828440ff] limit: 828440ff mem
  333. DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
  334. PCI: 00:1c.0 mem: base: 82200000 size: 100000 align: 20 gran: 20 limit: 822fffff
  335. PCI: 00:1c.0: Resource ranges:
  336. * Base: 82200000, Size: 100000, Tag: 200
  337. PCI: 02:00.0 10 * [0x82200000 - 0x82200fff] limit: 82200fff mem
  338. PCI: 00:1c.0 mem: base: 82200000 size: 100000 align: 20 gran: 20 limit: 822fffff done
  339. PCI: 00:1c.1 mem: base: 82300000 size: 100000 align: 20 gran: 20 limit: 823fffff
  340. PCI: 00:1c.1: Resource ranges:
  341. * Base: 82300000, Size: 100000, Tag: 200
  342. PCI: 03:00.0 10 * [0x82300000 - 0x82301fff] limit: 82301fff mem
  343. PCI: 00:1c.1 mem: base: 82300000 size: 100000 align: 20 gran: 20 limit: 823fffff done
  344. === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
  345. PCI: 00:01.1 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
  346. PCI: 00:01.1 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
  347. PCI: 00:01.1 20 <- [0x00ffffffff - 0x00fffffffe] size 0x00000000 gran 0x14 bus 01 mem
  348. PCI: 00:02.0 10 <- [0x0082400000 - 0x00827fffff] size 0x00400000 gran 0x16 mem64
  349. PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64
  350. PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
  351. PCI: 00:03.0 10 <- [0x0082838000 - 0x008283bfff] size 0x00004000 gran 0x0e mem64
  352. PCI: 00:04.0 10 <- [0x0082830000 - 0x0082837fff] size 0x00008000 gran 0x0f mem64
  353. PCI: 00:14.0 10 <- [0x0082820000 - 0x008282ffff] size 0x00010000 gran 0x10 mem64
  354. PCI: 00:19.0 10 <- [0x0082800000 - 0x008281ffff] size 0x00020000 gran 0x11 mem
  355. PCI: 00:19.0 14 <- [0x0082840000 - 0x0082840fff] size 0x00001000 gran 0x0c mem
  356. PCI: 00:19.0 18 <- [0x0000001040 - 0x000000105f] size 0x00000020 gran 0x05 io
  357. PCI: 00:1a.0 10 <- [0x0082842000 - 0x00828423ff] size 0x00000400 gran 0x0a mem
  358. PCI: 00:1b.0 10 <- [0x008283c000 - 0x008283ffff] size 0x00004000 gran 0x0e mem64
  359. PCI: 00:1c.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 02 io
  360. PCI: 00:1c.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 02 prefmem
  361. PCI: 00:1c.0 20 <- [0x0082200000 - 0x00822fffff] size 0x00100000 gran 0x14 bus 02 mem
  362. PCI: 02:00.0 10 <- [0x0082200000 - 0x0082200fff] size 0x00001000 gran 0x0c mem
  363. PCI: 00:1c.1 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 03 io
  364. PCI: 00:1c.1 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 03 prefmem
  365. PCI: 00:1c.1 20 <- [0x0082300000 - 0x00823fffff] size 0x00100000 gran 0x14 bus 03 mem
  366. PCI: 03:00.0 10 <- [0x0082300000 - 0x0082301fff] size 0x00002000 gran 0x0d mem64
  367. PCI: 00:1d.0 10 <- [0x0082843000 - 0x00828433ff] size 0x00000400 gran 0x0a mem
  368. PNP: 00ff.1 missing set_resources
  369. PNP: 00ff.2 missing set_resources
  370. PCI: 00:1f.2 10 <- [0x0000001080 - 0x0000001087] size 0x00000008 gran 0x03 io
  371. PCI: 00:1f.2 14 <- [0x0000001090 - 0x0000001093] size 0x00000004 gran 0x02 io
  372. PCI: 00:1f.2 18 <- [0x0000001088 - 0x000000108f] size 0x00000008 gran 0x03 io
  373. PCI: 00:1f.2 1c <- [0x0000001094 - 0x0000001097] size 0x00000004 gran 0x02 io
  374. PCI: 00:1f.2 20 <- [0x0000001060 - 0x000000107f] size 0x00000020 gran 0x05 io
  375. PCI: 00:1f.2 24 <- [0x0082841000 - 0x00828417ff] size 0x00000800 gran 0x0b mem
  376. PCI: 00:1f.3 10 <- [0x0082844000 - 0x00828440ff] size 0x00000100 gran 0x08 mem64
  377. Done setting resources.
  378. Done allocating resources.
  379. BS: BS_DEV_RESOURCES run times (exec / console): 1 / 0 ms
  380. Timestamp - device enable: 2410962531
  381. Enabling resources...
  382. PCI: 00:00.0 subsystem <- 17aa/220e
  383. PCI: 00:00.0 cmd <- 06
  384. PCI: 00:01.1 bridge ctrl <- 0013
  385. PCI: 00:01.1 cmd <- 00
  386. PCI: 00:02.0 subsystem <- 17aa/220e
  387. PCI: 00:02.0 cmd <- 03
  388. PCI: 00:03.0 subsystem <- 17aa/220e
  389. PCI: 00:03.0 cmd <- 02
  390. PCI: 00:04.0 cmd <- 02
  391. PCI: 00:14.0 subsystem <- 17aa/220e
  392. PCI: 00:14.0 cmd <- 102
  393. PCI: 00:19.0 subsystem <- 17aa/220e
  394. PCI: 00:19.0 cmd <- 103
  395. PCI: 00:1a.0 subsystem <- 17aa/220e
  396. PCI: 00:1a.0 cmd <- 106
  397. PCI: 00:1b.0 subsystem <- 17aa/220e
  398. PCI: 00:1b.0 cmd <- 102
  399. PCI: 00:1c.0 bridge ctrl <- 0013
  400. PCI: 00:1c.0 subsystem <- 17aa/220e
  401. PCI: 00:1c.0 cmd <- 06
  402. PCI: 00:1c.1 bridge ctrl <- 0013
  403. PCI: 00:1c.1 subsystem <- 17aa/220e
  404. PCI: 00:1c.1 cmd <- 06
  405. PCI: 00:1d.0 subsystem <- 17aa/220e
  406. PCI: 00:1d.0 cmd <- 106
  407. PCI: 00:1f.0 subsystem <- 17aa/220e
  408. PCI: 00:1f.0 cmd <- 107
  409. PCI: 00:1f.2 subsystem <- 17aa/220e
  410. PCI: 00:1f.2 cmd <- 103
  411. PCI: 00:1f.3 subsystem <- 17aa/220e
  412. PCI: 00:1f.3 cmd <- 103
  413. PCI: 02:00.0 cmd <- 02
  414. PCI: 03:00.0 cmd <- 02
  415. done.
  416. Found TPM ST33ZP24 by ST Microelectronics
  417. TPM: Handle S3 resume.
  418. TPM: Resume
  419. TPM: command 0x99 returned 0x0
  420. TPM: setup succeeded
  421. BS: BS_DEV_INIT entry times (exec / console): 106 / 0 ms
  422. Timestamp - device initialization: 2718642773
  423. Initializing devices...
  424. CPU_CLUSTER: 0 init
  425. MTRR: Physical address space:
  426. 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
  427. 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
  428. 0x00000000000c0000 - 0x0000000080000000 size 0x7ff40000 type 6
  429. 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 0
  430. 0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1
  431. 0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0
  432. 0x0000000100000000 - 0x000000037de00000 size 0x27de00000 type 6
  433. MTRR: Fixed MSR 0x250 0x0606060606060606
  434. MTRR: Fixed MSR 0x258 0x0606060606060606
  435. MTRR: Fixed MSR 0x259 0x0000000000000000
  436. MTRR: Fixed MSR 0x268 0x0606060606060606
  437. MTRR: Fixed MSR 0x269 0x0606060606060606
  438. MTRR: Fixed MSR 0x26a 0x0606060606060606
  439. MTRR: Fixed MSR 0x26b 0x0606060606060606
  440. MTRR: Fixed MSR 0x26c 0x0606060606060606
  441. MTRR: Fixed MSR 0x26d 0x0606060606060606
  442. MTRR: Fixed MSR 0x26e 0x0606060606060606
  443. MTRR: Fixed MSR 0x26f 0x0606060606060606
  444. CPU physical address size: 39 bits
  445. MTRR: default type WB/UC MTRR counts: 4/4.
  446. MTRR: UC selected as default type.
  447. MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
  448. MTRR: 1 base 0x0000000090000000 mask 0x0000007ff0000000 type 1
  449. MTRR: 2 base 0x0000000100000000 mask 0x0000007f00000000 type 6
  450. MTRR: 3 base 0x0000000200000000 mask 0x0000007e00000000 type 6
  451.  
  452. MTRR check
  453. Fixed MTRRs : Enabled
  454. Variable MTRRs: Enabled
  455.  
  456. Initializing VR config.
  457. CPU has 2 cores, 4 threads enabled.
  458. Setting up SMI for CPU
  459. Will perform SMM setup.
  460. CBFS: Found 'cpu_microcode_blob.bin' @0x8c80 size 0xb400 in mcache @0x7f7fd090
  461. microcode: sig=0x306c3 pf=0x10 revision=0x28
  462. CPU: Intel(R) Core(TM) i7-4600M CPU @ 2.90GHz.
  463. Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
  464. Processing 16 relocs. Offset value of 0x00030000
  465. Attempting to start 3 APs
  466. Waiting for 10ms after sending INIT.
  467. Waiting for 1st SIPI to complete...done.
  468. Waiting for 2nd SIPI to complete...done.
  469. AP: slot 1 apic_id 1, MCU rev: 0x00000028
  470. AP: slot 2 apic_id 2, MCU rev: 0x00000028
  471. AP: slot 3 apic_id 3, MCU rev: 0x00000028
  472. Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
  473. Processing 13 relocs. Offset value of 0x00038000
  474. SMM Module: stub loaded at 0x00038000. Will call 0x7f79732e(0x00000000)
  475. Installing permanent SMM handler to 0x7f800000
  476. Loading module at 0x7f810000 with entry 0x7f810d9d. filesize: 0x4790 memsize: 0x88d0
  477. Processing 278 relocs. Offset value of 0x7f810000
  478. Loading module at 0x7f808000 with entry 0x7f808000. filesize: 0x1b8 memsize: 0x1b8
  479. Processing 13 relocs. Offset value of 0x7f808000
  480. SMM Module: placing jmp sequence at 0x7f807c00 rel16 0x03fd
  481. SMM Module: placing jmp sequence at 0x7f807800 rel16 0x07fd
  482. SMM Module: placing jmp sequence at 0x7f807400 rel16 0x0bfd
  483. SMM Module: stub loaded at 0x7f808000. Will call 0x7f810d9d(0x00000000)
  484. Initializing Southbridge SMI...
  485. SMI_STS: MCSMI PM1
  486. WAK PWRBTN smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7f800000, cpu = 0
  487. In relocation handler: CPU 0
  488. New SMBASE=0x7f800000 IEDBASE=0x7fc00000
  489. Writing SMRR. base = 0x7f800006, mask=0xff800800
  490. Relocation complete.
  491. microcode: Update skipped, already up-to-date
  492. smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7f7ffc00, cpu = 1
  493. In relocation handler: CPU 1
  494. New SMBASE=0x7f7ffc00 IEDBASE=0x7fc00000
  495. Writing SMRR. base = 0x7f800006, mask=0xff800800
  496. Relocation complete.
  497. microcode: Update skipped, already up-to-date
  498. smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7f7ff800, cpu = 2
  499. In relocation handler: CPU 2
  500. New SMBASE=0x7f7ff800 IEDBASE=0x7fc00000
  501. Writing SMRR. base = 0x7f800006, mask=0xff800800
  502. Relocation complete.
  503. microcode: Update skipped, already up-to-date
  504. smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7f7ff400, cpu = 3
  505. In relocation handler: CPU 3
  506. New SMBASE=0x7f7ff400 IEDBASE=0x7fc00000
  507. Writing SMRR. base = 0x7f800006, mask=0xff800800
  508. Relocation complete.
  509. microcode: Update skipped, already up-to-date
  510. Initializing CPU #0
  511. CPU: vendor Intel device 306c3
  512. CPU: family 06, model 3c, stepping 03
  513. Setting up local APIC...
  514. apic_id: 0x00 done.
  515. VMX status: enabled
  516. IA32_FEATURE_CONTROL status: locked
  517. cpu: energy policy set to 6
  518. Turbo is available but hidden
  519. Turbo is available and visible
  520. CPU #0 initialized
  521. Initializing CPU #1
  522. Initializing CPU #2
  523. Initializing CPU #3
  524. CPU: vendor Intel device 306c3
  525. CPU: family 06, model 3c, stepping 03
  526. CPU: vendor Intel device 306c3
  527. CPU: family 06, model 3c, stepping 03
  528. CPU: vendor Intel device 306c3
  529. CPU: family 06, model 3c, stepping 03
  530. Setting up local APIC...
  531. Setting up local APIC...
  532. apic_id: 0x02 done.
  533. Setting up local APIC...
  534. apic_id: 0x03 done.
  535. VMX status: enabled
  536. VMX status: enabled
  537. IA32_FEATURE_CONTROL status: locked
  538. apic_id: 0x01 done.
  539. IA32_FEATURE_CONTROL status: locked
  540. VMX status: enabled
  541. IA32_FEATURE_CONTROL status: locked
  542. cpu: energy policy set to 6
  543. CPU #2 initialized
  544. cpu: energy policy set to 6
  545. CPU #3 initialized
  546. cpu: energy policy set to 6
  547. CPU #1 initialized
  548. bsp_do_flight_plan done after 1 msecs.
  549. CPU: frequency set to 3600
  550. Enabling SMIs.
  551. Locking SMM.
  552. CPU_CLUSTER: 0 init finished in 17 msecs
  553. PCI: 00:00.0 init
  554. Disabling PEG12.
  555. Disabling PEG10.
  556. Disabling "device 7".
  557. Set BIOS_RESET_CPL
  558. CPU TDP: 37 Watts
  559. PCI: 00:00.0 init finished in 1 msecs
  560. PCI: 00:01.1 init
  561. PCI: 00:01.1 init finished in 0 msecs
  562. PCI: 00:02.0 init
  563. GT Power Management Init
  564. GMA: Setting backlight PWM frequency to 135MHz / 128 / 4794 = 220Hz
  565. framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
  566. x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000
  567. GT Power Management Init (post VBIOS)
  568. PCI: 00:02.0 init finished in 219 msecs
  569. PCI: 00:03.0 init
  570. Mini-HD: base = 0x82838000
  571. HDA: No codec!
  572. PCI: 00:03.0 init finished in 51 msecs
  573. PCI: 00:04.0 init
  574. PCI: 00:04.0 init finished in 0 msecs
  575. PCI: 00:14.0 init
  576. PCI: 00:14.0 init finished in 0 msecs
  577. PCI: 00:19.0 init
  578. PCI: 00:19.0 init finished in 0 msecs
  579. PCI: 00:1a.0 init
  580. EHCI: Setting up controller.. done.
  581. PCI: 00:1a.0 init finished in 0 msecs
  582. PCI: 00:1b.0 init
  583. Azalia: base = 0x8283c000
  584. Azalia: codec_mask = 01
  585. HDA: Initializing codec #0
  586. HDA: codec viddid: 10ec0292
  587. HDA: verb loaded.
  588. PCI: 00:1b.0 init finished in 6 msecs
  589. PCI: 00:1c.0 init
  590. Initializing PCH PCIe bridge.
  591. PCI: 00:1c.0 init finished in 0 msecs
  592. PCI: 00:1c.1 init
  593. Initializing PCH PCIe bridge.
  594. PCI: 00:1c.1 init finished in 0 msecs
  595. PCI: 00:1d.0 init
  596. EHCI: Setting up controller.. done.
  597. PCI: 00:1d.0 init finished in 0 msecs
  598. PCI: 00:1f.0 init
  599. pch: lpc_init
  600. IOAPIC: Initializing IOAPIC at 0xfec00000
  601. IOAPIC: Bootstrap Processor Local APIC = 0x00
  602. IOAPIC: ID = 0x02
  603. Set power off after power failure.
  604. NMI sources enabled.
  605. LynxPoint H PM init
  606. RTC: failed = 0x0
  607. PCI: 00:1f.0 init finished in 0 msecs
  608. PCI: 00:1f.2 init
  609. SATA: Initializing...
  610. SATA: Controller in AHCI mode.
  611. ABAR: 0x82841000
  612. PCI: 00:1f.2 init finished in 0 msecs
  613. PCI: 00:1f.3 init
  614. PCI: 00:1f.3 init finished in 0 msecs
  615. PCI: 02:00.0 init
  616. PCI: 02:00.0 init finished in 0 msecs
  617. PCI: 03:00.0 init
  618. PCI: 03:00.0 init finished in 0 msecs
  619. PNP: 00ff.2 init
  620. PNP: 00ff.2 init finished in 0 msecs
  621. Devices initialized
  622. BS: BS_DEV_INIT run times (exec / console): 296 / 0 ms
  623. FMAP: area SMMSTORE found @ 30000 (262144 bytes)
  624. smm store: 4 # blocks with size 0x10000
  625. SMMSTORE: Setting up SMI handler
  626. Finalize devices...
  627. PCI: 00:1f.0 final
  628. apm_control: Finalizing SMM.
  629. APMC done.
  630. Devices finalized
  631. Timestamp - device setup done: 3595086344
  632. Trying to find the wakeup vector...
  633. Looking on 0x000f0000 for valid checksum
  634. Checksum 1 passed
  635. Checksum 2 passed all OK
  636. RSDP found at 0x000f0000
  637. RSDT found at 0x7f727030 ends at 0x7f727070
  638. FADT found at 0x7f72a990
  639. FACS found at 0x7f727240
  640. OS waking vector is 0x0009a1f0
  641. Timestamp - ACPI wake jump: 3595217664
  642.  
  643. Mapping 16B of physical memory at 0x7f7dc000 (requested 0x7f7dc000).
  644. Timestamp tick frequency: 2900 MHz
  645. Mapping 220B of physical memory at 0x7f7dc000 (requested 0x7f7dc000).
  646. 0 8790 8790 1st timestamp
  647. 11 127003 118213 start of bootblock
  648. 12 127554 551 end of bootblock
  649. 13 127979 425 starting to load romstage
  650. 14 127993 13 finished loading romstage
  651. 1 128111 118 start of romstage
  652. 2 181523 53412 before RAM initialization
  653. 3 562365 380841 after RAM initialization
  654. 4 817884 255518 end of romstage
  655. 100 829278 11394 start of postcar
  656. 101 829282 3 end of postcar
  657. 10 829593 311 start of ramstage
  658. 30 829607 13 device enumeration
  659. 40 838753 9146 device configuration
  660. 50 840156 1402 device enable
  661. 60 946253 106096 device initialization
  662. 70 1248475 302221 device setup done
  663. 98 1248520 45 ACPI wake jump
  664.  
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