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Jun 27th, 2017
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  1. .include "m128def.inc"
  2.  
  3. .def temp=r16
  4. .def counter=r17
  5. .def resultl=r18
  6. .def resulth=r19
  7.  
  8. .cseg
  9.  
  10. .org $0000
  11. jmp reset
  12.  
  13. .org $0018
  14. jmp TIMER1_COMPA_ISR
  15.  
  16. .org $0100
  17. reset:
  18. ldi temp, low(RAMEND)
  19. out SPL, temp
  20. ldi temp, high(RAMEND)
  21. out SPH, temp
  22.  
  23. clr counter
  24. clr resultl
  25. clr resulth
  26.  
  27. ; max compare value: 65535
  28. ; max prescaler: 1024
  29. ; 65535 / (4MHz / 1024) = 16s
  30.  
  31. ser temp
  32. out OCR1AH, temp
  33. out OCR1AL, temp
  34.  
  35. ldi temp, (1 << OCIE1A)
  36. out TIMSK, temp
  37.  
  38. clr temp
  39. out TCCR1A, temp
  40. ldi temp, (1 << WGM12) | (1 << CS12) | (1 << CS10) ; CTC mode, prescaler = 1024
  41. out TCCR1B, temp
  42.  
  43. ldi temp, (1 << REFS0) ; AVcc, input: ADC0
  44. out ADMUX, temp
  45.  
  46. ldi temp, 0b11001111 ; enable, start of conversion, single conversion mode, interrupt enable, max prescaler
  47. out ADCSRA, temp
  48.  
  49. set
  50. sei
  51.  
  52. loop:
  53. sbis ADCSRA, ADIF ; do we have a ready result?
  54. rjmp loop
  55.  
  56. in temp, ADCL
  57. add resultl, temp
  58. in temp, ADCH
  59. adc resulth, temp
  60.  
  61. sbi ADCSRA, ADIF ; manually clear flag (by setting it)
  62. sbi ADCSRA, ADSC ; manually start next conversion (single conversion mode)
  63. brts loop
  64. rjmp reset
  65.  
  66. TIMER1_COMPA_ISR:
  67. cpi counter, 8 ; 8 * 16s = 128s
  68. brlo next
  69.  
  70. ; divide result by 128 (= 7 right rotations) to get average
  71.  
  72. lsr resulth
  73. ror resultl
  74.  
  75. lsr resulth
  76. ror resultl
  77.  
  78. lsr resulth
  79. ror resultl
  80.  
  81. lsr resulth
  82. ror resultl
  83.  
  84. lsr resulth
  85. ror resultl
  86.  
  87. lsr resulth
  88. ror resultl
  89.  
  90. lsr resulth
  91. ror resultl
  92.  
  93. clt
  94. next:
  95. inc counter
  96. reti
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