//This uses the 9's compliment, 10's compliment (9's compliment + 1), Binary Coded Decimal, Binary Coded Decimal addition (if >10 add +6), and ripple-carry adder connections

//For example

//Sum = 22 - 11
//X >= Y
//Sum = 22 + (99 - 11) + 1 -100
//Sum = 11

//Sum = 57 - 99
//X < Y
//Sum = 100 - (57 + (99 - 99) + 1)

//Comments show what code is related to what type of operands and overflow and producing the 9's compliment of Y.
//nY1 is like Y1 but the n is there for 9. (9 - Y1 = nY1)
//NX1 is like X1 but the capital N is there for negative number - negative number
//pmp means positive minus positive
//S2 is sum bit 2. three BCD are needed for X1X0 - Y1Y0
//Negative number - negative number is done by swapping X and Y in the first always block and then adding a capital N to instantiations on line 41-45

module BCD_Subtractor_ndigits(input [3:0]X0, input [3:0]Y0, input [3:0]X1, input [3:0]Y1, input SignofX, input SignofY, output reg [3:0]result_S0, output reg [3:0]result_S1, output reg [3:0]result_S2, output reg Signbit, output reg overflow);
	reg [3:0]nY1;
	reg [3:0]nY0;
	reg [3:0]NnY1;
	reg [3:0]NnY0;
	reg [3:0]NX1;
	reg [3:0]NX0;

	always@(*) //overflow and 99 - Y1Y0 (9's compliment)
		begin
			overflow = X1 > 9 | X0 > 9 | Y1 > 9 | Y0 > 9;
			nY1 = 9 - Y1; //9 - Y
			nY0 = 9 - Y0; //9 - Y

			NnY1 = 9 - X1; //flipped X and Y
			NnY0 = 9 - X0;
			NX1 = Y1;
			NX0 = Y0;
		end

	//Positive number - positive number
	BCD_Adder b1 (nY0, 1, 0, nY0_plus1, carry_to_nY1); //+1 RCA
	BCD_Adder b1_2 (nY1, 0, carry_to_nY1, nY1_plus1, S2); //+1 RCA
	BCD_Adder b1_3 (nY0_plus1, X0, 0, result_pmp0, carry_to_nY1_plus1_plusX1); //+A RCA
	BCD_Adder b1_4 (nY1_plus1, X1, carry_to_nY1_plus1_plusX1, result_pmp1, carry_to_S2); //+A RCA
	BCD_Adder b1_5 (S2, 0, carry_to_S2, result_pmp2, useless1); //+A RCA
	//Negative number - negative number
	BCD_Adder b2 (NnY0, 0, 1'b1, NnY0_plus1, Ncarry_to_nY1); //+1 RCA
	BCD_Adder b2_2 (NnY1, 0, Ncarry_to_nY1, NnY1_plus1, NS2); //+1 RCA
	BCD_Adder b2_3 (NnY0_plus1, NX0, 0, Nresult_pmp0, Ncarry_to_nY1_plus1_plusX1); //+A RCA
	BCD_Adder b2_4 (NnY1_plus1, NX1, Ncarry_to_nY1_plus1_plusX1, Nresult_pmp1, Ncarry_to_S2); //+A RCA
	BCD_Adder b2_5 (NS2, 0, Ncarry_to_S2, Nresult_pmp2, Nuseless1); //+A RCA
	//Pos - Neg and Neg - Pos
	BCD_Adder b3 (Y0, X0, 0, Y0_plusX0, carry_to_S1);
	BCD_Adder b3_2 (Y1, X1, carry_to_S1, Y1_plusX1, carry_to_s2);
	BCD_Adder b3_3 (0, 0, carry_to_s2, result_s2, useless2);

	always@(*)
		begin
			if (~SignofX & ~SignofY) //Pos - Pos
				begin
					if ((X1 > Y1) | (X1 == Y1) & (X0 > Y0) | (X1 == Y1 & X0 == Y0)) //X >= Y
						begin
							result_S0 = result_pmp0;
							result_S1 = result_pmp1;
							result_S2 = result_pmp2 - 1;
							Signbit = 1'b0;
						end
					else if ((X1 < Y1) | (X1 == Y1) & (X0 < Y0)) //X < Y
						begin
							result_S0 = (100 - ((result_pmp1 * 10) + result_pmp0)) % 10;
							result_S1 = ((100 - ((result_pmp1 * 10) + result_pmp0)) - (100 - ((result_pmp1 * 10) + result_pmp0)) % 10) / 10;
							result_S2 = 0;
							Signbit = 1'b1;
						end
				end
			else if (SignofX & SignofY) //Neg - Neg
				begin
					if ((X1 > Y1) | (X1 == Y1) & (X0 > Y0) | (X1 == Y1 & X0 == Y0)) //X >= Y
						begin
							result_S0 = Nresult_pmp0;
							result_S1 = Nresult_pmp1;
							result_S2 = Nresult_pmp2 - 1;
							Signbit = 1'b0;
						end
					else if ((X1 < Y1) | (X1 == Y1) & (X0 < Y0)) //X < Y
						begin
							result_S0 = (100 - ((Nresult_pmp1 * 10) + Nresult_pmp0)) % 10;
							result_S1 = ((100 - ((Nresult_pmp1 * 10) + Nresult_pmp0)) - (100 - ((Nresult_pmp1 * 10) + Nresult_pmp0)) % 10) / 10;
							result_S2 = 0;
							Signbit = 1'b1;
						end
				end
			else if (~SignofX & SignofY) //Pos - Neg
				begin
						result_S0 = Y0_plusX0;
						result_S1 = Y1_plusX1;
						result_S2 = result_s2;
						Signbit = 1'b0;
				end
			else if (SignofX & ~SignofY) //Neg - Pos
				begin
						result_S0 = Y0_plusX0;
						result_S1 = Y1_plusX1;
						result_S2 = result_s2;
						Signbit = 1'b1;
				end
		end
endmodule
module BCD_Adder(input [3:0]X, input [3:0]Y, input carryin, output wire [3:0]S, output wire carry);
	wire [4:0]result;
	assign result = X + Y + carryin;
	assign carry = (result >= 10);
	assign S = result % 10;
endmodule


//Alternate BCD_Adder RCA format I used and did not fix the code
//	//Positive number - positive number
//	BCD_Adder b1 (nY0, 1, nY0_plus1, carry_to_nY1); //+1 RCA
//	BCD_Adder b1_2 (nY1, carry_to_nY1, nY1_plus1, S2); //+1 RCA
//	BCD_Adder b1_3 (nY0_plus1, X0, result_pmp0, carry_to_nY1_plus1_plusX1); //+A RCA
//	BCD_Adder b1_4 (nY1_plus1, X1 + carry_to_nY1_plus1_plusX1, result_pmp1, carry_to_S2); //+A RCA
//	BCD_Adder b1_5 (S2, carry_to_S2, result_pmp2, useless1); //+A RCA
//	//Negative number - negative number
//	BCD_Adder b2 (NnY0, 1, NnY0_plus1, Ncarry_to_nY1); //+1 RCA
//	BCD_Adder b2_2 (NnY1, Ncarry_to_nY1, NnY1_plus1, NS2); //+1 RCA
//	BCD_Adder b2_3 (NnY0_plus1, NX0, Nresult_pmp0, Ncarry_to_nY1_plus1_plusX1); //+A RCA
//	BCD_Adder b2_4 (NnY1_plus1, NX1 + Ncarry_to_nY1_plus1_plusX1, Nresult_pmp1, Ncarry_to_S2); //+A RCA
//	BCD_Adder b2_5 (NS2, Ncarry_to_S2, Nresult_pmp2, Nuseless1); //+A RCA
//	//Pos - Neg and Neg - Pos
//	BCD_Adder b3 (Y0, X0, Y0_plusX0, carry_to_S1); //+A RCA
//	BCD_Adder b3_2 (Y1, X1 + carry_to_S1, Y1_plusX1, carry_to_s2); //+A RCA
//	BCD_Adder b3_3 (0, carry_to_s2, result_s2, useless2); //+A RCA