library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
entity lab33 is
    Port (
        din     : in STD_LOGIC_VECTOR (3 downto 0);
        addr1   : in STD_LOGIC_VECTOR (1 downto 0);
        addr2   : in STD_LOGIC_VECTOR (1 downto 0);
        dout    : out STD_LOGIC_VECTOR (3 downto 0)
    );
end lab33;
architecture struct of lab33 is
    signal mux2demux : std_logic;

    component lab31 is
    Port (
        din     : in STD_LOGIC_VECTOR (3 downto 0);
        addr    : in STD_LOGIC_VECTOR (1 downto 0);
        dout    : out STD_LOGIC
    );
    end component lab31;
    component lab32 is
    Port (
        din     : in STD_LOGIC;
        addr    : in STD_LOGIC_VECTOR (1 downto 0);
        dout    : out STD_LOGIC_VECTOR (3 downto 0)
    );
    end component lab32;
begin
    demuxer : component lab31
        port map (dout => mux2demux, din => din, addr => addr1);
    muxer : component lab32
        port map (din => mux2demux, addr => addr2);


end struct;

----------------------------------------------------------------------------
## Switches
set_property PACKAGE_PIN V17 [get_ports {addr1[0]}]
    set_property IOSTANDARD LVCMOS33 [get_ports {addr1[0]}]
set_property PACKAGE_PIN V16 [get_ports {addr1[1]}]
    set_property IOSTANDARD LVCMOS33 [get_ports {addr1[1]}]
set_property PACKAGE_PIN W16 [get_ports {addr2[0]}]
    set_property IOSTANDARD LVCMOS33 [get_ports {addr2[0]}]
set_property PACKAGE_PIN W17 [get_ports {addr2[1]}]
    set_property IOSTANDARD LVCMOS33 [get_ports {addr2[1]}]

## LEDs
set_property PACKAGE_PIN U16 [get_ports {dout[0]}]
    set_property IOSTANDARD LVCMOS33 [get_ports {dout[0]}]
set_property PACKAGE_PIN E19 [get_ports {dout[1]}]
    set_property IOSTANDARD LVCMOS33 [get_ports {dout[1]}]
set_property PACKAGE_PIN U19 [get_ports {dout[2]}]
    set_property IOSTANDARD LVCMOS33 [get_ports {dout[2]}]
set_property PACKAGE_PIN V19 [get_ports {dout[3]}]
    set_property IOSTANDARD LVCMOS33 [get_ports {dout[3]}]

##Buttons
set_property PACKAGE_PIN U18 [get_ports din[0]]
    set_property IOSTANDARD LVCMOS33 [get_ports din[0]]
set_property PACKAGE_PIN T18 [get_ports din[1]]
    set_property IOSTANDARD LVCMOS33 [get_ports din[1]]
set_property PACKAGE_PIN W19 [get_ports din[2]]
    set_property IOSTANDARD LVCMOS33 [get_ports din[2]]
set_property PACKAGE_PIN T17 [get_ports din[3]]
    set_property IOSTANDARD LVCMOS33 [get_ports din[3]]