uaa

UART FCR register write tracing code (com.c, NetBSD)

uaa
Jan 11th, 2021
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  1. --- com.c.orig 2021-01-01 17:50:19.699234954 +0900
  2. +++ com.c 2021-01-11 18:13:47.723157894 +0900
  3. @@ -128,10 +128,12 @@ __KERNEL_RCSID(0, "$NetBSD: com.c,v 1.36
  4.  
  5. #include "ioconf.h"
  6.  
  7. +#if 0
  8. #define CSR_WRITE_1(r, o, v) \
  9. bus_space_write_1((r)->cr_iot, (r)->cr_ioh, (r)->cr_map[o], v)
  10. #define CSR_READ_1(r, o) \
  11. bus_space_read_1((r)->cr_iot, (r)->cr_ioh, (r)->cr_map[o])
  12. +#endif
  13. #define CSR_WRITE_2(r, o, v) \
  14. bus_space_write_2((r)->cr_iot, (r)->cr_ioh, (r)->cr_map[o], v)
  15. #define CSR_READ_2(r, o) \
  16. @@ -274,6 +276,76 @@ static const bus_size_t com_std_map[COM_
  17. #define COM_BARRIER(r, f) \
  18. bus_space_barrier((r)->cr_iot, (r)->cr_ioh, 0, (r)->cr_nports, (f))
  19.  
  20. +struct event_rec_t {
  21. + unsigned char reg;
  22. + unsigned char write;
  23. + unsigned char dat;
  24. +};
  25. +
  26. +#define MAX_EVENTS 2048
  27. +static struct event_rec_t event_rec[MAX_EVENTS] = {{0,0,0}};
  28. +static int event_index = 0;
  29. +
  30. +static void event_record(int reg, int write, int dat)
  31. +{
  32. + if (event_index < MAX_EVENTS) {
  33. + event_rec[event_index].reg = reg;
  34. + event_rec[event_index].write = write;
  35. + event_rec[event_index].dat = dat;
  36. + event_index++;
  37. + }
  38. +}
  39. +
  40. +static void event_show(void)
  41. +{
  42. + static const char *string[] = {
  43. + "COM_REG_RXDATA",
  44. + "COM_REG_TXDATA",
  45. + "COM_REG_DLBL",
  46. + "COM_REG_DLBH",
  47. + "COM_REG_IER",
  48. + "COM_REG_IIR",
  49. + "COM_REG_FIFO",
  50. + "COM_REG_TCR",
  51. + "COM_REG_EFR",
  52. + "COM_REG_TLR",
  53. + "COM_REG_LCR",
  54. + "COM_REG_MCR",
  55. + "COM_REG_LSR",
  56. + "COM_REG_MSR",
  57. + "COM_REG_USR",
  58. + "COM_REG_TFL",
  59. + "COM_REG_RFL",
  60. + "COM_REG_HALT",
  61. + "COM_REG_MDR1",
  62. + };
  63. +
  64. + int i;
  65. + for (i = 0; i < event_index; i++) {
  66. + printf("%04d %s %s %02x\n", i,
  67. + string[event_rec[i].reg],
  68. + event_rec[i].write ? "<-" : "->",
  69. + event_rec[i].dat);
  70. + }
  71. +}
  72. +
  73. +static void CSR_WRITE_1(struct com_regs *r, int o, int v)
  74. +{
  75. +// if (o == COM_REG_FIFO) v = 0;
  76. + bus_space_write_1(r->cr_iot, r->cr_ioh, r->cr_map[o], v);
  77. + if (o == COM_REG_FIFO) event_record(o, 1, v);
  78. +}
  79. +
  80. +static uint8_t CSR_READ_1(struct com_regs *r, int o)
  81. +{
  82. + uint8_t v;
  83. +
  84. + v = bus_space_read_1(r->cr_iot, r->cr_ioh, r->cr_map[o]);
  85. + // event_record(o, 0, v);
  86. +
  87. + return v;
  88. +}
  89. +
  90. /*
  91. * com_init_regs --
  92. * Driver front-ends use this to initialize our register map
  93. @@ -1307,7 +1379,15 @@ com_break(struct com_softc *sc, int onof
  94. sc->sc_tbc = 0;
  95. sc->sc_heldchange = 1;
  96. } else
  97. + {
  98. + printf("%s: iot %p iobase %lx ioh %lx\n",
  99. + device_xname(sc->sc_dev),
  100. + sc->sc_regs.cr_iot,
  101. + sc->sc_regs.cr_iobase,
  102. + sc->sc_regs.cr_ioh);
  103. + event_show();
  104. com_loadchannelregs(sc);
  105. + }
  106. }
  107. }
  108.  
  109.  
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