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  1. #include "p18F45K20.inc"
  2.  
  3. ;*******************************************************************************
  4. ;                                                                              *
  5. ;    Microchip licenses this software to you solely for use with Microchip     *
  6. ;    products. The software is owned by Microchip and/or its licensors, and is *
  7. ;    protected under applicable copyright laws.  All rights reserved.          *
  8. ;                                                                              *
  9. ;    This software and any accompanying information is for suggestion only.    *
  10. ;    It shall not be deemed to modify Microchip?s standard warranty for its    *
  11. ;    products.  It is your responsibility to ensure that this software meets   *
  12. ;    your requirements.                                                        *
  13. ;                                                                              *
  14. ;    SOFTWARE IS PROVIDED "AS IS".  MICROCHIP AND ITS LICENSORS EXPRESSLY      *
  15. ;    DISCLAIM ANY WARRANTY OF ANY KIND, WHETHER EXPRESS OR IMPLIED, INCLUDING  *
  16. ;    BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS    *
  17. ;    FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. IN NO EVENT SHALL          *
  18. ;    MICROCHIP OR ITS LICENSORS BE LIABLE FOR ANY INCIDENTAL, SPECIAL,         *
  19. ;    INDIRECT OR CONSEQUENTIAL DAMAGES, LOST PROFITS OR LOST DATA, HARM TO     *
  20. ;    YOUR EQUIPMENT, COST OF PROCUREMENT OF SUBSTITUTE GOODS, TECHNOLOGY OR    *
  21. ;    SERVICES, ANY CLAIMS BY THIRD PARTIES (INCLUDING BUT NOT LIMITED TO ANY   *
  22. ;    DEFENSE THEREOF), ANY CLAIMS FOR INDEMNITY OR CONTRIBUTION, OR OTHER      *
  23. ;    SIMILAR COSTS.                                                            *
  24. ;                                                                              *
  25. ;    To the fullest extend allowed by law, Microchip and its licensors         *
  26. ;    liability shall not exceed the amount of fee, if any, that you have paid  *
  27. ;    directly to Microchip to use this software.                               *
  28. ;                                                                              *
  29. ;    MICROCHIP PROVIDES THIS SOFTWARE CONDITIONALLY UPON YOUR ACCEPTANCE OF    *
  30. ;    THESE TERMS.                                                              *
  31. ;                                                                              *
  32. ;*******************************************************************************
  33. ;                                                                              *
  34. ;    Filename:                                                                 *
  35. ;    Date:                                                                     *
  36. ;    File Version:                                                             *
  37. ;    Author:                                                                   *
  38. ;    Company:                                                                  *
  39. ;    Description:                                                              *
  40. ;                                                                              *
  41. ;*******************************************************************************
  42. ;                                                                              *
  43. ;    Notes: In the MPLAB X Help, refer to the MPASM Assembler documentation    *
  44. ;    for information on assembly instructions.                                 *
  45. ;                                                                              *
  46. ;*******************************************************************************
  47. ;                                                                              *
  48. ;    Known Issues: This template is designed for relocatable code.  As such,   *
  49. ;    build errors such as "Directive only allowed when generating an object    *
  50. ;    file" will result when the 'Build in Absolute Mode' checkbox is selected  *
  51. ;    in the project properties.  Designing code in absolute mode is            *
  52. ;    antiquated - use relocatable mode.                                        *
  53. ;                                                                              *
  54. ;*******************************************************************************
  55. ;                                                                              *
  56. ;    Revision History:                                                         *
  57. ;                                                                              *
  58. ;*******************************************************************************
  59.  
  60.  
  61.  
  62. ;*******************************************************************************
  63. ; Processor Inclusion
  64. ;
  65. ; TODO Step #1 Open the task list under Window > Tasks.  Include your
  66. ; device .inc file - e.g. #include <device_name>.inc.  Available
  67. ; include files are in C:\Program Files\Microchip\MPLABX\mpasmx
  68. ; assuming the default installation path for MPLAB X.  You may manually find
  69. ; the appropriate include file for your device here and include it, or
  70. ; simply copy the include generated by the configuration bits
  71. ; generator (see Step #2).
  72. ;
  73. ;*******************************************************************************
  74.  
  75. ; TODO INSERT INCLUDE CODE HERE
  76.  
  77. ;*******************************************************************************
  78. ;
  79. ; TODO Step #2 - Configuration Word Setup
  80. ;
  81. ; The 'CONFIG' directive is used to embed the configuration word within the
  82. ; .asm file. MPLAB X requires users to embed their configuration words
  83. ; into source code.  See the device datasheet for additional information
  84. ; on configuration word settings.  Device configuration bits descriptions
  85. ; are in C:\Program Files\Microchip\MPLABX\mpasmx\P<device_name>.inc
  86. ; (may change depending on your MPLAB X installation directory).
  87. ;
  88. ; MPLAB X has a feature which generates configuration bits source code.  Go to
  89. ; Window > PIC Memory Views > Configuration Bits.  Configure each field as
  90. ; needed and select 'Generate Source Code to Output'.  The resulting code which
  91. ; appears in the 'Output Window' > 'Config Bits Source' tab may be copied
  92. ; below.
  93. ;
  94. ;*******************************************************************************
  95.  
  96. ; TODO INSERT CONFIG HERE
  97. ; CONFIG1H
  98.   CONFIG  FOSC = INTIO7         ; Oscillator Selection bits (Internal oscillator block, CLKOUT function on RA6, port function on RA7)
  99.   CONFIG  FCMEN = OFF           ; Fail-Safe Clock Monitor Enable bit (Fail-Safe Clock Monitor disabled)
  100.   CONFIG  IESO = OFF            ; Internal/External Oscillator Switchover bit (Oscillator Switchover mode disabled)
  101.  
  102. ; CONFIG2L
  103.   CONFIG  PWRT = OFF            ; Power-up Timer Enable bit (PWRT disabled)
  104.   CONFIG  BOREN = SBORDIS       ; Brown-out Reset Enable bits (Brown-out Reset enabled in hardware only (SBOREN is disabled))
  105.   CONFIG  BORV = 18             ; Brown Out Reset Voltage bits (VBOR set to 1.8 V nominal)
  106.  
  107. ; CONFIG2H
  108.   CONFIG  WDTEN = OFF           ; Watchdog Timer Enable bit (WDT is controlled by SWDTEN bit of the WDTCON register)
  109.   CONFIG  WDTPS = 32768         ; Watchdog Timer Postscale Select bits (1:32768)
  110.  
  111. ; CONFIG3H
  112.   CONFIG  CCP2MX = PORTC        ; CCP2 MUX bit (CCP2 input/output is multiplexed with RC1)
  113.   CONFIG  PBADEN = OFF          ; PORTB A/D Enable bit (PORTB<4:0> pins are configured as digital I/O on Reset)
  114.   CONFIG  LPT1OSC = OFF         ; Low-Power Timer1 Oscillator Enable bit (Timer1 configured for higher power operation)
  115.   CONFIG  HFOFST = ON           ; HFINTOSC Fast Start-up (HFINTOSC starts clocking the CPU without waiting for the oscillator to stablize.)
  116.   CONFIG  MCLRE = ON            ; MCLR Pin Enable bit (MCLR pin enabled; RE3 input pin disabled)
  117.  
  118. ; CONFIG4L
  119.   CONFIG  STVREN = ON           ; Stack Full/Underflow Reset Enable bit (Stack full/underflow will cause Reset)
  120.   CONFIG  LVP = OFF             ; Single-Supply ICSP Enable bit (Single-Supply ICSP disabled)
  121.   CONFIG  XINST = OFF           ; Extended Instruction Set Enable bit (Instruction set extension and Indexed Addressing mode disabled (Legacy mode))
  122.  
  123. ; CONFIG5L
  124.   CONFIG  CP0 = OFF             ; Code Protection Block 0 (Block 0 (000800-001FFFh) not code-protected)
  125.   CONFIG  CP1 = OFF             ; Code Protection Block 1 (Block 1 (002000-003FFFh) not code-protected)
  126.   CONFIG  CP2 = OFF             ; Code Protection Block 2 (Block 2 (004000-005FFFh) not code-protected)
  127.   CONFIG  CP3 = OFF             ; Code Protection Block 3 (Block 3 (006000-007FFFh) not code-protected)
  128.  
  129. ; CONFIG5H
  130.   CONFIG  CPB = OFF             ; Boot Block Code Protection bit (Boot block (000000-0007FFh) not code-protected)
  131.   CONFIG  CPD = OFF             ; Data EEPROM Code Protection bit (Data EEPROM not code-protected)
  132.  
  133. ; CONFIG6L
  134.   CONFIG  WRT0 = OFF            ; Write Protection Block 0 (Block 0 (000800-001FFFh) not write-protected)
  135.   CONFIG  WRT1 = OFF            ; Write Protection Block 1 (Block 1 (002000-003FFFh) not write-protected)
  136.   CONFIG  WRT2 = OFF            ; Write Protection Block 2 (Block 2 (004000-005FFFh) not write-protected)
  137.   CONFIG  WRT3 = OFF            ; Write Protection Block 3 (Block 3 (006000-007FFFh) not write-protected)
  138.  
  139. ; CONFIG6H
  140.   CONFIG  WRTC = OFF            ; Configuration Register Write Protection bit (Configuration registers (300000-3000FFh) not write-protected)
  141.   CONFIG  WRTB = OFF            ; Boot Block Write Protection bit (Boot Block (000000-0007FFh) not write-protected)
  142.   CONFIG  WRTD = OFF            ; Data EEPROM Write Protection bit (Data EEPROM not write-protected)
  143.  
  144. ; CONFIG7L
  145.   CONFIG  EBTR0 = OFF           ; Table Read Protection Block 0 (Block 0 (000800-001FFFh) not protected from table reads executed in other blocks)
  146.   CONFIG  EBTR1 = OFF           ; Table Read Protection Block 1 (Block 1 (002000-003FFFh) not protected from table reads executed in other blocks)
  147.   CONFIG  EBTR2 = OFF           ; Table Read Protection Block 2 (Block 2 (004000-005FFFh) not protected from table reads executed in other blocks)
  148.   CONFIG  EBTR3 = OFF           ; Table Read Protection Block 3 (Block 3 (006000-007FFFh) not protected from table reads executed in other blocks)
  149.  
  150. ; CONFIG7H
  151.   CONFIG  EBTRB = OFF           ; Boot Block Table Read Protection bit (Boot Block (000000-0007FFh) not protected from table reads executed in other blocks)
  152. ;*******************************************************************************
  153. ;
  154. ; TODO Step #3 - Variable Definitions
  155. ;
  156. ; Refer to datasheet for available data memory (RAM) organization assuming
  157. ; relocatible code organization (which is an option in project
  158. ; properties > mpasm (Global Options)).  Absolute mode generally should
  159. ; be used sparingly.
  160. ;
  161. ; Example of using GPR Uninitialized Data
  162. ;
  163. ;   GPR_VAR        UDATA
  164. ;   MYVAR1         RES        1      ; User variable linker places
  165. ;   MYVAR2         RES        1      ; User variable linker places
  166. ;   MYVAR3         RES        1      ; User variable linker places
  167. ;
  168. ;   ; Example of using Access Uninitialized Data Section (when available)
  169. ;   ; The variables for the context saving in the device datasheet may need
  170. ;   ; memory reserved here.
  171. ;   INT_VAR        UDATA_ACS
  172. ;   W_TEMP         RES        1      ; w register for context saving (ACCESS)
  173. ;   STATUS_TEMP    RES        1      ; status used for context saving
  174. ;   BSR_TEMP       RES        1      ; bank select used for ISR context saving
  175. ;
  176. ;*******************************************************************************
  177.  
  178. INT_VAR UDATA_ACS
  179. timer_on RES 1
  180. btn RES 1
  181.  
  182. ;*******************************************************************************
  183. ; Reset Vector
  184. ;*******************************************************************************
  185.  
  186. RES_VECT  CODE    0x0000            ; processor reset vector
  187.     GOTO    RUN                   ; go to beginning of program
  188.  
  189. ;*******************************************************************************
  190. ; TODO Step #4 - Interrupt Service Routines
  191. ;
  192. ; There are a few different ways to structure interrupt routines in the 8
  193. ; bit device families.  On PIC18's the high priority and low priority
  194. ; interrupts are located at 0x0008 and 0x0018, respectively.  On PIC16's and
  195. ; lower the interrupt is at 0x0004.  Between device families there is subtle
  196. ; variation in the both the hardware supporting the ISR (for restoring
  197. ; interrupt context) as well as the software used to restore the context
  198. ; (without corrupting the STATUS bits).
  199. ;
  200. ; General formats are shown below in relocatible format.
  201. ;
  202. ;------------------------------PIC16's and below--------------------------------
  203. ;
  204. ; ISR       CODE    0x0004           ; interrupt vector location
  205. ;
  206. ;     <Search the device datasheet for 'context' and copy interrupt
  207. ;     context saving code here.  Older devices need context saving code,
  208. ;     but newer devices like the 16F#### don't need context saving code.>
  209. ;
  210. ;     RETFIE
  211. ;
  212. ;----------------------------------PIC18's--------------------------------------
  213. ;
  214.  ISRHV     CODE    0x0008
  215.      GOTO    HIGH_ISR
  216. ; ISRLV     CODE    0x0018
  217. ;     GOTO    LOW_ISR
  218. ;
  219. ; ISRH      CODE                     ; let linker place high ISR routine
  220. ;HIGH_ISR
  221. ;     <Insert High Priority ISR Here - no SW context saving>
  222. ;     RETFIE  FAST
  223. ;
  224. ; ISRL      CODE                     ; let linker place low ISR routine
  225. ; LOW_ISR
  226. ;       <Search the device datasheet for 'context' and copy interrupt
  227. ;       context saving code here>
  228. ;     RETFIE
  229. ;
  230. ;*******************************************************************************
  231.  
  232. ; TODO INSERT ISR HERE
  233.  
  234. ;*******************************************************************************
  235. ; MAIN PROGRAM
  236. ;*******************************************************************************
  237.  
  238. MAIN_PROG CODE                      ; let linker place main program
  239.  
  240. HIGH_ISR
  241.     MOVLW 0x01
  242.     XORWF timer_on, 1
  243.     BTG T0CON, 1
  244.     BCF INTCON, 1
  245.    
  246.     INCF btn
  247.  
  248.     RETFIE FAST
  249.  
  250.    
  251. POLL
  252.     MOVLW 0x01
  253.     CPFSEQ timer_on ; if timer_on != 1, go back to LED
  254.     GOTO LED
  255.     BTFSS INTCON, 2
  256.     GOTO POLL
  257.     BCF INTCON, 2
  258.     MOVLW 0x0B
  259.     MOVF TMR0H
  260.     MOVLW 0xDC
  261.     MOVF TMR0L
  262.    
  263.     RETURN
  264.    
  265. RUN
  266.    ; Oscillo
  267.     MOVLW b'00010100'       ; 0: Sleep = Deep sleep, 101 = 4Mhz, 0 = Internal, 1 = Stable, 00 = Primary Clock
  268.     MOVWF OSCCON
  269.    
  270.     ; Timer
  271.     MOVLW b'10001011'      
  272.     MOVWF T0CON
  273.    
  274.     ; Outputs
  275.     MOVLW b'00000000'
  276.     MOVWF TRISD
  277.    
  278.     ; Interrupts
  279.     MOVLW b'10010000'
  280.     MOVWF INTCON
  281.     MOVLW b'11000001'
  282.     MOVWF INTCON2
  283.    
  284.     MOVLW 0x01
  285.     MOVWF timer_on
  286.    
  287.     LED
  288.         MOVLW 0x01
  289.         CPFSEQ timer_on ; if timer_on != 1, go back to LED
  290.         GOTO LED
  291.        
  292.         ; Check Timer On
  293.        ; LEDs on
  294.         MOVLW b'01010101'
  295.         MOVWF LATD
  296.        
  297.         CALL POLL
  298.        
  299.         ; LEDs off        
  300.         MOVLW 0xFF
  301.         XORWF LATD, 1
  302.        
  303.         CALL POLL
  304.        
  305.         GOTO LED
  306.     GOTO $
  307.  
  308.     END
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