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dzielnik

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Jun 25th, 2018
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  1. ----------------------------------------------------------------------------------
  2. -- Company:
  3. -- Engineer:
  4. --
  5. -- Create Date: 12:55:54 06/05/2018
  6. -- Design Name:
  7. -- Module Name: obrotyKalkulator - Behavioral
  8. -- Project Name:
  9. -- Target Devices:
  10. -- Tool versions:
  11. -- Description:
  12. --
  13. -- Dependencies:
  14. --
  15. -- Revision:
  16. -- Revision 0.01 - File Created
  17. -- Additional Comments:
  18. --
  19. ----------------------------------------------------------------------------------
  20. library IEEE;
  21. use IEEE.STD_LOGIC_1164.ALL;
  22. use IEEE.STD_LOGIC_UNSIGNED.ALL;
  23. use IEEE.STD_LOGIC_ARITH.ALL;
  24.  
  25. entity obrotyKalkulator is
  26. PORT(
  27. WejscieEnkoder : in std_logic;
  28. WyjscieWartosc : out std_logic_vector (8 downto 0 )
  29. );
  30. end obrotyKalkulator;
  31.  
  32. architecture Behavioral of obrotyKalkulator is
  33.  
  34. begin
  35. process(WejscieEnkoder)
  36. variable iloscImpulsow : integer range 0 to 360;
  37. begin
  38. if(rising_edge(WejscieEnkoder))
  39. then
  40. if(iloscImpulsow < 360)
  41. then
  42. iloscImpulsow := iloscImpulsow + 1;
  43. WyjscieWartosc <= conv_std_logic_vector(((iloscImpulsow)), 9);
  44. else
  45. iloscImpulsow := 0;
  46. end if;
  47. end if;
  48.  
  49. end process;
  50.  
  51. end Behavioral;
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