module mux4to1(w0,w1,w2,w3, s[1..0], f);
	input w0,w1,w2,w3,s;
	output f;
	always@(*) begin
		case(s)
			2'b00 : f = w0;
			2'b01 : f = w1;
			2'b10 : f = w2;
			2'b11 : f = w3;
		endcase
	end
endmodule