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  1. `timescale 10ns / 1ns
  2.  
  3. typedef enum
  4.     {   ParitySpace = 'b00,
  5.         ParityMark  = 'b11,
  6.         ParityEven  = 'b10,
  7.         ParityOdd   = 'b01}    
  8.     ParityType;
  9.  
  10. module SerialTX(
  11.     input wire iClockP,             // posedge triggered
  12.     input wire iResetP,             // posedge triggered      
  13.     input wire [2:0] iDataBits,     // 0 = 1, 1 = 2 ... 7 = 8
  14.     input wire iStopBits,           // 0 = 1, 1 = 2
  15.     input wire iParityEnable,       // 0 - off, 1 - on
  16.     input wire [1:0] iParityType,   // 00 - space, 11 - mark, 10 - even, 01 - odd
  17.     input wire [7:0] iDataFeed,     // data to send
  18.     input wire iSend,    
  19.     output wire oReady,
  20.     output bit oTX);
  21.        
  22.     bit [2:0] rDataBits;
  23.     bit rStopBits;
  24.     bit rParityEnable;
  25.     bit [1:0] rParityType;
  26.     bit [7:0] rDataFeed;
  27.     bit rParityBit;
  28.          
  29.     enum bit [3:0] { StartState, DataState, ParityState, StopState, IdleState } rTXState;
  30.     bit [2:0] rBitsSent;
  31.    
  32.     assign oReady = (rTXState == IdleState);    
  33.    
  34.     always @(posedge iClockP, posedge iResetP, posedge iSend)
  35.     begin
  36.         if (iResetP != '0) begin
  37.             rDataBits       <= iDataBits;
  38.             rStopBits       <= iStopBits;
  39.             rParityEnable   <= iParityEnable;
  40.             rParityType     <= iParityType;
  41.             rTXState        <= IdleState;
  42.             rBitsSent       <= 'd0;
  43.             rParityBit      <= 'd1;
  44.             oTX             <= 'd1;
  45.         end
  46.         else begin
  47.             case (rTXState)
  48.             StartState:     StartStateTask();
  49.             DataState:      DataStateTask();
  50.             ParityState:    ParityStateTask();
  51.             StopState:      StopStateTask();
  52.             IdleState:      IdleStateTask();
  53.             default:        IdleStateTask();
  54.             endcase;
  55.         end
  56.     end
  57.        
  58.     task IdleStateTask();
  59.         if (iSend != '0) begin
  60.             rTXState <= StartState;
  61.             rDataFeed <= iDataFeed;
  62.             rBitsSent <= rDataBits;
  63.             oTX <= '0;            
  64.         end
  65.     endtask;    
  66.    
  67.     task StartStateTask();        
  68.         rTXState <= DataState;
  69.         oTX <= rDataFeed[rBitsSent];        
  70.         rBitsSent <= rBitsSent - 3'd1;
  71.     endtask;
  72.    
  73.     task DataStateTask();
  74.         oTX <= rDataFeed[rBitsSent];
  75.         if (rBitsSent != 3'd0) begin            
  76.             rBitsSent <= rBitsSent - 3'd1;
  77.         end
  78.         else begin
  79.             if (rParityEnable != '0) begin
  80.                 rTXState <= ParityState;
  81.                 case (rParityType)
  82.                 ParityOdd:      oTX <= rParityBit;
  83.                 ParityEven:     oTX <= ~rParityBit;
  84.                 ParityMark:     oTX <= '1;
  85.                 ParitySpace:    oTX <= '0;
  86.                 endcase;            
  87.             end
  88.             else begin
  89.                 rTXState <= StopState;
  90.                 oTX <= '1;
  91.             end            
  92.             rBitsSent <= 3'd1 + rStopBits;                        
  93.         end
  94.     endtask;
  95.    
  96.     task ParityStateTask();
  97.         rTXState <= StopState;
  98.     endtask;
  99.    
  100.     task StopStateTask();
  101.         if (rBitsSent == 3'd0) begin
  102.             rTXState <= IdleState;
  103.         end
  104.         rBitsSent <= rBitsSent - 3'd1;
  105.     endtask;
  106.    
  107. endmodule
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