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H96MAXX3 devicetree from android

Jan 9th, 2021
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  1. /dts-v1/;
  2.  
  3. / {
  4. interrupt-parent = <0x1>;
  5. model = "Amlogic";
  6. amlogic-dt-id = "sm1_s905x3_u215";
  7. #address-cells = <0x1>;
  8. #size-cells = <0x1>;
  9. compatible = "amlogic, g12a";
  10.  
  11. vdac {
  12. status = "okay";
  13. compatible = "amlogic, vdac-sm1";
  14. };
  15.  
  16. dmc_monitor {
  17. status = "okay";
  18. interrupts = <0x0 0x33 0x1>;
  19. reg_base = <0xff639000>;
  20. compatible = "amlogic, dmc_monitor";
  21. };
  22.  
  23. chosen {
  24. bootargs = "init=/init console=ttyS0,115200 no_console_suspend earlyprintk=aml-uart,0xff803000 ramoops.pstore_en=1 ramoops.record_size=0x8000 ramoops.console_size=0x4000 otg_device=0 reboot_mode_android=normal logo=osd0,loaded,0x3d800000 vout=576cvbs,enable panel_type=lcd_1 hdmitx=,rgb,8bit hdmimode=1080p60hz frac_rate_policy=1 hdmi_read_edid=1 cvbsmode=576cvbs osd_reverse=0 video_reverse=0 irq_check_en=0 androidboot.selinux=permissive androidboot.firstboot=0 jtag=disable androidboot.hardware=amlogic androidboot.serialno=1234567890 mac=00:df:12:00:a3:31 androidboot.mac=00:df:12:00:a3:31 ro rootwait skip_initramfs androidboot.dtbo_idx=0 --cmdline root=/dev/mmcblk0p18 buildvariant=user";
  25. };
  26.  
  27. codec_mm {
  28. memory-region = <0x63 0x64>;
  29. dev_name = "codec_mm";
  30. status = "okay";
  31. compatible = "amlogic, codec, mm";
  32. };
  33.  
  34. rtc {
  35. alarm_reg_addr = <0xff8000a8>;
  36. status = "okay";
  37. timer_e_addr = <0xffd0f188>;
  38. init_date = "2015/01/01";
  39. compatible = "amlogic, aml_vrtc";
  40. };
  41.  
  42. pwmao_d-regulator {
  43. regulator-always-on;
  44. voltage-table = <0xf9060 0x0 0xf6950 0x3 0xf4240 0x6 0xf1b30 0xa 0xef420 0xd 0xecd10 0x10 0xea600 0x14 0xe7ef0 0x17 0xe57e0 0x1a 0xe30d0 0x1e 0xe09c0 0x21 0xde2b0 0x24 0xdbba0 0x28 0xd9490 0x2b 0xd6d80 0x2e 0xd4670 0x32 0xd1f60 0x35 0xcf850 0x38 0xcd140 0x3c 0xcaa30 0x3f 0xc8320 0x43 0xc5c10 0x46 0xc3500 0x49 0xc0df0 0x4c 0xbe6e0 0x50 0xbbfd0 0x53 0xb98c0 0x56 0xb71b0 0x5a 0xb4aa0 0x5d 0xb2390 0x60 0xafc80 0x64>;
  45. phandle = <0xe>;
  46. max-duty-cycle = <0x4e2>;
  47. status = "okay";
  48. regulator-min-microvolt = <0xafc80>;
  49. regulator-max-microvolt = <0xf9060>;
  50. regulator-name = "vddcpu0";
  51. compatible = "pwm-regulator";
  52. pwms = <0x4c 0x1 0x4e2 0x0>;
  53. };
  54.  
  55. cpu_ver_name {
  56. compatible = "amlogic, cpu-major-id-sm1";
  57. };
  58.  
  59. serial@ffd22000 {
  60. pinctrl-names = "default";
  61. pinctrl-0 = <0x31>;
  62. phandle = <0xeb>;
  63. clock-names = "clk_uart", "clk_gate";
  64. reg = <0xffd22000 0x18>;
  65. fifosize = <0x40>;
  66. status = "disabled";
  67. interrupts = <0x0 0x5d 0x1>;
  68. compatible = "amlogic, meson-uart";
  69. clocks = <0x15 0x2 0x3c>;
  70. };
  71.  
  72. ionvideo {
  73. dev_name = "ionvideo";
  74. status = "okay";
  75. compatible = "amlogic, ionvideo";
  76. };
  77.  
  78. defendkey {
  79. phandle = <0xf9>;
  80. reg = <0xff630218 0x4>;
  81. mem_size = <0x0 0x100000>;
  82. status = "okay";
  83. compatible = "amlogic, defendkey";
  84. };
  85.  
  86. custom_maps {
  87. map1 = <0x2c>;
  88. map0 = <0x2b>;
  89. phandle = <0x2a>;
  90. mapnum = <0x4>;
  91. map3 = <0x2e>;
  92. map2 = <0x2d>;
  93.  
  94. map_1 {
  95. cursor_up_scancode = <0x16>;
  96. phandle = <0x2c>;
  97. size = <0x1c>;
  98. keymap = <0x4e0002 0xd0003 0xc0004 0x4a0005 0x90006 0x80007 0x460008 0x50009 0x4000a 0x1000b 0x4c008b 0x180073 0x100072 0x110066 0x50006a 0x510069 0x160067 0x1a006c 0x13001c 0x410071 0x19009e 0x400074 0x4b00a8 0x1d0 0x4f00d0 0x42000e 0x430057 0xf0058>;
  99. cursor_right_scancode = <0x50>;
  100. mapname = "amlogic-remote-2";
  101. cursor_ok_scancode = <0x13>;
  102. cursor_left_scancode = <0x51>;
  103. cursor_down_scancode = <0x1a>;
  104. release_delay = <0x50>;
  105. fn_key_scancode = <0x0>;
  106. customcode = <0xfe01>;
  107. };
  108.  
  109. map_0 {
  110. phandle = <0x2b>;
  111. size = <0x32>;
  112. keymap = <0x47000b 0x130002 0x100003 0x110004 0xf0005 0xc0006 0xd0007 0xb0008 0x80009 0x9000a 0x5c0061 0x51003d 0x50003e 0x40003f 0x4d0040 0x430041 0x170042 0x43 0x10044 0x160057 0x49000e 0x60082 0x140083 0x440067 0x1d006c 0x1c0069 0x48006a 0x53007d 0x450068 0x19006d 0x520077 0x5007a 0x59007b 0x1b0078 0x40079 0x1a0074 0xa000f 0xe0071 0x1f0066 0x1e0084 0x70085 0x120086 0x540087 0x20088 0x4f001e 0x420030 0x5d002e 0x4c0020 0x580089 0x55008c>;
  113. mapname = "amlogic-remote-1";
  114. release_delay = <0x50>;
  115. customcode = <0xfb04>;
  116. };
  117.  
  118. map_2 {
  119. phandle = <0x2d>;
  120. size = <0x11>;
  121. keymap = <0xca0067 0xd2006c 0x990069 0xc1006a 0xce0061 0x450074 0xc50085 0x800071 0xd0000f 0xd6007d 0x950066 0xdd0068 0x8c006d 0x890083 0x9c0082 0x9a0078 0xcd0079>;
  122. mapname = "amlogic-remote-3";
  123. release_delay = <0x50>;
  124. customcode = <0xbd02>;
  125. };
  126.  
  127. map_3 {
  128. cursor_up_scancode = <0x38>;
  129. phandle = <0x2e>;
  130. size = <0xc>;
  131. keymap = <0x83008b 0x870073 0x890072 0x730066 0x39006a 0x370069 0x380067 0x40006c 0x13001c 0x27009e 0x810074 0x4801d0>;
  132. cursor_right_scancode = <0x39>;
  133. mapname = "amlogic-remote-4";
  134. cursor_ok_scancode = <0x13>;
  135. cursor_left_scancode = <0x37>;
  136. cursor_down_scancode = <0x40>;
  137. release_delay = <0x50>;
  138. fn_key_scancode = <0x48>;
  139. customcode = <0x7f80>;
  140. };
  141. };
  142.  
  143. locker {
  144. interrupt-names = "irq";
  145. phandle = <0x105>;
  146. clock-names = "lock_out", "lock_in", "out_src", "in_src", "out_calc", "in_ref";
  147. dividor = <0x31>;
  148. status = "disabled";
  149. frequency = <0x2ebae40>;
  150. interrupts = <0x0 0x1 0x1>;
  151. compatible = "amlogic, audiolocker";
  152. clocks = <0x1d 0x2d 0x1d 0x2e 0x1d 0x27 0x1d 0x28 0x2 0xd 0x2 0xe>;
  153. };
  154.  
  155. auge_sound {
  156. compatible = "amlogic, g12a-sound-card";
  157. aml-audio-card,name = "AML-AUGESOUND";
  158.  
  159. aml-audio-card,dai-link@0 {
  160. bitclock-master = <0x7c>;
  161. mclk-fs = <0x200>;
  162. suffix-name = "alsaPORT-pcm";
  163. format = "dsp_a";
  164. frame-master = <0x7c>;
  165.  
  166. codec {
  167. phandle = <0x102>;
  168. sound-dai = <0x7d 0x7d>;
  169. };
  170.  
  171. cpu {
  172. system-clock-frequency = <0x1770000>;
  173. dai-tdm-slot-tx-mask = <0x1 0x1 0x1 0x1 0x1 0x1 0x1 0x1>;
  174. phandle = <0x101>;
  175. sound-dai = <0x7c>;
  176. dai-tdm-slot-rx-mask = <0x1 0x1 0x1 0x1 0x1 0x1 0x1 0x1>;
  177. dai-tdm-slot-num = <0x8>;
  178. dai-tdm-slot-width = <0x20>;
  179. };
  180. };
  181.  
  182. aml-audio-card,dai-link@6 {
  183. mclk-fs = <0x100>;
  184. suffix-name = "alsaPORT-earc";
  185.  
  186. codec {
  187. sound-dai = <0x7d>;
  188. };
  189.  
  190. cpu {
  191. system-clock-frequency = <0xbb8000>;
  192. sound-dai = <0x83>;
  193. };
  194. };
  195.  
  196. aml-audio-card,dai-link@5 {
  197. mclk-fs = <0x80>;
  198. continuous-clock;
  199. suffix-name = "alsaPORT-spdifb";
  200.  
  201. codec {
  202. sound-dai = <0x7d>;
  203. };
  204.  
  205. cpu {
  206. system-clock-frequency = <0x5dc000>;
  207. sound-dai = <0x82>;
  208. };
  209. };
  210.  
  211. aml-audio-card,dai-link@1 {
  212. bitclock-master = <0x7e>;
  213. mclk-fs = <0x100>;
  214. suffix-name = "alsaPORT-i2s";
  215. format = "i2s";
  216. frame-master = <0x7e>;
  217.  
  218. codec {
  219. phandle = <0x103>;
  220. sound-dai = <0x7d 0x7d 0x7f>;
  221. };
  222.  
  223. cpu {
  224. system-clock-frequency = <0xbb8000>;
  225. dai-tdm-slot-tx-mask = <0x1 0x1>;
  226. sound-dai = <0x7e>;
  227. dai-tdm-slot-rx-mask = <0x1 0x1>;
  228. dai-tdm-slot-num = <0x2>;
  229. dai-tdm-slot-width = <0x20>;
  230. };
  231. };
  232.  
  233. aml-audio-card,dai-link@7 {
  234. mclk-fs = <0x100>;
  235. continuous-clock;
  236. suffix-name = "alsaPORT-loopback";
  237.  
  238. codec {
  239. sound-dai = <0x7d>;
  240. };
  241.  
  242. cpu {
  243. system-clock-frequency = <0xbb8000>;
  244. sound-dai = <0x84>;
  245. };
  246. };
  247.  
  248. aml-audio-card,dai-link@4 {
  249. mclk-fs = <0x80>;
  250. suffix-name = "alsaPORT-spdif";
  251.  
  252. codec {
  253. sound-dai = <0x7d>;
  254. };
  255.  
  256. cpu {
  257. system-clock-frequency = <0x5dc000>;
  258. sound-dai = <0x81>;
  259. };
  260. };
  261.  
  262. aml-audio-card,dai-link@2 {
  263. bitclock-master = <0x80>;
  264. mclk-fs = <0x100>;
  265. format = "i2s";
  266. frame-master = <0x80>;
  267.  
  268. codec {
  269. phandle = <0x104>;
  270. sound-dai = <0x7d>;
  271. };
  272.  
  273. cpu {
  274. system-clock-frequency = <0xbb8000>;
  275. dai-tdm-slot-tx-mask = <0x1 0x1>;
  276. sound-dai = <0x80>;
  277. dai-tdm-slot-rx-mask = <0x1 0x1>;
  278. dai-tdm-slot-num = <0x2>;
  279. dai-tdm-slot-width = <0x20>;
  280. };
  281. };
  282. };
  283.  
  284. vdin0 {
  285. vdin_id = <0x0>;
  286. flag_cma = <0x0>;
  287. phandle = <0xef>;
  288. reserve-iomap = "true";
  289. dev_name = "vdin0";
  290. status = "disabled";
  291. interrupts = <0x0 0x53 0x1>;
  292. compatible = "amlogic, vdin";
  293. rdma-irq = <0x2>;
  294. tv_bit_mode = <0x15>;
  295. };
  296.  
  297. aml_dma {
  298. reg = <0xff63e000 0x48>;
  299. interrupts = <0x0 0xb4 0x1>;
  300. compatible = "amlogic,aml_txlx_dma";
  301.  
  302. aml_sha {
  303. dev_name = "aml_sha_dma";
  304. status = "okay";
  305. compatible = "amlogic,sha_dma";
  306. };
  307.  
  308. aml_aes {
  309. dev_name = "aml_aes_dma";
  310. status = "okay";
  311. compatible = "amlogic,aes_g12a_dma";
  312. };
  313. };
  314.  
  315. timer_bc {
  316. clockevent-shift = <0x14>;
  317. reg = <0xffd0f190 0x4 0xffd0f194 0x4>;
  318. bit_resolution = <0x0>;
  319. bit_enable = <0x10>;
  320. bit_mode = <0xc>;
  321. clockevent-rating = <0x12c>;
  322. interrupts = <0x0 0x3c 0x1>;
  323. clockevent-features = <0x23>;
  324. timer_name = "Meson TimerF";
  325. compatible = "arm, meson-bc-timer";
  326. };
  327.  
  328. securitykey {
  329. storage_remove = <0x82000068>;
  330. storage_version = <0x8200006c>;
  331. storage_list = <0x82000067>;
  332. storage_in_func = <0x82000023>;
  333. storage_block_func = <0x82000025>;
  334. storage_size_func = <0x82000027>;
  335. storage_tell = <0x82000063>;
  336. storage_write = <0x82000062>;
  337. storage_get_enctype = <0x8200006b>;
  338. storage_status = <0x82000065>;
  339. storage_verify = <0x82000064>;
  340. storage_set_enctype = <0x8200006a>;
  341. storage_read = <0x82000061>;
  342. storage_query = <0x82000060>;
  343. compatible = "aml, securitykey";
  344. storage_out_func = <0x82000024>;
  345. };
  346.  
  347. cpus {
  348. phandle = <0x91>;
  349. #address-cells = <0x1>;
  350. #size-cells = <0x0>;
  351.  
  352. cpu@3 {
  353. operating-points-v2 = <0xd>;
  354. cpu-supply = <0xe>;
  355. phandle = <0xb>;
  356. clock-names = "core_clk", "low_freq_clk_parent", "high_freq_clk_parent", "dsu_clk", "dsu_pre_parent";
  357. reg = <0x3>;
  358. clock-latency = <0xc350>;
  359. voltage-tolerance = <0x0>;
  360. enable-method = "psci";
  361. cpu-idle-states = <0xc>;
  362. device_type = "cpu";
  363. compatible = "arm,cortex-a53", "arm,armv8";
  364. clocks = <0x2 0x17 0x2 0x16 0x2 0x0 0x2 0xf8 0x2 0xf7>;
  365. };
  366.  
  367. cpu@0 {
  368. operating-points-v2 = <0xd>;
  369. cpu-supply = <0xe>;
  370. phandle = <0x8>;
  371. clock-names = "core_clk", "low_freq_clk_parent", "high_freq_clk_parent", "dsu_clk", "dsu_pre_parent";
  372. reg = <0x0>;
  373. clock-latency = <0xc350>;
  374. voltage-tolerance = <0x0>;
  375. enable-method = "psci";
  376. cpu-idle-states = <0xc>;
  377. device_type = "cpu";
  378. compatible = "arm,cortex-a53", "arm,armv8";
  379. clocks = <0x2 0x17 0x2 0x16 0x2 0x0 0x2 0xf8 0x2 0xf7>;
  380. };
  381.  
  382. cpu@2 {
  383. operating-points-v2 = <0xd>;
  384. cpu-supply = <0xe>;
  385. phandle = <0xa>;
  386. clock-names = "core_clk", "low_freq_clk_parent", "high_freq_clk_parent", "dsu_clk", "dsu_pre_parent";
  387. reg = <0x2>;
  388. clock-latency = <0xc350>;
  389. voltage-tolerance = <0x0>;
  390. enable-method = "psci";
  391. cpu-idle-states = <0xc>;
  392. device_type = "cpu";
  393. compatible = "arm,cortex-a53", "arm,armv8";
  394. clocks = <0x2 0x17 0x2 0x16 0x2 0x0 0x2 0xf8 0x2 0xf7>;
  395. };
  396.  
  397. cpu@1 {
  398. operating-points-v2 = <0xd>;
  399. cpu-supply = <0xe>;
  400. phandle = <0x9>;
  401. clock-names = "core_clk", "low_freq_clk_parent", "high_freq_clk_parent", "dsu_clk", "dsu_pre_parent";
  402. reg = <0x1>;
  403. clock-latency = <0xc350>;
  404. voltage-tolerance = <0x0>;
  405. enable-method = "psci";
  406. cpu-idle-states = <0xc>;
  407. device_type = "cpu";
  408. compatible = "arm,cortex-a53", "arm,armv8";
  409. clocks = <0x2 0x17 0x2 0x16 0x2 0x0 0x2 0xf8 0x2 0xf7>;
  410. };
  411.  
  412. idle-states {
  413. entry-method = "arm,psci-0.2";
  414.  
  415. cpu-sleep-0 {
  416. phandle = <0xc>;
  417. local-timer-stop;
  418. min-residency-us = <0x2710>;
  419. exit-latency-us = <0x1388>;
  420. entry-latency-us = <0xfa0>;
  421. arm,psci-suspend-param = <0x10000>;
  422. compatible = "arm,idle-state";
  423. };
  424. };
  425.  
  426. cpu-map {
  427.  
  428. cluster0 {
  429. phandle = <0x92>;
  430.  
  431. core0 {
  432. cpu = <0x8>;
  433. };
  434.  
  435. core1 {
  436. cpu = <0x9>;
  437. };
  438.  
  439. core3 {
  440. cpu = <0xb>;
  441. };
  442.  
  443. core2 {
  444. cpu = <0xa>;
  445. };
  446. };
  447. };
  448. };
  449.  
  450. cpu_info {
  451. status = "okay";
  452. cpuinfo_cmd = <0x82000044>;
  453. compatible = "amlogic, cpuinfo";
  454. };
  455.  
  456. dummy-battery {
  457. phandle = <0xfe>;
  458. status = "okay";
  459. compatible = "amlogic, dummy-battery";
  460. };
  461.  
  462. cvbsout {
  463. clk_path = <0x0>;
  464. clock-names = "venci_top_gate", "venci_0_gate", "venci_1_gate", "vdac_clk_gate";
  465. performance = <0x1bf0 0x9 0x1b56 0x333 0x1b12 0x8080 0x1b05 0xfd 0x1c59 0xf850 0xffff 0x0>;
  466. performance_sarft = <0x1bf0 0x9 0x1b56 0x333 0x1b12 0x0 0x1b05 0x9 0x1c59 0xfc48 0xffff 0x0>;
  467. dev_name = "cvbsout";
  468. status = "okay";
  469. performance_revB_telecom = <0x1bf0 0x9 0x1b56 0x546 0x1b12 0x8080 0x1b05 0x9 0x1c59 0xf850 0xffff 0x0>;
  470. compatible = "amlogic, cvbsout-sm1";
  471. clocks = <0x2 0x55 0x2 0x4e 0x2 0x4f 0x2 0x57>;
  472. };
  473.  
  474. serial@ffd24000 {
  475. pinctrl-names = "default";
  476. pinctrl-0 = <0x2f>;
  477. phandle = <0xe9>;
  478. clock-names = "clk_uart", "clk_gate";
  479. reg = <0xffd24000 0x18>;
  480. fifosize = <0x80>;
  481. status = "okay";
  482. interrupts = <0x0 0x1a 0x1>;
  483. compatible = "amlogic, meson-uart";
  484. clocks = <0x15 0x2 0x2e>;
  485. };
  486.  
  487. ge2d {
  488. interrupt-names = "ge2d";
  489. clock-names = "clk_vapb_0", "clk_ge2d", "clk_ge2d_gate";
  490. reg = <0xff940000 0x10000>;
  491. dev_name = "ge2d";
  492. status = "okay";
  493. interrupts = <0x0 0x92 0x1>;
  494. compatible = "amlogic, ge2d-sm1";
  495. clocks = <0x2 0x95 0x2 0x3d 0x2 0x96>;
  496. };
  497.  
  498. watchdog@0xffd0f0d0 {
  499. shutdown_timeout = <0xa>;
  500. firmware_timeout = <0x6>;
  501. reset_watchdog_time = <0x2>;
  502. phandle = <0xc9>;
  503. clock-names = "xtal";
  504. reg = <0xffd0f0d0 0x10>;
  505. reset_watchdog_method = <0x1>;
  506. suspend_timeout = <0x6>;
  507. status = "okay";
  508. default_timeout = <0xa>;
  509. compatible = "amlogic, meson-wdt";
  510. clocks = <0x15>;
  511. };
  512.  
  513. ddr_bandwidth {
  514. interrupt-names = "ddr_bandwidth";
  515. reg = <0xff638000 0x100 0xff638c00 0x100>;
  516. status = "okay";
  517. interrupts = <0x0 0x34 0x1>;
  518. compatible = "amlogic, ddr-bandwidth";
  519. };
  520.  
  521. meson-irblaster {
  522. pinctrl-names = "default";
  523. pinctrl-0 = <0x3b>;
  524. phandle = <0xf4>;
  525. reg = <0xff80014c 0x10 0xff800040 0x4>;
  526. status = "okay";
  527. interrupts = <0x0 0xc6 0x1>;
  528. compatible = "amlogic, meson_irblaster";
  529. };
  530.  
  531. dummy-charger {
  532. phandle = <0xff>;
  533. status = "okay";
  534. compatible = "amlogic, dummy-charger";
  535. };
  536.  
  537. interrupt-controller@2c001000 {
  538. phandle = <0x1>;
  539. reg = <0xffc01000 0x1000 0xffc02000 0x100>;
  540. interrupts = <0x1 0x9 0xf04>;
  541. #address-cells = <0x0>;
  542. interrupt-controller;
  543. compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
  544. #interrupt-cells = <0x3>;
  545. };
  546.  
  547. vdin1 {
  548. vdin_id = <0x1>;
  549. flag_cma = <0x0>;
  550. phandle = <0xf0>;
  551. reserve-iomap = "true";
  552. memory-region = <0x39>;
  553. dev_name = "vdin1";
  554. status = "disabled";
  555. interrupts = <0x0 0x55 0x1>;
  556. compatible = "amlogic, vdin";
  557. rdma-irq = <0x4>;
  558. tv_bit_mode = <0x1>;
  559. };
  560.  
  561. unifykey {
  562. unifykey-index-4 = <0x6c>;
  563. unifykey-index-6 = <0x6e>;
  564. unifykey-index-1 = <0x69>;
  565. unifykey-index-5 = <0x6d>;
  566. unifykey-index-8 = <0x70>;
  567. unifykey-index-9 = <0x71>;
  568. unifykey-num = <0x10>;
  569. unifykey-index-10 = <0x72>;
  570. status = "ok";
  571. unifykey-index-0 = <0x68>;
  572. unifykey-index-14 = <0x76>;
  573. unifykey-index-13 = <0x75>;
  574. unifykey-index-7 = <0x6f>;
  575. unifykey-index-2 = <0x6a>;
  576. unifykey-index-11 = <0x73>;
  577. compatible = "amlogic, unifykey";
  578. unifykey-index-12 = <0x74>;
  579. unifykey-index-3 = <0x6b>;
  580. unifykey-index-15 = <0x77>;
  581.  
  582. key_6 {
  583. key-name = "hdcp2_tx";
  584. key-permit = "read", "write", "del";
  585. phandle = <0x6e>;
  586. key-device = "normal";
  587. };
  588.  
  589. key_10 {
  590. key-name = "hdcp22_fw_private";
  591. key-permit = "read", "write", "del";
  592. phandle = <0x72>;
  593. key-device = "secure";
  594. };
  595.  
  596. key_12 {
  597. key-name = "prpubkeybox";
  598. key-permit = "read", "write", "del";
  599. phandle = <0x74>;
  600. key-device = "secure";
  601. };
  602.  
  603. key_3 {
  604. key-name = "secure_boot_set";
  605. key-permit = "write";
  606. phandle = <0x6b>;
  607. key-device = "efuse";
  608. };
  609.  
  610. key_1 {
  611. key-name = "mac";
  612. key-permit = "read", "write", "del";
  613. phandle = <0x69>;
  614. key-device = "normal";
  615. };
  616.  
  617. key_4 {
  618. key-name = "mac_bt";
  619. key-permit = "read", "write", "del";
  620. phandle = <0x6c>;
  621. key-type = "mac";
  622. key-device = "normal";
  623. };
  624.  
  625. key_13 {
  626. key-name = "prprivkeybox";
  627. key-permit = "read", "write", "del";
  628. phandle = <0x75>;
  629. key-device = "secure";
  630. };
  631.  
  632. key_0 {
  633. key-name = "usid";
  634. key-permit = "read", "write", "del";
  635. phandle = <0x68>;
  636. key-device = "normal";
  637. };
  638.  
  639. key_11 {
  640. key-name = "PlayReadykeybox25";
  641. key-permit = "read", "write", "del";
  642. phandle = <0x73>;
  643. key-device = "secure";
  644. };
  645.  
  646. key_8 {
  647. key-name = "widevinekeybox";
  648. key-permit = "read", "write", "del";
  649. phandle = <0x70>;
  650. key-device = "secure";
  651. };
  652.  
  653. key_15 {
  654. key-name = "netflix_mgkid";
  655. key-permit = "read", "write", "del";
  656. phandle = <0x77>;
  657. key-device = "secure";
  658. };
  659.  
  660. key_5 {
  661. key-name = "mac_wifi";
  662. key-permit = "read", "write", "del";
  663. phandle = <0x6d>;
  664. key-type = "mac";
  665. key-device = "normal";
  666. };
  667.  
  668. key_2 {
  669. key-name = "hdcp";
  670. key-permit = "read", "write", "del";
  671. phandle = <0x6a>;
  672. key-type = "sha1";
  673. key-device = "secure";
  674. };
  675.  
  676. key_7 {
  677. key-name = "hdcp2_rx";
  678. key-permit = "read", "write", "del";
  679. phandle = <0x6f>;
  680. key-device = "normal";
  681. };
  682.  
  683. key_14 {
  684. key-name = "attestationkeybox";
  685. key-permit = "read", "write", "del";
  686. phandle = <0x76>;
  687. key-device = "secure";
  688. };
  689.  
  690. key_9 {
  691. key-name = "deviceid";
  692. key-permit = "read", "write", "del";
  693. phandle = <0x71>;
  694. key-device = "normal";
  695. };
  696. };
  697.  
  698. aliases {
  699. tsensor0 = "/p_tsensor@ff634594";
  700. serial3 = "/serial@ffd22000";
  701. serial2 = "/serial@ffd23000";
  702. serial1 = "/serial@ffd24000";
  703. tsensor1 = "/d_tsensor@ff800228";
  704. i2c4 = "/soc/aobus@ff800000/i2c@5000";
  705. i2c0 = "/soc/cbus@ffd00000/i2c@1f000";
  706. i2c2 = "/soc/cbus@ffd00000/i2c@1d000";
  707. serial0 = "/soc/aobus@ff800000/serial@3000";
  708. i2c3 = "/soc/cbus@ffd00000/i2c@1c000";
  709. serial4 = "/soc/aobus@ff800000/serial@4000";
  710. i2c1 = "/soc/cbus@ffd00000/i2c@1e000";
  711. };
  712.  
  713. d_tsensor@ff800228 {
  714. cal_d = <0x24c3>;
  715. cal_c = <0xc57>;
  716. cal_b = <0x1a8>;
  717. phandle = <0x8b>;
  718. clock-names = "ts_comp";
  719. reg = <0xff634c00 0x50 0xff800230 0x4>;
  720. cal_type = <0x1>;
  721. rtemp = <0x1c138>;
  722. status = "okay";
  723. interrupts = <0x0 0x24 0x0>;
  724. #thermal-sensor-cells = <0x1>;
  725. cal_a = <0x144>;
  726. device_name = "meson-dthermal";
  727. compatible = "amlogic, r1p1-tsensor";
  728. clocks = <0x2 0xd6>;
  729. };
  730.  
  731. hevc_enc {
  732. interrupt-names = "wave420l_irq";
  733. dev_name = "HevcEnc";
  734. status = "okay";
  735. ranges;
  736. interrupts = <0x0 0xbb 0x1>;
  737. #address-cells = <0x1>;
  738. #size-cells = <0x1>;
  739. compatible = "cnm, HevcEnc";
  740.  
  741. io_reg_base {
  742. reg = <0xff610000 0x4000>;
  743. };
  744. };
  745.  
  746. jtag {
  747. pinctrl-names = "jtag_apao_pins", "jtag_apee_pins";
  748. pinctrl-0 = <0x16>;
  749. select = "disable";
  750. pinctrl-1 = <0x17>;
  751. status = "disable";
  752. compatible = "amlogic, jtag";
  753. };
  754.  
  755. nfc@0 {
  756. pinctrl-names = "nand_rb_mod", "nand_norb_mod", "nand_cs_only";
  757. nand_clk_ctrl = <0xffe07000>;
  758. device_id = <0x0>;
  759. plat-names = "bootloader", "nandnormal";
  760. plat-part-1 = <0x4a>;
  761. pinctrl-0 = <0x47>;
  762. phandle = <0xf8>;
  763. fip_size = <0x200000>;
  764. clock-names = "core", "clkin";
  765. reg = <0xffe07800 0x200>;
  766. plat-part-0 = <0x49>;
  767. pinctrl-2 = <0x48>;
  768. pinctrl-1 = <0x47>;
  769. dev_name = "mtdnand";
  770. status = "disabled";
  771. plat-num = <0x2>;
  772. interrupts = <0x0 0x22 0x1>;
  773. fip_copies = <0x4>;
  774. bl_mode = <0x1>;
  775. compatible = "amlogic, aml_mtd_nand";
  776. clocks = <0x2 0x35 0x2 0x72>;
  777.  
  778. nandnormal {
  779. rb_detect = <0x1>;
  780. plane_mode = "twoplane";
  781. timming_mode = "mode5";
  782. busy_pad = "rb0";
  783. phandle = <0x4a>;
  784. chip_num = <0x2>;
  785. t_rhoh = <0xf>;
  786. t_rea = <0x14>;
  787. bch_mode = "bch8_1k";
  788. part_num = <0x3>;
  789. partition = <0x4b>;
  790. enable_pad = "ce0";
  791. };
  792.  
  793. nand_partition {
  794. phandle = <0x4b>;
  795.  
  796. recovery {
  797. offset = <0x0 0x0>;
  798. size = <0x0 0x1000000>;
  799. };
  800.  
  801. boot {
  802. offset = <0x0 0x0>;
  803. size = <0x0 0x1000000>;
  804. };
  805.  
  806. system {
  807. offset = <0x0 0x0>;
  808. size = <0x0 0x4000000>;
  809. };
  810.  
  811. data {
  812. offset = <0xffffffff 0xffffffff>;
  813. size = <0x0 0x0>;
  814. };
  815.  
  816. logo {
  817. offset = <0x0 0x0>;
  818. size = <0x0 0x200000>;
  819. };
  820.  
  821. tpl {
  822. offset = <0x0 0x0>;
  823. size = <0x0 0x0>;
  824. };
  825. };
  826.  
  827. bootloader {
  828. rb_detect = <0x1>;
  829. timming_mode = "mode5";
  830. busy_pad = "rb0";
  831. phandle = <0x49>;
  832. chip_num = <0x1>;
  833. t_rhoh = <0xf>;
  834. t_rea = <0x14>;
  835. bch_mode = "bch8_1k";
  836. part_num = <0x0>;
  837. enable_pad = "ce0";
  838. };
  839. };
  840.  
  841. p_tsensor@ff634594 {
  842. cal_d = <0x24c3>;
  843. cal_c = <0xc57>;
  844. cal_b = <0x1a8>;
  845. phandle = <0x85>;
  846. clock-names = "ts_comp";
  847. reg = <0xff634800 0x50 0xff800268 0x4>;
  848. cal_type = <0x1>;
  849. rtemp = <0x1c138>;
  850. status = "okay";
  851. interrupts = <0x0 0x23 0x0>;
  852. #thermal-sensor-cells = <0x1>;
  853. cal_a = <0x144>;
  854. device_name = "meson-pthermal";
  855. compatible = "amlogic, r1p1-tsensor";
  856. clocks = <0x2 0xd6>;
  857. };
  858.  
  859. vout {
  860. dev_name = "vout";
  861. status = "okay";
  862. compatible = "amlogic, vout";
  863. };
  864.  
  865. rc@0xff808040 {
  866. pinctrl-names = "default";
  867. map = <0x2a>;
  868. protocol = <0x1>;
  869. pinctrl-0 = <0x29>;
  870. phandle = <0xe8>;
  871. reg = <0xff808040 0x44 0xff808000 0x20>;
  872. max_frame_time = <0xc8>;
  873. dev_name = "meson-remote";
  874. status = "okay";
  875. interrupts = <0x0 0xc4 0x1>;
  876. led_blink_frq = <0x64>;
  877. led_blink = <0x1>;
  878. compatible = "amlogic, aml_remote";
  879. };
  880.  
  881. galcore {
  882. nn_efuse = <0xff63003c 0x20>;
  883. interrupt-names = "galcore";
  884. clock-names = "cts_vipnanoq_axi_clk_composite", "cts_vipnanoq_core_clk_composite";
  885. reg = <0xff100000 0x800 0xff000000 0x400000 0xff63c118 0x0 0xff63c11c 0x0 0xffd01088 0x0>;
  886. dev_name = "galcore";
  887. status = "okay";
  888. interrupts = <0x0 0xba 0x4>;
  889. compatible = "amlogic, galcore";
  890. clocks = <0x2 0xe8 0x2 0xe7>;
  891. };
  892.  
  893. efusekey {
  894. key2 = <0x7a>;
  895. phandle = <0x4d>;
  896. key3 = <0x7b>;
  897. key1 = <0x79>;
  898. keynum = <0x4>;
  899. key0 = <0x78>;
  900.  
  901. key_3 {
  902. offset = <0x12>;
  903. keyname = "usid";
  904. phandle = <0x7b>;
  905. size = <0x10>;
  906. };
  907.  
  908. key_1 {
  909. offset = <0x6>;
  910. keyname = "mac_bt";
  911. phandle = <0x79>;
  912. size = <0x6>;
  913. };
  914.  
  915. key_0 {
  916. offset = <0x0>;
  917. keyname = "mac";
  918. phandle = <0x78>;
  919. size = <0x6>;
  920. };
  921.  
  922. key_2 {
  923. offset = <0xc>;
  924. keyname = "mac_wifi";
  925. phandle = <0x7a>;
  926. size = <0x6>;
  927. };
  928. };
  929.  
  930. audio_data {
  931. phandle = <0xc6>;
  932. status = "okay";
  933. query_licence_cmd = <0x82000050>;
  934. compatible = "amlogic, audio_data";
  935. };
  936.  
  937. __symbols__ {
  938. rsv = "/partitions/rsv";
  939. b_uart_pins = "/pinctrl@ff634480/b_uart";
  940. misc = "/partitions/misc";
  941. dummy_codec = "/dummy";
  942. logo_reserved = "/reserved-memory/linux,meson-fb";
  943. ethmac = "/ethernet@ff3f0000";
  944. sdio_clk_cmd_pins = "/pinctrl@ff634480/sdio_clk_cmd_pins";
  945. spicc0_pins_x = "/pinctrl@ff634480/spicc0_pins_x";
  946. tdmout_b = "/pinctrl@ff634480/tdmout_b";
  947. sd_emmc_a = "/sdio@ffe03000";
  948. ppmgr_reserved = "/reserved-memory/linux,ppmgr";
  949. uart_C = "/serial@ffd22000";
  950. usb2_phy_v2 = "/usb2phy@ffe09000";
  951. remote = "/rc@0xff808040";
  952. CPU2 = "/cpus/cpu@2";
  953. i2c2_master_pins2 = "/pinctrl@ff634480/i2c2_pins2";
  954. spicc1 = "/soc/cbus@ffd00000/spi@15000";
  955. cam_dvp_pins = "/pinctrl@ff634480/cam_dvp_pins";
  956. defendkey = "/defendkey";
  957. keysn_15 = "/unifykey/key_15";
  958. dvb_s_ts0_pins = "/pinctrl@ff800014/dvb_s_ts0_pins";
  959. pwm_f_pins2 = "/pinctrl@ff634480/pwm_f_pins2";
  960. custom_maps = "/custom_maps";
  961. i2c0_master_pins1 = "/pinctrl@ff634480/i2c0_pins1";
  962. i2c0_master_pins3 = "/pinctrl@ff634480/i2c0_pins3";
  963. nand = "/nfc@0";
  964. gpio_intc = "/soc/cbus@ffd00000/interrupt-controller@f080";
  965. key_3 = "/efusekey/key_3";
  966. i2c3_master_pins2 = "/pinctrl@ff634480/i2c3_pins2";
  967. keysn_4 = "/unifykey/key_4";
  968. vendor = "/partitions/vendor";
  969. sdio_x_clk_cmd_pins = "/pinctrl@ff634480/sdio_x_clk_cmd_pins";
  970. recovery = "/partitions/recovery";
  971. map_1 = "/custom_maps/map_1";
  972. internal_gpio_pins = "/pinctrl@ff634480/internal_gpio_pins";
  973. pwm_cd = "/soc/cbus@ffd00000/pwm@1a000";
  974. dvfs800_cfg = "/bifrost/dvfs800_cfg";
  975. pwm_a_pins = "/pinctrl@ff634480/pwm_a";
  976. dhot = "/thermal-zones/ddr_thermal/trips/trip-point@2";
  977. vdin0 = "/vdin0";
  978. eecec_b = "/pinctrl@ff634480/ee_cecb";
  979. tdmb_mclk = "/pinctrl@ff634480/tdmb_mclk";
  980. pdm_codec = "/dummy";
  981. eecec_a = "/pinctrl@ff634480/ee_ceca";
  982. gen_clk_ee_z = "/pinctrl@ff634480/gen_clk_ee_z";
  983. irblaster = "/meson-irblaster";
  984. tee = "/partitions/tee";
  985. wdt = "/watchdog@0xffd0f0d0";
  986. pcritical = "/thermal-zones/soc_thermal/trips/trip-point@3";
  987. tdmc_mclk = "/pinctrl@ff634480/tdmc_mclk";
  988. hdmitx_hpd = "/pinctrl@ff634480/hdmitx_hpd";
  989. key_1 = "/efusekey/key_1";
  990. clkc_b = "/soc/hiubus@ff63c000/clock-controller@1";
  991. i2c0_master_pins2 = "/pinctrl@ff634480/i2c0_pins2";
  992. dtbo = "/partitions/dtbo";
  993. aocec_a = "/pinctrl@ff800014/ao_ceca";
  994. cbus = "/soc/cbus@ffd00000";
  995. uart_AO = "/soc/aobus@ff800000/serial@3000";
  996. power_ctrl = "/power_ctrl@ff8000e8";
  997. tdmccodec = "/auge_sound/aml-audio-card,dai-link@2/codec";
  998. dcontrol = "/thermal-zones/ddr_thermal/trips/trip-point@1";
  999. keysn_0 = "/unifykey/key_0";
  1000. all_nand_pins = "/pinctrl@ff634480/all_nand_pins";
  1001. pdm = "/soc/audiobus@0xFF660000/pdm";
  1002. vdin1_cma_reserved = "/reserved-memory/linux,vdin1_cma";
  1003. cpus = "/cpus";
  1004. dvfs666_cfg = "/bifrost/dvfs666_cfg";
  1005. tdmacpu = "/auge_sound/aml-audio-card,dai-link@0/cpu";
  1006. dwc3 = "/dwc3@ff500000";
  1007. cpufreq_cool0 = "/meson-cooldev@0/cpufreq_cool0";
  1008. tdmc = "/soc/audiobus@0xFF660000/tdm@2";
  1009. map_0 = "/custom_maps/map_0";
  1010. cache = "/partitions/cache";
  1011. ao_uart_pins = "/pinctrl@ff800014/ao_uart";
  1012. vm0_cma_reserved = "/reserved-memory/linux,vm0_cma";
  1013. pwm_d_pins2 = "/pinctrl@ff634480/pwm_d_pins2";
  1014. spdifb = "/soc/audiobus@0xFF660000/spdif@1";
  1015. clkc = "/soc/hiubus@ff63c000/clock-controller@0";
  1016. spdifin = "/pinctrl@ff634480/spdifin";
  1017. gpio_ao = "/pinctrl@ff800014/ao-bank@ff800014";
  1018. d_tsensor = "/d_tsensor@ff800228";
  1019. CPU1 = "/cpus/cpu@1";
  1020. CPU0 = "/cpus/cpu@0";
  1021. vend_data = "/amhdmitx/vend_data";
  1022. i2c1_master_pins2 = "/pinctrl@ff634480/i2c1_pins2";
  1023. boot = "/partitions/boot";
  1024. phot = "/thermal-zones/soc_thermal/trips/trip-point@2";
  1025. pinctrl_aobus = "/pinctrl@ff800014";
  1026. product = "/partitions/product";
  1027. dwc2_a = "/dwc2_a@ff400000";
  1028. vdin1 = "/vdin1";
  1029. pwm_ao_a_pins = "/pinctrl@ff800014/pwm_ao_a";
  1030. keysn_1 = "/unifykey/key_1";
  1031. aobus = "/soc/aobus@ff800000";
  1032. tdmout_a = "/pinctrl@ff634480/tdmout_a";
  1033. pwm_AO_ab = "/soc/aobus@ff800000/pwm@7000";
  1034. pwm_b_pins1 = "/pinctrl@ff634480/pwm_b_pins1";
  1035. pwm_ef = "/soc/cbus@ffd00000/pwm@19000";
  1036. spicc0 = "/soc/cbus@ffd00000/spi@13000";
  1037. loopbackb = "/soc/audiobus@0xFF660000/loopback@1";
  1038. usb3_phy_v2 = "/usb3phy@ffe09080";
  1039. tdmin_c = "/pinctrl@ff634480/tdmin_c";
  1040. secos_reserved = "/reserved-memory/linux,secos";
  1041. gpu = "/bifrost";
  1042. sd_to_ao_uart_clr_pins = "/pinctrl@ff800014/sd_to_ao_uart_clr_pins";
  1043. system = "/partitions/system";
  1044. pwm_ao_d_pins2 = "/pinctrl@ff800014/pwm_ao_d_pins2";
  1045. sd_all_pins = "/pinctrl@ff634480/sd_all_pins";
  1046. pwm_c_pins1 = "/pinctrl@ff634480/pwm_c_pins1";
  1047. audiobus = "/soc/audiobus@0xFF660000";
  1048. keysn_6 = "/unifykey/key_6";
  1049. keysn_3 = "/unifykey/key_3";
  1050. tdmlb = "/soc/audiobus@0xFF660000/tdm@3";
  1051. i2c2_master_pins3 = "/pinctrl@ff634480/i2c2_pins3";
  1052. jtag_apee_pins = "/pinctrl@ff634480/jtag_apee_pin";
  1053. keysn_7 = "/unifykey/key_7";
  1054. dvfs125_cfg = "/bifrost/clk125_cfg";
  1055. hiubus = "/soc/hiubus@ff63c000";
  1056. sd_clr_noall_pins = "/pinctrl@ff634480/sd_clr_noall_pins";
  1057. metadata = "/partitions/metadata";
  1058. keysn_2 = "/unifykey/key_2";
  1059. audiolocker = "/locker";
  1060. ddr_thermal = "/thermal-zones/ddr_thermal";
  1061. ion_cma_reserved = "/reserved-memory/linux,ion-dev";
  1062. gpio = "/pinctrl@ff634480/banks@ff6346c0";
  1063. jtag_apao_pins = "/pinctrl@ff800014/jtag_apao_pin";
  1064. sdio_x_clr_pins = "/pinctrl@ff634480/sdio_x_clr_pins";
  1065. sdio_all_pins = "/pinctrl@ff634480/sdio_all_pins";
  1066. uart_B = "/serial@ffd23000";
  1067. amlogic_codec = "/t9015";
  1068. tdmout_c = "/pinctrl@ff634480/tdmout_c";
  1069. keysn_5 = "/unifykey/key_5";
  1070. efusekey = "/efusekey";
  1071. audio_data = "/audio_data";
  1072. pdmin = "/pinctrl@ff634480/pdmin";
  1073. vpu = "/vpu";
  1074. emmc_conf_pull_done = "/pinctrl@ff634480/emmc_conf_pull_done";
  1075. picdec_cma_reserved = "/linux,picdec";
  1076. CPU_SLEEP_0 = "/cpus/idle-states/cpu-sleep-0";
  1077. data = "/partitions/data";
  1078. pwm_d_pins1 = "/pinctrl@ff634480/pwm_d_pins1";
  1079. clkaudio = "/soc/audiobus@0xFF660000/audio_clocks";
  1080. wifi_pwm_conf = "/wifi_pwm_conf";
  1081. vad = "/soc/audiobus@0xFF660000/vad";
  1082. codec_mm_reserved = "/reserved-memory/linux,codec_mm_reserved";
  1083. keysn_12 = "/unifykey/key_12";
  1084. pwm_f_pins1 = "/pinctrl@ff634480/pwm_f_pins1";
  1085. pwm_ao_c_pins2 = "/pinctrl@ff800014/pwm_ao_c_pins2";
  1086. aoclkc = "/soc/aobus@ff800000/clock-controller@0";
  1087. codec_mm_cma = "/reserved-memory/linux,codec_mm_cma";
  1088. keysn_8 = "/unifykey/key_8";
  1089. soc_thermal = "/thermal-zones/soc_thermal";
  1090. key_0 = "/efusekey/key_0";
  1091. ao_to_sd_uart_pins = "/pinctrl@ff634480/ao_to_sd_uart_pins";
  1092. tdmin_a = "/pinctrl@ff634480/tdmin_a";
  1093. hdmitx_hpd_gpio = "/pinctrl@ff634480/hdmitx_hpd_gpio";
  1094. clk12_24_z_pins = "/pinctrl@ff634480/clk12_24_z_pins";
  1095. i2c0 = "/soc/cbus@ffd00000/i2c@1f000";
  1096. canvas = "/canvas";
  1097. pwm_ao_d_pins1 = "/pinctrl@ff800014/pwm_ao_d_pins1";
  1098. ad82584f_62 = "/soc/cbus@ffd00000/i2c@1c000/ad82584f_62@62";
  1099. vddcpu0 = "/pwmao_d-regulator";
  1100. internal_eth_pins = "/pinctrl@ff634480/internal_eth_pins";
  1101. pwm_ao_a_hiz_pins = "/pinctrl@ff800014/pwm_ao_a_hiz";
  1102. i2c2 = "/soc/cbus@ffd00000/i2c@1d000";
  1103. sd_emmc_b = "/sd@ffe05000";
  1104. keysn_11 = "/unifykey/key_11";
  1105. pcie_A = "/pcieA@fc000000";
  1106. dswitch_on = "/thermal-zones/ddr_thermal/trips/trip-point@0";
  1107. ao_i2c_slave_pins = "/pinctrl@ff800014/ao_i2c_slave_pins";
  1108. tdmb = "/soc/audiobus@0xFF660000/tdm@1";
  1109. dvfs285_cfg = "/bifrost/dvfs285_cfg";
  1110. gpufreq_cool0 = "/meson-cooldev@0/gpufreq_cool0";
  1111. pwm_AO_cd = "/soc/aobus@ff800000/pwm@2000";
  1112. amlogic_battery = "/dummy-battery";
  1113. secmon_reserved = "/reserved-memory/linux,secmon";
  1114. aocec = "/aocec";
  1115. p_tsensor = "/p_tsensor@ff634594";
  1116. external_eth_pins = "/pinctrl@ff634480/external_eth_pins";
  1117. nandnormal = "/nfc@0/nandnormal";
  1118. vbmeta = "/partitions/vbmeta";
  1119. codec_io = "/codec_io";
  1120. a_uart_pins = "/pinctrl@ff634480/a_uart";
  1121. loopbacka = "/soc/audiobus@0xFF660000/loopback@0";
  1122. ao_i2c_master_pins2 = "/pinctrl@ff800014/ao_i2c_pins2";
  1123. keysn_13 = "/unifykey/key_13";
  1124. pswitch_on = "/thermal-zones/soc_thermal/trips/trip-point@0";
  1125. uart_AO_B = "/soc/aobus@ff800000/serial@4000";
  1126. sd_clk_cmd_pins = "/pinctrl@ff634480/sd_clk_cmd_pins";
  1127. meson_cooldev = "/meson-cooldev@0";
  1128. meson_fb = "/fb";
  1129. sdio_x_en_pins = "/pinctrl@ff634480/sdio_x_en_pins";
  1130. i2c2_master_pins1 = "/pinctrl@ff634480/i2c2_pins1";
  1131. tdma = "/soc/audiobus@0xFF660000/tdm@0";
  1132. cri_data = "/partitions/cri_data";
  1133. dcritical = "/thermal-zones/ddr_thermal/trips/trip-point@3";
  1134. sd_1bit_pins = "/pinctrl@ff634480/sd_1bit_pins";
  1135. map_2 = "/custom_maps/map_2";
  1136. dvfs400_cfg = "/bifrost/dvfs400_cfg";
  1137. spdifa = "/soc/audiobus@0xFF660000/spdif@0";
  1138. aocec_b = "/pinctrl@ff800014/ao_cecb";
  1139. param = "/partitions/param";
  1140. i2c1_master_pins3 = "/pinctrl@ff634480/i2c1_pins3";
  1141. nand_cs_pins = "/pinctrl@ff634480/nand_cs";
  1142. logo = "/partitions/logo";
  1143. tdmacodec = "/auge_sound/aml-audio-card,dai-link@0/codec";
  1144. gpucore_cool0 = "/meson-cooldev@0/gpucore_cool0";
  1145. i2c_AO = "/soc/aobus@ff800000/i2c@5000";
  1146. amlogic_charger = "/dummy-charger";
  1147. pcontrol = "/thermal-zones/soc_thermal/trips/trip-point@1";
  1148. emmc_conf_pull_up = "/pinctrl@ff634480/emmc_conf_pull_up";
  1149. dvfs850_cfg = "/bifrost/dvfs850_cfg";
  1150. periphs = "/soc/periphs@ff634400";
  1151. earc = "/soc/audiobus@0xFF660000/earc";
  1152. di_cma_reserved = "/reserved-memory/linux,di_cma";
  1153. bl_pwm_off_pins = "/pinctrl@ff634480/bl_pwm_off_pin";
  1154. cpucore_cool0 = "/meson-cooldev@0/cpucore_cool0";
  1155. dvfs250_cfg = "/bifrost/dvfs250_cfg";
  1156. odm = "/partitions/odm";
  1157. ao_b_uart_pins = "/pinctrl@ff800014/ao_b_uart";
  1158. hdmitx_ddc = "/pinctrl@ff634480/hdmitx_ddc";
  1159. pwm_ao_c_hiz_pins = "/pinctrl@ff800014/pwm_ao_c_hiz";
  1160. nand_partitions = "/nfc@0/nand_partition";
  1161. gic = "/interrupt-controller@2c001000";
  1162. i2c1_master_pins1 = "/pinctrl@ff634480/i2c1_pins1";
  1163. tdmin_b = "/pinctrl@ff634480/tdmin_b";
  1164. pwm_ao_c_pins1 = "/pinctrl@ff800014/pwm_ao_c_pins1";
  1165. pinctrl_periphs = "/pinctrl@ff634480";
  1166. amhdmitx = "/amhdmitx";
  1167. asrca = "/soc/audiobus@0xFF660000/resample@0";
  1168. CPU3 = "/cpus/cpu@3";
  1169. irblaster_pins = "/pinctrl@ff800014/irblaster_pin";
  1170. xtal = "/xtal-clk";
  1171. pwm_ab = "/soc/cbus@ffd00000/pwm@1b000";
  1172. uart_A = "/serial@ffd24000";
  1173. audio_effect = "/eqdrc";
  1174. cpu_opp_table0 = "/cpu_opp_table0";
  1175. ao_i2c_master_pins1 = "/pinctrl@ff800014/ao_i2c_pins1";
  1176. pwm_ao_d_pins3 = "/pinctrl@ff800014/pwm_ao_d_pins3";
  1177. pwm_c_pins3 = "/pinctrl@ff634480/pwm_c_pins3";
  1178. cluster0 = "/cpus/cpu-map/cluster0";
  1179. mailbox = "/mhu@c883c400";
  1180. partitions = "/partitions";
  1181. c_uart_pins = "/pinctrl@ff634480/c_uart";
  1182. i2c3_master_pins1 = "/pinctrl@ff634480/i2c3_pins1";
  1183. key_2 = "/efusekey/key_2";
  1184. dvfs500_cfg = "/bifrost/dvfs500_cfg";
  1185. i2c3 = "/soc/cbus@ffd00000/i2c@1c000";
  1186. keysn_14 = "/unifykey/key_14";
  1187. efuse = "/efuse";
  1188. tdmbcodec = "/auge_sound/aml-audio-card,dai-link@1/codec";
  1189. sdio_x_all_pins = "/pinctrl@ff634480/sdio_x_all_pins";
  1190. remote_pins = "/pinctrl@ff800014/remote_pin";
  1191. saradc = "/saradc";
  1192. keysn_10 = "/unifykey/key_10";
  1193. spicc1_pins = "/pinctrl@ff634480/spicc1_pins";
  1194. map_3 = "/custom_maps/map_3";
  1195. bootloader = "/nfc@0/bootloader";
  1196. pwm_ao_b_pins = "/pinctrl@ff800014/pwm_ao_b";
  1197. sd_to_ao_uart_pins = "/pinctrl@ff800014/sd_to_ao_uart_pins";
  1198. keysn_9 = "/unifykey/key_9";
  1199. pwm_c_pins2 = "/pinctrl@ff634480/pwm_c_pins2";
  1200. aed = "/soc/audiobus@0xFF660000/effect";
  1201. spicc0_pins_c = "/pinctrl@ff634480/spicc0_pins_c";
  1202. pwm_e_pins = "/pinctrl@ff634480/pwm_e";
  1203. spdifout = "/pinctrl@ff634480/spdifout";
  1204. sd_emmc_c = "/emmc@ffe07000";
  1205. sd_clr_all_pins = "/pinctrl@ff634480/sd_clr_all_pins";
  1206. pwm_b_pins2 = "/pinctrl@ff634480/pwm_b_pins2";
  1207. i2c_AO_slave = "/soc/aobus@ff800000/i2c_slave@6000";
  1208. emmc_clk_cmd_pins = "/pinctrl@ff634480/emmc_clk_cmd_pins";
  1209. i2c1 = "/soc/cbus@ffd00000/i2c@1e000";
  1210. };
  1211.  
  1212. wifi {
  1213. pinctrl-names = "default";
  1214. pwm_config = <0x61>;
  1215. pinctrl-0 = <0x60>;
  1216. dhd_static_buf;
  1217. power_on_pin = <0x12 0x48 0x0>;
  1218. irq_trigger_type = "GPIO_IRQ_LOW";
  1219. dev_name = "aml_wifi";
  1220. interrupt_pin = <0x12 0x49 0x0>;
  1221. status = "okay";
  1222. compatible = "amlogic, aml_wifi";
  1223. };
  1224.  
  1225. vpu {
  1226. phandle = <0x93>;
  1227. clock-names = "vapb_clk", "vpu_intr_gate", "vpu_clk0", "vpu_clk1", "vpu_clk";
  1228. dev_name = "vpu";
  1229. status = "okay";
  1230. clk_level = <0x7>;
  1231. compatible = "amlogic, vpu-sm1";
  1232. clocks = <0x2 0x95 0x2 0x4c 0x2 0x87 0x2 0x8b 0x2 0x8c>;
  1233. };
  1234.  
  1235. pinctrl@ff800014 {
  1236. phandle = <0x95>;
  1237. ranges;
  1238. #address-cells = <0x1>;
  1239. #size-cells = <0x1>;
  1240. compatible = "amlogic,meson-g12a-aobus-pinctrl";
  1241.  
  1242. ao-bank@ff800014 {
  1243. #gpio-cells = <0x2>;
  1244. phandle = <0x5f>;
  1245. reg = <0xff800014 0x8 0xff800024 0x14 0xff80001c 0x8>;
  1246. reg-names = "mux", "gpio", "drive-strength";
  1247. gpio-controller;
  1248. };
  1249.  
  1250. dvb_s_ts0_pins {
  1251. phandle = <0xa3>;
  1252.  
  1253. tsin_a {
  1254. groups = "tsin_a_sop_ao", "tsin_a_valid_ao", "tsin_a_clk_ao", "tsin_a_din0_ao";
  1255. function = "tsin_a_ao";
  1256. };
  1257. };
  1258.  
  1259. pwm_ao_b {
  1260. phandle = <0x9b>;
  1261.  
  1262. mux {
  1263. groups = "pwm_ao_b";
  1264. function = "pwm_ao_b";
  1265. };
  1266. };
  1267.  
  1268. sd_to_ao_uart_clr_pins {
  1269. phandle = <0x42>;
  1270.  
  1271. mux {
  1272. groups = "GPIOAO_0", "GPIOAO_1";
  1273. function = "gpio_aobus";
  1274. };
  1275. };
  1276.  
  1277. pwm_ao_d_pins2 {
  1278. phandle = <0xa0>;
  1279.  
  1280. mux {
  1281. groups = "pwm_ao_d_10";
  1282. function = "pwm_ao_d";
  1283. };
  1284. };
  1285.  
  1286. ao_cecb {
  1287. phandle = <0xa2>;
  1288.  
  1289. mux {
  1290. groups = "cec_ao_b";
  1291. function = "cec_ao";
  1292. };
  1293. };
  1294.  
  1295. pwm_ao_a_hiz {
  1296. phandle = <0x9a>;
  1297.  
  1298. mux {
  1299. groups = "pwm_ao_a_hiz";
  1300. function = "pwm_ao_a";
  1301. };
  1302. };
  1303.  
  1304. irblaster_pin {
  1305. phandle = <0x3b>;
  1306.  
  1307. mux {
  1308. groups = "remote_out_ao";
  1309. function = "remote_out_ao";
  1310. };
  1311. };
  1312.  
  1313. pwm_ao_c_pins2 {
  1314. phandle = <0x9d>;
  1315.  
  1316. mux {
  1317. groups = "pwm_ao_c_6";
  1318. function = "pwm_ao_c";
  1319. };
  1320. };
  1321.  
  1322. jtag_apao_pin {
  1323. phandle = <0x16>;
  1324.  
  1325. mux {
  1326. groups = "jtag_a_tdi", "jtag_a_tdo", "jtag_a_clk", "jtag_a_tms";
  1327. function = "jtag_a";
  1328. };
  1329. };
  1330.  
  1331. pwm_ao_d_pins1 {
  1332. phandle = <0x9f>;
  1333.  
  1334. mux {
  1335. groups = "pwm_ao_d_5";
  1336. function = "pwm_ao_d";
  1337. };
  1338. };
  1339.  
  1340. ao_i2c_slave_pins {
  1341. phandle = <0x1a>;
  1342.  
  1343. mux {
  1344. groups = "i2c_ao_slave_sck", "i2c_ao_slave_sda";
  1345. function = "i2c_ao_slave";
  1346. };
  1347. };
  1348.  
  1349. pwm_ao_c_hiz {
  1350. phandle = <0x9e>;
  1351.  
  1352. mux {
  1353. groups = "pwm_ao_c_hiz_4";
  1354. function = "pwm_ao_c";
  1355. };
  1356. };
  1357.  
  1358. ao_i2c_pins1 {
  1359. phandle = <0x97>;
  1360.  
  1361. mux {
  1362. groups = "i2c_ao_sck", "i2c_ao_sda";
  1363. function = "i2c_ao";
  1364. drive-strength = <0x2>;
  1365. };
  1366. };
  1367.  
  1368. remote_pin {
  1369. phandle = <0x29>;
  1370.  
  1371. mux {
  1372. groups = "remote_input_ao";
  1373. function = "remote_input_ao";
  1374. };
  1375. };
  1376.  
  1377. ao_b_uart {
  1378. phandle = <0x1b>;
  1379.  
  1380. mux {
  1381. groups = "uart_ao_tx_b_2", "uart_ao_rx_b_3";
  1382. function = "uart_ao_b";
  1383. };
  1384. };
  1385.  
  1386. ao_i2c_pins2 {
  1387. phandle = <0x98>;
  1388.  
  1389. mux {
  1390. groups = "i2c_ao_sck_e", "i2c_ao_sda_e";
  1391. function = "i2c_ao";
  1392. drive-strength = <0x2>;
  1393. };
  1394. };
  1395.  
  1396. pwm_ao_c_pins1 {
  1397. phandle = <0x9c>;
  1398.  
  1399. mux {
  1400. groups = "pwm_ao_c_4";
  1401. function = "pwm_ao_c";
  1402. };
  1403. };
  1404.  
  1405. ao_ceca {
  1406. phandle = <0xa1>;
  1407.  
  1408. mux {
  1409. groups = "cec_ao_a";
  1410. function = "cec_ao";
  1411. };
  1412. };
  1413.  
  1414. pwm_ao_a {
  1415. phandle = <0x99>;
  1416.  
  1417. mux {
  1418. groups = "pwm_ao_a";
  1419. function = "pwm_ao_a";
  1420. };
  1421. };
  1422.  
  1423. pwm_ao_d_pins3 {
  1424. phandle = <0x8c>;
  1425.  
  1426. mux {
  1427. groups = "pwm_ao_d_e";
  1428. function = "pwm_ao_d";
  1429. };
  1430. };
  1431.  
  1432. ao_uart {
  1433. phandle = <0x96>;
  1434.  
  1435. mux {
  1436. groups = "uart_ao_tx_a", "uart_ao_rx_a";
  1437. function = "uart_ao_a";
  1438. };
  1439. };
  1440.  
  1441. sd_to_ao_uart_pins {
  1442. phandle = <0x44>;
  1443.  
  1444. mux {
  1445. groups = "uart_ao_tx_a", "uart_ao_rx_a";
  1446. input-enable;
  1447. bias-pull-up;
  1448. function = "uart_ao_a";
  1449. };
  1450. };
  1451. };
  1452.  
  1453. aml_snd_iomap {
  1454. status = "okay";
  1455. ranges;
  1456. #address-cells = <0x1>;
  1457. #size-cells = <0x1>;
  1458. compatible = "amlogic, snd-iomap";
  1459.  
  1460. audiolocker_base {
  1461. reg = <0xff661400 0x400>;
  1462. };
  1463.  
  1464. eqdrc_base {
  1465. reg = <0xff662000 0x1000>;
  1466. };
  1467.  
  1468. earcrx_dmac_base {
  1469. reg = <0xff663c00 0x20>;
  1470. };
  1471.  
  1472. earcrx_top_base {
  1473. reg = <0xff663e00 0x10>;
  1474. };
  1475.  
  1476. earcrx_cdmc_base {
  1477. reg = <0xff663800 0x30>;
  1478. };
  1479.  
  1480. reset_base {
  1481. reg = <0xffd01000 0x1000>;
  1482. };
  1483.  
  1484. vad_base {
  1485. reg = <0xff661800 0x400>;
  1486. };
  1487.  
  1488. pdm_bus {
  1489. reg = <0xff661000 0x400>;
  1490. };
  1491.  
  1492. audiobus_base {
  1493. reg = <0xff660000 0x1000>;
  1494. };
  1495. };
  1496.  
  1497. amlvecm {
  1498. tx_op_color_primary = <0x0>;
  1499. cm_en = <0x0>;
  1500. dev_name = "aml_vecm";
  1501. status = "okay";
  1502. wb_en = <0x0>;
  1503. gamma_en = <0x0>;
  1504. compatible = "amlogic, vecm";
  1505. };
  1506.  
  1507. timer {
  1508. interrupts = <0x1 0xd 0xff08 0x1 0xe 0xff08 0x1 0xb 0xff08 0x1 0xa 0xff08>;
  1509. compatible = "arm,armv7-timer";
  1510. };
  1511.  
  1512. vout2 {
  1513. clock-names = "vpu_clkc0", "vpu_clkc";
  1514. dev_name = "vout";
  1515. status = "okay";
  1516. compatible = "amlogic, vout2";
  1517. clocks = <0x2 0xc4 0x2 0xc9>;
  1518. };
  1519.  
  1520. wifi_pwm_conf {
  1521. phandle = <0x61>;
  1522.  
  1523. pwm_channel1_conf {
  1524. times = <0xa>;
  1525. duty-cycle = <0x3ba6>;
  1526. pwms = <0x62 0x0 0x774d 0x0>;
  1527. };
  1528.  
  1529. pwm_channel2_conf {
  1530. times = <0xc>;
  1531. duty-cycle = <0x3b92>;
  1532. pwms = <0x62 0x2 0x7724 0x0>;
  1533. };
  1534. };
  1535.  
  1536. eqdrc {
  1537. phandle = <0x100>;
  1538. channel_mask = <0x3>;
  1539. eqdrc_module = <0x1>;
  1540. lane_mask = <0x1>;
  1541. };
  1542.  
  1543. vcodec_dec {
  1544. dev_name = "aml-vcodec-dec";
  1545. status = "okay";
  1546. compatible = "amlogic, vcodec-dec";
  1547. };
  1548.  
  1549. picdec {
  1550. memory-region = <0x65>;
  1551. dev_name = "picdec";
  1552. status = "okay";
  1553. compatible = "amlogic, picdec";
  1554. };
  1555.  
  1556. dwc2_a@ff400000 {
  1557. pl-periph-id = <0x0>;
  1558. cpu-type = "v2";
  1559. port-dma = <0x0>;
  1560. phy-reg-size = <0xa0>;
  1561. phandle = <0xc8>;
  1562. clock-names = "usb_general", "usb1";
  1563. reg = <0xff400000 0x40000>;
  1564. port-id = <0x0>;
  1565. port-type = <0x1>;
  1566. controller-type = <0x1>;
  1567. status = "okay";
  1568. usb-fifo = <0x2d8>;
  1569. port-id-mode = <0x1>;
  1570. phy-interface = <0x2>;
  1571. interrupts = <0x0 0x1f 0x4>;
  1572. port-speed = <0x0>;
  1573. phy-reg = <0xffe09000>;
  1574. port-config = <0x0>;
  1575. device_name = "dwc2_a";
  1576. compatible = "amlogic, dwc2";
  1577. clocks = <0x2 0x41 0x2 0x49>;
  1578. clock-src = "usb0";
  1579. };
  1580.  
  1581. mhu@c883c400 {
  1582. #mbox-cells = <0x1>;
  1583. phandle = <0x10>;
  1584. reg = <0xff63c400 0x4c 0xfffe7000 0x800>;
  1585. mbox-names = "cpu_to_scp_low", "cpu_to_scp_high";
  1586. interrupts = <0x0 0xd1 0x1 0x0 0xd2 0x1>;
  1587. mboxes = <0x10 0x0 0x10 0x1>;
  1588. compatible = "amlogic, meson_mhu";
  1589. };
  1590.  
  1591. canvas {
  1592. phandle = <0xf1>;
  1593. reg = <0xff638000 0x2000>;
  1594. dev_name = "amlogic-canvas";
  1595. status = "okay";
  1596. compatible = "amlogic, meson, canvas";
  1597. };
  1598.  
  1599. sdio@ffe03000 {
  1600. pinctrl-names = "sdio_all_pins", "sdio_clk_cmd_pins";
  1601. cap-mmc-highspeed;
  1602. disable-wp;
  1603. pinctrl-0 = <0x45>;
  1604. phandle = <0xf7>;
  1605. clock-names = "core", "clkin0", "clkin1", "clkin2", "xtal";
  1606. reg = <0xffe03000 0x800>;
  1607. bus-width = <0x4>;
  1608. pinctrl-1 = <0x46>;
  1609. max-frequency = <0x5f5e100>;
  1610. status = "okay";
  1611. interrupts = <0x0 0xbd 0x4>;
  1612. cap-sd-highspeed;
  1613. compatible = "amlogic, meson-mmc-sm1";
  1614. clocks = <0x2 0x33 0x2 0x6a 0x2 0x2 0x2 0x5 0x15>;
  1615.  
  1616. sdio {
  1617. f_min = <0x61a80>;
  1618. card_type = <0x3>;
  1619. f_max = <0xbebc200>;
  1620. max_req_size = <0x20000>;
  1621. ocr_avail = <0x200080>;
  1622. pinname = "sdio";
  1623. caps = "MMC_CAP_4_BIT_DATA", "MMC_CAP_MMC_HIGHSPEED", "MMC_CAP_SD_HIGHSPEED", "MMC_CAP_NONREMOVABLE", "MMC_CAP_UHS_SDR12", "MMC_CAP_UHS_SDR25", "MMC_CAP_UHS_SDR50", "MMC_CAP_UHS_SDR104", "MMC_PM_KEEP_POWER", "MMC_CAP_SDIO_IRQ";
  1624. };
  1625. };
  1626.  
  1627. emmc@ffe07000 {
  1628. pinctrl-names = "emmc_clk_cmd_pins", "emmc_all_pins";
  1629. cap-mmc-highspeed;
  1630. disable-wp;
  1631. pinctrl-0 = <0x3c>;
  1632. phandle = <0xf5>;
  1633. clock-names = "core", "clkin0", "clkin1", "clkin2", "xtal";
  1634. reg = <0xffe07000 0x800>;
  1635. bus-width = <0x8>;
  1636. pinctrl-1 = <0x3d 0x3e>;
  1637. max-frequency = <0xbebc200>;
  1638. status = "okay";
  1639. non-removable;
  1640. interrupts = <0x0 0xbf 0x1>;
  1641. cap-sd-highspeed;
  1642. compatible = "amlogic, meson-mmc-sm1";
  1643. clocks = <0x2 0x35 0x2 0x72 0x2 0x2 0x2 0x20 0x15>;
  1644.  
  1645. emmc {
  1646. f_min = <0x61a80>;
  1647. card_type = <0x1>;
  1648. co_phase = <0x3>;
  1649. f_max = <0xbebc200>;
  1650. tx_delay = <0x0>;
  1651. max_req_size = <0x20000>;
  1652. ocr_avail = <0x200080>;
  1653. pinname = "emmc";
  1654. hw_reset = <0x12 0x26 0x0>;
  1655. gpio_dat3 = <0x12 0x1d 0x0>;
  1656. caps = "MMC_CAP_8_BIT_DATA", "MMC_CAP_MMC_HIGHSPEED", "MMC_CAP_SD_HIGHSPEED", "MMC_CAP_NONREMOVABLE", "MMC_CAP_HW_RESET", "MMC_CAP_ERASE", "MMC_CAP_CMD23", "MMC_CAP_DRIVER_TYPE_D";
  1657. };
  1658. };
  1659.  
  1660. cpufreq-meson {
  1661. pinctrl-names = "default";
  1662. pinctrl-0 = <0x8c>;
  1663. status = "okay";
  1664. compatible = "amlogic, cpufreq-meson";
  1665. };
  1666.  
  1667. aocec {
  1668. pinctrl-names = "default", "hdmitx_aocecb", "cec_pin_sleep";
  1669. product_desc = "SM1";
  1670. interrupt-names = "hdmi_aocecb", "hdmi_aocec";
  1671. cec_osd_string = "AML_MBOX";
  1672. pinctrl-0 = <0x37>;
  1673. phandle = <0xee>;
  1674. reg = <0xff80023c 0x4 0xff800000 0x400 0xff634400 0x70>;
  1675. pinctrl-2 = <0x38>;
  1676. pinctrl-1 = <0x38>;
  1677. ee_cec;
  1678. reg-names = "ao_exit", "ao", "periphs";
  1679. cec_version = <0x5>;
  1680. status = "okay";
  1681. port_num = <0x1>;
  1682. arc_port_mask = <0x2>;
  1683. interrupts = <0x0 0xcb 0x1 0x0 0xc7 0x1>;
  1684. vendor_id = <0x0>;
  1685. vendor_name = "Amlogic";
  1686. device_name = "aocec";
  1687. compatible = "amlogic, aocec-sm1";
  1688. };
  1689.  
  1690. power_ctrl@ff8000e8 {
  1691. phandle = <0xcb>;
  1692. reg = <0xff8000e8 0x10 0xff63c100 0x10>;
  1693. compatible = "amlogic, sm1-powerctrl";
  1694. };
  1695.  
  1696. codec_io {
  1697. phandle = <0xf2>;
  1698. status = "okay";
  1699. ranges;
  1700. #address-cells = <0x1>;
  1701. #size-cells = <0x1>;
  1702. compatible = "amlogic, codec_io";
  1703.  
  1704. io_cbus_base {
  1705. reg = <0xffd00000 0x100000>;
  1706. };
  1707.  
  1708. io_dos_base {
  1709. reg = <0xff620000 0x10000>;
  1710. };
  1711.  
  1712. io_hiubus_base {
  1713. reg = <0xff63c000 0x2000>;
  1714. };
  1715.  
  1716. io_vcbus_base {
  1717. reg = <0xff900000 0x40000>;
  1718. };
  1719.  
  1720. io_aobus_base {
  1721. reg = <0xff800000 0x10000>;
  1722. };
  1723.  
  1724. io_efuse_base {
  1725. reg = <0xff630000 0x2000>;
  1726. };
  1727.  
  1728. io_dmc_base {
  1729. reg = <0xff638000 0x2000>;
  1730. };
  1731. };
  1732.  
  1733. aml_reboot {
  1734. sys_reset = <0x84000009>;
  1735. sys_poweroff = <0x84000008>;
  1736. compatible = "aml, reboot";
  1737. };
  1738.  
  1739. usb3phy@ffe09080 {
  1740. u3-ctrl-sleep-shift = <0x12>;
  1741. u3-hhi-mem-pd-shift = <0x1a>;
  1742. usb2-phy-reg = <0xffe09000>;
  1743. phy-reg-size = <0x2000>;
  1744. phandle = <0x14>;
  1745. clock-names = "pcie_refpll";
  1746. reg = <0xffe09080 0x20 0xffd01008 0x100>;
  1747. otg = <0x0>;
  1748. u3-ctrl-iso-shift = <0x12>;
  1749. status = "okay";
  1750. u3-hhi-mem-pd-mask = <0xf>;
  1751. interrupts = <0x0 0x10 0x4>;
  1752. usb2-phy-reg-size = <0x80>;
  1753. phy-reg = <0xff646000>;
  1754. pwr-ctl = <0x1>;
  1755. compatible = "amlogic, amlogic-new-usb3-v2";
  1756. portnum = <0x1>;
  1757. clocks = <0x2 0x18>;
  1758. };
  1759.  
  1760. thermal-zones {
  1761.  
  1762. ddr_thermal {
  1763. phandle = <0x10b>;
  1764. polling-delay-passive = <0x3e8>;
  1765. polling-delay = <0x7d0>;
  1766. thermal-sensors = <0x8b 0x1>;
  1767. sustainable-power = <0x582>;
  1768.  
  1769. trips {
  1770.  
  1771. trip-point@2 {
  1772. type = "hot";
  1773. phandle = <0x10e>;
  1774. hysteresis = <0x1388>;
  1775. temperature = <0x14c08>;
  1776. };
  1777.  
  1778. trip-point@1 {
  1779. type = "passive";
  1780. phandle = <0x10d>;
  1781. hysteresis = <0x1388>;
  1782. temperature = <0x124f8>;
  1783. };
  1784.  
  1785. trip-point@0 {
  1786. type = "passive";
  1787. phandle = <0x10c>;
  1788. hysteresis = <0x1388>;
  1789. temperature = <0xea60>;
  1790. };
  1791.  
  1792. trip-point@3 {
  1793. type = "critical";
  1794. phandle = <0x10f>;
  1795. hysteresis = <0x3e8>;
  1796. temperature = <0x1adb0>;
  1797. };
  1798. };
  1799. };
  1800.  
  1801. soc_thermal {
  1802. phandle = <0x107>;
  1803. polling-delay-passive = <0x64>;
  1804. polling-delay = <0x3e8>;
  1805. thermal-sensors = <0x85 0x0>;
  1806. sustainable-power = <0x582>;
  1807.  
  1808. cooling-maps {
  1809.  
  1810. cpucore_cooling_map {
  1811. trip = <0x86>;
  1812. contribution = <0x400>;
  1813. cooling-device = <0x88 0x0 0x3>;
  1814. };
  1815.  
  1816. gpucore_cooling_map {
  1817. trip = <0x86>;
  1818. contribution = <0x400>;
  1819. cooling-device = <0x8a 0x0 0x2>;
  1820. };
  1821.  
  1822. cpufreq_cooling_map {
  1823. trip = <0x86>;
  1824. contribution = <0x400>;
  1825. cooling-device = <0x87 0x0 0x4>;
  1826. };
  1827.  
  1828. gpufreq_cooling_map {
  1829. trip = <0x86>;
  1830. contribution = <0x400>;
  1831. cooling-device = <0x89 0x0 0x4>;
  1832. };
  1833. };
  1834.  
  1835. trips {
  1836.  
  1837. trip-point@2 {
  1838. type = "hot";
  1839. phandle = <0x109>;
  1840. hysteresis = <0x1388>;
  1841. temperature = <0x14c08>;
  1842. };
  1843.  
  1844. trip-point@1 {
  1845. type = "passive";
  1846. phandle = <0x86>;
  1847. hysteresis = <0x1388>;
  1848. temperature = <0x124f8>;
  1849. };
  1850.  
  1851. trip-point@0 {
  1852. type = "passive";
  1853. phandle = <0x108>;
  1854. hysteresis = <0x1388>;
  1855. temperature = <0xea60>;
  1856. };
  1857.  
  1858. trip-point@3 {
  1859. type = "critical";
  1860. phandle = <0x10a>;
  1861. hysteresis = <0x3e8>;
  1862. temperature = <0x1adb0>;
  1863. };
  1864. };
  1865. };
  1866. };
  1867.  
  1868. memory {
  1869. reg = <0x0 0xd8000000>;
  1870. device_type = "memory";
  1871. };
  1872.  
  1873. bifrost {
  1874. interrupt-parent = <0x1>;
  1875. interrupt-names = "GPU", "MMU", "JOB";
  1876. #cooling-cells = <0x2>;
  1877. phandle = <0x8d>;
  1878. clock-names = "gpu_mux", "gp0_pll";
  1879. reg = <0xffe40000 0x4000 0xffd01000 0x1000 0xff800000 0x1000 0xff63c000 0x1000 0xffd01000 0x1000>;
  1880. sc_mpp = <0x1>;
  1881. num_of_pp = <0x2>;
  1882. interrupts = <0x0 0xa0 0x4 0x0 0xa1 0x4 0x0 0xa2 0x4>;
  1883. tbl = <0x3 0x4 0x5 0x6 0x7 0x7>;
  1884. compatible = "arm,malit60x", "arm,malit6xx", "arm,mali-midgard";
  1885. clocks = <0x2 0x83 0x2 0x7>;
  1886.  
  1887. dvfs800_cfg {
  1888. clk_parent = "fclk_div2p5";
  1889. phandle = <0x90>;
  1890. threshold = <0xe6 0xff>;
  1891. voltage = <0x47e>;
  1892. clk_reg = <0x600>;
  1893. clk_freq = <0x2faf0800>;
  1894. clkp_freq = <0x2faf0800>;
  1895. keep_count = <0x5>;
  1896. };
  1897.  
  1898. dvfs666_cfg {
  1899. clk_parent = "fclk_div3";
  1900. phandle = <0x6>;
  1901. threshold = <0xd2 0xec>;
  1902. voltage = <0x47e>;
  1903. clk_reg = <0x800>;
  1904. clk_freq = <0x27bc86aa>;
  1905. clkp_freq = <0x27bc86aa>;
  1906. keep_count = <0x5>;
  1907. };
  1908.  
  1909. dvfs285_cfg {
  1910. clk_parent = "fclk_div7";
  1911. phandle = <0x3>;
  1912. threshold = <0x64 0xbe>;
  1913. voltage = <0x47e>;
  1914. clk_reg = <0xe00>;
  1915. clk_freq = <0x1107a76d>;
  1916. clkp_freq = <0x1107a76d>;
  1917. keep_count = <0x5>;
  1918. };
  1919.  
  1920. dvfs400_cfg {
  1921. clk_parent = "fclk_div5";
  1922. phandle = <0x4>;
  1923. threshold = <0x98 0xcf>;
  1924. voltage = <0x47e>;
  1925. clk_reg = <0xc00>;
  1926. clk_freq = <0x17d78400>;
  1927. clkp_freq = <0x17d78400>;
  1928. keep_count = <0x5>;
  1929. };
  1930.  
  1931. dvfs850_cfg {
  1932. clk_parent = "gp0_pll";
  1933. phandle = <0x7>;
  1934. threshold = <0xe6 0xff>;
  1935. voltage = <0x47e>;
  1936. clk_reg = <0x200>;
  1937. clk_freq = <0x326cef80>;
  1938. clkp_freq = <0x326cef80>;
  1939. keep_count = <0x5>;
  1940. };
  1941.  
  1942. dvfs250_cfg {
  1943. clk_parent = "fclk_div4";
  1944. phandle = <0x8f>;
  1945. threshold = <0x50 0xaa>;
  1946. voltage = <0x47e>;
  1947. clk_reg = <0xa01>;
  1948. clk_freq = <0xee6b280>;
  1949. clkp_freq = <0x1dcd6500>;
  1950. keep_count = <0x5>;
  1951. };
  1952.  
  1953. dvfs500_cfg {
  1954. clk_parent = "fclk_div4";
  1955. phandle = <0x5>;
  1956. threshold = <0xb4 0xdc>;
  1957. voltage = <0x47e>;
  1958. clk_reg = <0xa00>;
  1959. clk_freq = <0x1dcd6500>;
  1960. clkp_freq = <0x1dcd6500>;
  1961. keep_count = <0x5>;
  1962. };
  1963.  
  1964. clk125_cfg {
  1965. clk_parent = "fclk_div4";
  1966. phandle = <0x8e>;
  1967. threshold = <0x1e 0x78>;
  1968. voltage = <0x47e>;
  1969. clk_reg = <0xa03>;
  1970. clk_freq = <0x7735940>;
  1971. clkp_freq = <0x1dcd6500>;
  1972. keep_count = <0x5>;
  1973. };
  1974. };
  1975.  
  1976. fd628_dev {
  1977. status = "okay";
  1978. fd628_gpio_dat = <0x12 0x40 0x0>;
  1979. fd628_gpio_clk = <0x12 0x41 0x0>;
  1980. compatible = "amlogic,fd628_dev";
  1981. };
  1982.  
  1983. vdec {
  1984. interrupt-names = "vsync", "demux", "parser", "mailbox_0", "mailbox_1", "mailbox_2";
  1985. dev_name = "vdec.0";
  1986. status = "okay";
  1987. interrupts = <0x0 0x3 0x1 0x0 0x17 0x1 0x0 0x20 0x1 0x0 0x2b 0x1 0x0 0x2c 0x1 0x0 0x2d 0x1>;
  1988. compatible = "amlogic, vdec";
  1989. };
  1990.  
  1991. deinterlace {
  1992. flag_cma = <0x1>;
  1993. interrupt-names = "pre_irq", "post_irq";
  1994. clock-names = "vpu_clkb_tmp_composite", "vpu_clkb_composite";
  1995. pps-enable = <0x1>;
  1996. clock-range = <0x14e 0x29b>;
  1997. memory-region = <0x67>;
  1998. status = "okay";
  1999. interrupts = <0x0 0x2e 0x1 0x0 0x28 0x1>;
  2000. post-wr-support = <0x1>;
  2001. nr10bit-support = <0x1>;
  2002. compatible = "amlogic, deinterlace";
  2003. clocks = <0x2 0x9b 0x2 0x9c>;
  2004. buffer-size = <0x3e2c40>;
  2005. nrds-enable = <0x1>;
  2006. };
  2007.  
  2008. ram-dump {
  2009. reg = <0xff6345e0 0x4>;
  2010. reg-names = "PREG_STICKY_REG8";
  2011. status = "okay";
  2012. compatible = "amlogic, ram_dump";
  2013. };
  2014.  
  2015. soc {
  2016. ranges;
  2017. #address-cells = <0x1>;
  2018. #size-cells = <0x1>;
  2019. compatible = "simple-bus";
  2020.  
  2021. periphs@ff634400 {
  2022. phandle = <0xde>;
  2023. reg = <0xff634400 0x400>;
  2024. ranges = <0x0 0xff634400 0x400>;
  2025. #address-cells = <0x1>;
  2026. #size-cells = <0x1>;
  2027. compatible = "simple-bus";
  2028. };
  2029.  
  2030. hiubus@ff63c000 {
  2031. phandle = <0xdf>;
  2032. reg = <0xff63c000 0x2000>;
  2033. ranges = <0x0 0xff63c000 0x2000>;
  2034. #address-cells = <0x1>;
  2035. #size-cells = <0x1>;
  2036. compatible = "simple-bus";
  2037.  
  2038. clock-controller@0 {
  2039. phandle = <0x2>;
  2040. reg = <0x0 0x3dc>;
  2041. #clock-cells = <0x1>;
  2042. compatible = "amlogic,sm1-clkc-1";
  2043. };
  2044.  
  2045. clock-controller@1 {
  2046. own-dsu-clk;
  2047. phandle = <0xe0>;
  2048. reg = <0x0 0x3dc>;
  2049. #clock-cells = <0x1>;
  2050. compatible = "amlogic,sm1-clkc-2";
  2051. };
  2052. };
  2053.  
  2054. audiobus@0xFF660000 {
  2055. phandle = <0xe1>;
  2056. reg = <0xff660000 0x4000>;
  2057. ranges = <0x0 0xff660000 0x4000>;
  2058. #address-cells = <0x1>;
  2059. #size-cells = <0x1>;
  2060. compatible = "amlogic, audio-controller", "simple-bus";
  2061.  
  2062. resample@0 {
  2063. resample_module = <0x4>;
  2064. phandle = <0xe4>;
  2065. clock-names = "resample_pll", "resample_src", "resample_clk";
  2066. status = "okay";
  2067. compatible = "amlogic, sm1-resample";
  2068. clocks = <0x2 0xf 0x1d 0x29 0x1d 0x2c>;
  2069. };
  2070.  
  2071. audio_clocks {
  2072. phandle = <0x1d>;
  2073. reg = <0x0 0xb0>;
  2074. #clock-cells = <0x1>;
  2075. compatible = "amlogic, sm1-audio-clocks";
  2076. };
  2077.  
  2078. tdm@0 {
  2079. pinctrl-names = "tdm_pins";
  2080. #sound-dai-cells = <0x0>;
  2081. pinctrl-0 = <0x1e 0x1f>;
  2082. phandle = <0x7c>;
  2083. clock-names = "mclk", "clk_srcpll";
  2084. dai-tdm-clk-sel = <0x0>;
  2085. dai-tdm-lane-slot-mask-in = <0x0 0x1>;
  2086. status = "okay";
  2087. compatible = "amlogic, sm1-snd-tdma";
  2088. clocks = <0x1d 0x24 0x2 0xc>;
  2089. dai-tdm-oe-lane-slot-mask-out = <0x1 0x0>;
  2090. };
  2091.  
  2092. spdif@1 {
  2093. #sound-dai-cells = <0x0>;
  2094. phandle = <0x82>;
  2095. clock-names = "sysclk", "gate_spdifout", "clk_spdifout";
  2096. status = "okay";
  2097. compatible = "amlogic, sm1-snd-spdif-b";
  2098. clocks = <0x2 0xc 0x1d 0x15 0x1d 0x31>;
  2099. };
  2100.  
  2101. pdm {
  2102. pinctrl-names = "pdm_pins";
  2103. #sound-dai-cells = <0x0>;
  2104. pinctrl-0 = <0x28>;
  2105. phandle = <0xe3>;
  2106. clock-names = "gate", "sysclk_srcpll", "dclk_srcpll", "pdm_dclk", "pdm_sysclk";
  2107. status = "okay";
  2108. filter_mode = <0x1>;
  2109. compatible = "amlogic, sm1-snd-pdm";
  2110. clocks = <0x1d 0x1 0x2 0x3 0x2 0xf 0x1d 0x2f 0x1d 0x30>;
  2111. };
  2112.  
  2113. tdm@1 {
  2114. pinctrl-names = "tdm_pins";
  2115. #sound-dai-cells = <0x0>;
  2116. dai-tdm-lane-slot-mask-out = <0x1 0x0 0x0 0x0>;
  2117. start_clk_enable = <0x1>;
  2118. pinctrl-0 = <0x20 0x21 0x22>;
  2119. phandle = <0x7e>;
  2120. clock-names = "mclk", "clk_srcpll", "samesource_srcpll", "samesource_clk";
  2121. dai-tdm-clk-sel = <0x1>;
  2122. dai-tdm-lane-slot-mask-in = <0x0 0x1 0x0 0x0>;
  2123. clk_tuning_enable = <0x1>;
  2124. status = "okay";
  2125. mclk_pad = <0x0>;
  2126. compatible = "amlogic, sm1-snd-tdmb";
  2127. clocks = <0x1d 0x25 0x2 0xd 0x2 0xc 0x1d 0x2b>;
  2128. samesource_sel = <0x3>;
  2129. };
  2130.  
  2131. tdm@2 {
  2132. pinctrl-names = "tdm_pins";
  2133. #sound-dai-cells = <0x0>;
  2134. pinctrl-0 = <0x23 0x24 0x25>;
  2135. phandle = <0x80>;
  2136. clock-names = "mclk", "clk_srcpll";
  2137. dai-tdm-clk-sel = <0x2>;
  2138. dai-tdm-lane-slot-mask-in = <0x1 0x0 0x0 0x0>;
  2139. #dai-tdm-lane-oe-slot-mask-in = <0x0 0x0 0x0 0x0>;
  2140. #dai-tdm-lane-slot-mask-out = <0x1 0x0 0x1 0x1>;
  2141. #dai-tdm-lane-oe-slot-mask-out = <0x1 0x0 0x0 0x0>;
  2142. status = "okay";
  2143. mclk_pad = <0x0>;
  2144. compatible = "amlogic, sm1-snd-tdmc";
  2145. clocks = <0x1d 0x26 0x2 0xe>;
  2146. };
  2147.  
  2148. spdif@0 {
  2149. pinctrl-names = "spdif_pins";
  2150. #sound-dai-cells = <0x0>;
  2151. interrupt-names = "irq_spdifin";
  2152. pinctrl-0 = <0x26 0x27>;
  2153. phandle = <0x81>;
  2154. clock-names = "sysclk", "fixed_clk", "gate_spdifin", "gate_spdifout", "clk_spdifin", "clk_spdifout";
  2155. clk_tuning_enable = <0x1>;
  2156. status = "okay";
  2157. interrupts = <0x0 0x97 0x1>;
  2158. compatible = "amlogic, sm1-snd-spdif-a";
  2159. clocks = <0x2 0xc 0x2 0x4 0x1d 0x10 0x1d 0x11 0x1d 0x2a 0x1d 0x2b>;
  2160. };
  2161.  
  2162. vad {
  2163. #sound-dai-cells = <0x0>;
  2164. interrupt-names = "irq_wakeup", "irq_frame_sync";
  2165. src = <0x4>;
  2166. phandle = <0xe5>;
  2167. clock-names = "gate", "pll", "clk";
  2168. status = "okay";
  2169. interrupts = <0x0 0x9b 0x1 0x0 0x30 0x1>;
  2170. level = <0x1>;
  2171. compatible = "amlogic, snd-vad";
  2172. clocks = <0x1d 0x1b 0x2 0x5 0x1d 0x35>;
  2173. };
  2174.  
  2175. loopback@1 {
  2176. #sound-dai-cells = <0x0>;
  2177. datalb_chnum = <0x2>;
  2178. datain_src = <0x4>;
  2179. datain_chnum = <0x4>;
  2180. phandle = <0xe6>;
  2181. clock-names = "pdm_gate", "pdm_sysclk_srcpll", "pdm_dclk_srcpll", "pdm_dclk", "pdm_sysclk", "tdminlb_mpll", "tdminlb_mclk";
  2182. mclk-fs = <0x100>;
  2183. datain_chmask = <0xf>;
  2184. status = "disabled";
  2185. datain-lane-mask-in = <0x1 0x0 0x1 0x0>;
  2186. datalb_src = <0x1>;
  2187. compatible = "amlogic, sm1-loopbackb";
  2188. clocks = <0x1d 0x1 0x2 0x3 0x2 0xf 0x1d 0x2f 0x1d 0x30 0x2 0xc 0x1d 0x24>;
  2189. datalb_chmask = <0x3>;
  2190. datalb-lane-mask-in = <0x1 0x0 0x0 0x0>;
  2191. };
  2192.  
  2193. effect {
  2194. #sound-dai-cells = <0x0>;
  2195. phandle = <0xe7>;
  2196. clock-names = "gate", "srcpll", "eqdrc";
  2197. channel_mask = <0x3>;
  2198. status = "okay";
  2199. eqdrc_module = <0x1>;
  2200. lane_mask = <0x1>;
  2201. compatible = "amlogic, snd-effect-v3";
  2202. clocks = <0x1d 0x16 0x2 0x5 0x1d 0x34>;
  2203. };
  2204.  
  2205. loopback@0 {
  2206. #sound-dai-cells = <0x0>;
  2207. datalb_chnum = <0x2>;
  2208. datain_src = <0x4>;
  2209. datain_chnum = <0x2>;
  2210. phandle = <0x84>;
  2211. clock-names = "pdm_gate", "pdm_sysclk_srcpll", "pdm_dclk_srcpll", "pdm_dclk", "pdm_sysclk", "tdminlb_mpll", "tdminlb_mclk";
  2212. mclk-fs = <0x100>;
  2213. datain_chmask = <0x3>;
  2214. status = "okay";
  2215. datain-lane-mask-in = <0x1 0x0 0x0 0x0>;
  2216. datalb_src = <0x1>;
  2217. compatible = "amlogic, sm1-loopbacka";
  2218. clocks = <0x1d 0x1 0x2 0x3 0x2 0xf 0x1d 0x2f 0x1d 0x30 0x2 0xc 0x1d 0x24>;
  2219. datalb_chmask = <0x3>;
  2220. datalb-lane-mask-in = <0x1 0x0 0x0 0x0>;
  2221. };
  2222.  
  2223. earc {
  2224. #sound-dai-cells = <0x0>;
  2225. interrupt-names = "rx_cmdc", "rx_dmac";
  2226. phandle = <0x83>;
  2227. clock-names = "rx_gate", "rx_cmdc", "rx_dmac", "rx_cmdc_srcpll", "rx_dmac_srcpll";
  2228. status = "okay";
  2229. interrupts = <0x0 0x58 0x1 0x0 0x57 0x1>;
  2230. compatible = "amlogic, sm1-snd-earc";
  2231. clocks = <0x1d 0x23 0x1d 0x38 0x1d 0x39 0x2 0x5 0x2 0x3>;
  2232. };
  2233.  
  2234. ddr_manager {
  2235. interrupt-names = "toddr_a", "toddr_b", "toddr_c", "toddr_d", "frddr_a", "frddr_b", "frddr_c", "frddr_d";
  2236. interrupts = <0x0 0x94 0x1 0x0 0x95 0x1 0x0 0x96 0x1 0x0 0x31 0x1 0x0 0x98 0x1 0x0 0x99 0x1 0x0 0x9a 0x1 0x0 0x32 0x1>;
  2237. compatible = "amlogic, sm1-audio-ddr-manager";
  2238. };
  2239.  
  2240. tdm@3 {
  2241. #sound-dai-cells = <0x0>;
  2242. phandle = <0xe2>;
  2243. clock-names = "mclk", "clk_srcpll";
  2244. dai-tdm-clk-sel = <0x1>;
  2245. status = "disabled";
  2246. dai-tdm-lane-lb-slot-mask-in = <0x1 0x0 0x0 0x0>;
  2247. lb-src-sel = <0x1>;
  2248. compatible = "amlogic, sm1-snd-tdmlb";
  2249. clocks = <0x1d 0x25 0x2 0xd>;
  2250. };
  2251. };
  2252.  
  2253. aobus@ff800000 {
  2254. phandle = <0xd7>;
  2255. reg = <0xff800000 0xb000>;
  2256. ranges = <0x0 0xff800000 0xb000>;
  2257. #address-cells = <0x1>;
  2258. #size-cells = <0x1>;
  2259. compatible = "simple-bus";
  2260.  
  2261. clock-controller@0 {
  2262. phandle = <0xd8>;
  2263. reg = <0x0 0x3dc>;
  2264. #clock-cells = <0x1>;
  2265. compatible = "amlogic,sm1-aoclkc";
  2266. };
  2267.  
  2268. serial@4000 {
  2269. pinctrl-names = "default";
  2270. pinctrl-0 = <0x1b>;
  2271. phandle = <0xdd>;
  2272. clock-names = "clk_uart";
  2273. reg = <0x4000 0x18>;
  2274. fifosize = <0x40>;
  2275. status = "disabled";
  2276. interrupts = <0x0 0xc5 0x1>;
  2277. compatible = "amlogic, meson-uart";
  2278. clocks = <0x15>;
  2279. };
  2280.  
  2281. i2c_slave@6000 {
  2282. pinctrl-names = "default";
  2283. pinctrl-0 = <0x1a>;
  2284. phandle = <0xdb>;
  2285. reg = <0x6000 0x20>;
  2286. status = "disabled";
  2287. interrupts = <0x0 0xc2 0x1>;
  2288. compatible = "amlogic, meson-i2c-slave";
  2289. };
  2290.  
  2291. pwm@2000 {
  2292. phandle = <0x4c>;
  2293. clock-names = "clkin0", "clkin1", "clkin2", "clkin3";
  2294. reg = <0x2000 0x20>;
  2295. status = "okay";
  2296. #pwm-cells = <0x3>;
  2297. compatible = "amlogic,g12a-ao-pwm";
  2298. clocks = <0x15 0x15 0x15 0x15>;
  2299. };
  2300.  
  2301. serial@3000 {
  2302. pinctrl-names = "default";
  2303. xtal_tick_en = <0x2>;
  2304. phandle = <0xdc>;
  2305. clock-names = "clk_uart";
  2306. reg = <0x3000 0x18>;
  2307. fifosize = <0x40>;
  2308. status = "okay";
  2309. interrupts = <0x0 0xc1 0x1>;
  2310. support-sysrq = <0x0>;
  2311. compatible = "amlogic, meson-uart";
  2312. clocks = <0x15>;
  2313. };
  2314.  
  2315. i2c@5000 {
  2316. phandle = <0xda>;
  2317. clock-names = "clk_i2c";
  2318. reg = <0x5000 0x20>;
  2319. status = "disabled";
  2320. interrupts = <0x0 0xc3 0x1 0x0 0xc9 0x1>;
  2321. #address-cells = <0x1>;
  2322. #size-cells = <0x0>;
  2323. compatible = "amlogic,meson-g12a-i2c";
  2324. clocks = <0x2 0x2a>;
  2325. };
  2326.  
  2327. pwm@7000 {
  2328. phandle = <0xd9>;
  2329. clock-names = "clkin0", "clkin1", "clkin2", "clkin3";
  2330. reg = <0x7000 0x20>;
  2331. status = "disabled";
  2332. #pwm-cells = <0x3>;
  2333. compatible = "amlogic,g12a-ao-pwm";
  2334. clocks = <0x15 0x15 0x15 0x15>;
  2335. };
  2336.  
  2337. cpu_version {
  2338. reg = <0x220 0x4>;
  2339. };
  2340. };
  2341.  
  2342. ion_dev {
  2343. memory-region = <0x1c>;
  2344. compatible = "amlogic, ion_dev";
  2345. };
  2346.  
  2347. cbus@ffd00000 {
  2348. phandle = <0xcc>;
  2349. reg = <0xffd00000 0x26000>;
  2350. ranges = <0x0 0xffd00000 0x26000>;
  2351. #address-cells = <0x1>;
  2352. #size-cells = <0x1>;
  2353. compatible = "simple-bus";
  2354.  
  2355. i2c@1d000 {
  2356. phandle = <0xd2>;
  2357. clock-names = "clk_i2c";
  2358. reg = <0x1d000 0x20>;
  2359. status = "disabled";
  2360. interrupts = <0x0 0xd7 0x1 0x0 0x5e 0x1>;
  2361. #address-cells = <0x1>;
  2362. #size-cells = <0x0>;
  2363. compatible = "amlogic,meson-g12a-i2c";
  2364. clocks = <0x2 0x2a>;
  2365. };
  2366.  
  2367. spi@13000 {
  2368. phandle = <0xd5>;
  2369. clock-names = "core", "comp";
  2370. reg = <0x13000 0x44>;
  2371. status = "disabled";
  2372. interrupts = <0x0 0x51 0x4>;
  2373. #address-cells = <0x1>;
  2374. #size-cells = <0x0>;
  2375. compatible = "amlogic,meson-g12a-spicc";
  2376. clocks = <0x2 0x29 0x2 0xd1>;
  2377. };
  2378.  
  2379. i2c@1c000 {
  2380. pinctrl-names = "default";
  2381. clock-frequency = <0x186a0>;
  2382. pinctrl-0 = <0x19>;
  2383. phandle = <0xd3>;
  2384. clock-names = "clk_i2c";
  2385. reg = <0x1c000 0x20>;
  2386. status = "disabled";
  2387. interrupts = <0x0 0x27 0x1 0x0 0x5f 0x1>;
  2388. #address-cells = <0x1>;
  2389. #size-cells = <0x0>;
  2390. compatible = "amlogic,meson-g12a-i2c";
  2391. clocks = <0x2 0x2a>;
  2392.  
  2393. bl_extern_i2c {
  2394. reg = <0x2c>;
  2395. dev_name = "lp8556";
  2396. status = "disabled";
  2397. compatible = "bl_extern, i2c";
  2398. };
  2399.  
  2400. ad82584f_62@62 {
  2401. #sound-dai-cells = <0x0>;
  2402. reset_pin = <0x12 0x37 0x0>;
  2403. phandle = <0xd4>;
  2404. reg = <0x31>;
  2405. status = "disabled";
  2406. no_mclk;
  2407. compatible = "ESMT, ad82584f";
  2408. };
  2409. };
  2410.  
  2411. pwm@1a000 {
  2412. phandle = <0xcf>;
  2413. clock-names = "clkin0", "clkin1", "clkin2", "clkin3";
  2414. reg = <0x1a000 0x20>;
  2415. status = "disabled";
  2416. #pwm-cells = <0x3>;
  2417. compatible = "amlogic,g12a-ee-pwm";
  2418. clocks = <0x15 0x15 0x15 0x15>;
  2419. };
  2420.  
  2421. interrupt-controller@f080 {
  2422. amlogic,channel-interrupts = <0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47>;
  2423. phandle = <0xcd>;
  2424. reg = <0xf080 0x10>;
  2425. status = "okay";
  2426. interrupt-controller;
  2427. compatible = "amlogic,meson-gpio-intc", "amlogic,meson-sm1-gpio-intc";
  2428. #interrupt-cells = <0x2>;
  2429. };
  2430.  
  2431. pwm@19000 {
  2432. phandle = <0x62>;
  2433. clock-names = "clkin0", "clkin1", "clkin2", "clkin3";
  2434. reg = <0x19000 0x20>;
  2435. status = "okay";
  2436. #pwm-cells = <0x3>;
  2437. compatible = "amlogic,g12a-ee-pwm";
  2438. clocks = <0x15 0x15 0x15 0x15>;
  2439. };
  2440.  
  2441. spi@15000 {
  2442. phandle = <0xd6>;
  2443. clock-names = "core", "comp";
  2444. reg = <0x15000 0x44>;
  2445. status = "disabled";
  2446. interrupts = <0x0 0x5a 0x4>;
  2447. #address-cells = <0x1>;
  2448. #size-cells = <0x0>;
  2449. compatible = "amlogic,meson-g12a-spicc";
  2450. clocks = <0x2 0x2f 0x2 0xd5>;
  2451. };
  2452.  
  2453. pwm@1b000 {
  2454. phandle = <0xce>;
  2455. clock-names = "clkin0", "clkin1", "clkin2", "clkin3";
  2456. reg = <0x1b000 0x20>;
  2457. status = "disabled";
  2458. #pwm-cells = <0x3>;
  2459. compatible = "amlogic,g12a-ee-pwm";
  2460. clocks = <0x15 0x15 0x15 0x15>;
  2461. };
  2462.  
  2463. meson_clk_msr {
  2464. reg = <0x18004 0x4 0x1800c 0x4>;
  2465. ringctrl = <0xff6345fc>;
  2466. compatible = "amlogic, sm1-measure";
  2467. };
  2468.  
  2469. i2c@1e000 {
  2470. phandle = <0xd1>;
  2471. clock-names = "clk_i2c";
  2472. reg = <0x1e000 0x20>;
  2473. status = "disabled";
  2474. interrupts = <0x0 0xd6 0x1 0x0 0x5c 0x1>;
  2475. #address-cells = <0x1>;
  2476. #size-cells = <0x0>;
  2477. compatible = "amlogic,meson-g12a-i2c";
  2478. clocks = <0x2 0x2a>;
  2479. };
  2480.  
  2481. i2c@1f000 {
  2482. pinctrl-names = "default";
  2483. clock-frequency = <0x61a80>;
  2484. pinctrl-0 = <0x18>;
  2485. phandle = <0xd0>;
  2486. clock-names = "clk_i2c";
  2487. reg = <0x1f000 0x20>;
  2488. status = "disabled";
  2489. interrupts = <0x0 0x15 0x1 0x0 0x5b 0x1>;
  2490. #address-cells = <0x1>;
  2491. #size-cells = <0x0>;
  2492. compatible = "amlogic,meson-g12a-i2c";
  2493. clocks = <0x2 0x2a>;
  2494.  
  2495. gt9xx@5d {
  2496. reg = <0x5d>;
  2497. irq-gpio = <0x12 0x4 0x0>;
  2498. status = "disabled";
  2499. reset-gpio = <0x12 0xa 0x0>;
  2500. compatible = "goodix,gt9xx";
  2501. };
  2502.  
  2503. ftxx@38 {
  2504. reg = <0x38>;
  2505. irq-gpio = <0x12 0x4 0x0>;
  2506. status = "disabled";
  2507. x_max = <0x258>;
  2508. reset-gpio = <0x12 0xa 0x0>;
  2509. max-touch-number = <0xa>;
  2510. y_max = <0x400>;
  2511. compatible = "focaltech,fts";
  2512. };
  2513. };
  2514. };
  2515. };
  2516.  
  2517. usb2phy@ffe09000 {
  2518. pll-setting-1 = <0x9400414>;
  2519. pll-setting-3 = <0xac5f69e5>;
  2520. pll-setting-7 = <0xe0004>;
  2521. pll-setting-2 = <0x927e0000>;
  2522. phandle = <0x13>;
  2523. reg = <0xffe09000 0x80 0xffd01008 0x100 0xff636000 0x2000 0xff63a000 0x2000>;
  2524. pll-setting-4 = <0xfe18>;
  2525. pll-setting-5 = <0x8000fff>;
  2526. u2-ctrl-iso-shift = <0x11>;
  2527. status = "okay";
  2528. u2-hhi-mem-pd-mask = <0x3>;
  2529. u2-ctrl-sleep-shift = <0x11>;
  2530. version = <0x2>;
  2531. pll-setting-6 = <0x78000>;
  2532. u2-hhi-mem-pd-shift = <0x1e>;
  2533. pwr-ctl = <0x1>;
  2534. pll-setting-8 = <0xe000c>;
  2535. compatible = "amlogic, amlogic-new-usb2-v2";
  2536. portnum = <0x2>;
  2537. };
  2538.  
  2539. meson-amvideom {
  2540. interrupt-names = "vsync";
  2541. dev_name = "amvideom";
  2542. status = "okay";
  2543. interrupts = <0x0 0x3 0x1>;
  2544. compatible = "amlogic, amvideom";
  2545. };
  2546.  
  2547. mesonstream {
  2548. clock-names = "parser_top", "demux", "ahbarb0", "vdec", "clk_81", "clk_vdec_mux", "clk_hcodec_mux", "clk_hevc_mux", "clk_hevcb_mux";
  2549. dev_name = "mesonstream";
  2550. status = "okay";
  2551. compatible = "amlogic, codec, streambuf";
  2552. clocks = <0x2 0x40 0x2 0x39 0x2 0x43 0x2 0x22 0x2 0xb 0x2 0xa5 0x2 0xae 0x2 0xb7 0x2 0xc0>;
  2553. };
  2554.  
  2555. cpu_iomap {
  2556. ranges;
  2557. #address-cells = <0x1>;
  2558. #size-cells = <0x1>;
  2559. compatible = "amlogic, iomap";
  2560.  
  2561. io_cbus_base {
  2562. reg = <0xffd00000 0x26fff>;
  2563. };
  2564.  
  2565. io_vapb_base {
  2566. reg = <0xff900000 0x50000>;
  2567. };
  2568.  
  2569. io_hiu_base {
  2570. reg = <0xff63c000 0x2000>;
  2571. };
  2572.  
  2573. io_aobus_base {
  2574. reg = <0xff800000 0xb000>;
  2575. };
  2576.  
  2577. io_apb_base {
  2578. reg = <0xffe01000 0x7f000>;
  2579. };
  2580. };
  2581.  
  2582. aml_pm {
  2583. debug_reg = <0xff8000a8>;
  2584. exit_reg = <0xff80023c>;
  2585. status = "okay";
  2586. device_name = "aml_pm";
  2587. compatible = "amlogic, pm";
  2588. };
  2589.  
  2590. meson-cooldev@0 {
  2591. phandle = <0x106>;
  2592. status = "okay";
  2593. device_name = "mcooldev";
  2594. compatible = "amlogic, meson-cooldev";
  2595.  
  2596. cpufreq_cool0 {
  2597. #cooling-cells = <0x2>;
  2598. phandle = <0x87>;
  2599. };
  2600.  
  2601. cooling_devices {
  2602.  
  2603. cpufreq_cool_cluster0 {
  2604. cluster_id = <0x0>;
  2605. min_state = <0xf4240>;
  2606. device_type = "cpufreq";
  2607. dyn_coeff = <0x7d>;
  2608. node_name = "cpufreq_cool0";
  2609. };
  2610.  
  2611. cpucore_cool_cluster0 {
  2612. cluster_id = <0x0>;
  2613. min_state = <0x1>;
  2614. device_type = "cpucore";
  2615. dyn_coeff = <0x0>;
  2616. node_name = "cpucore_cool0";
  2617. };
  2618.  
  2619. gpufreq_cool {
  2620. gpu_pp = <0x2>;
  2621. cluster_id = <0x0>;
  2622. min_state = <0x190>;
  2623. device_type = "gpufreq";
  2624. dyn_coeff = <0xd7>;
  2625. node_name = "gpufreq_cool0";
  2626. };
  2627.  
  2628. gpucore_cool {
  2629. cluster_id = <0x0>;
  2630. min_state = <0x1>;
  2631. device_type = "gpucore";
  2632. dyn_coeff = <0x0>;
  2633. node_name = "gpucore_cool0";
  2634. };
  2635. };
  2636.  
  2637. gpufreq_cool0 {
  2638. #cooling-cells = <0x2>;
  2639. phandle = <0x89>;
  2640. };
  2641.  
  2642. gpucore_cool0 {
  2643. #cooling-cells = <0x2>;
  2644. phandle = <0x8a>;
  2645. };
  2646.  
  2647. cpucore_cool0 {
  2648. #cooling-cells = <0x2>;
  2649. phandle = <0x88>;
  2650. };
  2651. };
  2652.  
  2653. firmware {
  2654.  
  2655. android {
  2656. compatible = "android,firmware";
  2657.  
  2658. vbmeta {
  2659. parts = "vbmeta,boot,system,vendor";
  2660. by_name_prefix = "/dev/block";
  2661. compatible = "android,vbmeta";
  2662. };
  2663.  
  2664. fstab {
  2665. compatible = "android,fstab";
  2666.  
  2667. vendor {
  2668. type = "ext4";
  2669. mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
  2670. fsmgr_flags = "wait";
  2671. dev = "/dev/block/vendor";
  2672. compatible = "android,vendor";
  2673. };
  2674.  
  2675. product {
  2676. type = "ext4";
  2677. mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
  2678. fsmgr_flags = "wait";
  2679. dev = "/dev/block/product";
  2680. compatible = "android,product";
  2681. };
  2682.  
  2683. odm {
  2684. type = "ext4";
  2685. mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
  2686. fsmgr_flags = "wait";
  2687. dev = "/dev/block/odm";
  2688. compatible = "android,odm";
  2689. };
  2690. };
  2691. };
  2692. };
  2693.  
  2694. rdma {
  2695. interrupt-names = "rdma";
  2696. dev_name = "amlogic-rdma";
  2697. status = "okay";
  2698. interrupts = <0x0 0x59 0x1>;
  2699. compatible = "amlogic, meson, rdma";
  2700. };
  2701.  
  2702. rng {
  2703. reg = <0xff630218 0x4>;
  2704. quality = [03 e8];
  2705. status = "okay";
  2706. #address-cells = <0x1>;
  2707. #size-cells = <0x1>;
  2708. compatible = "amlogic,meson-rng";
  2709. };
  2710.  
  2711. dwc3@ff500000 {
  2712. cpu-type = "gxl";
  2713. usb-phy = <0x13 0x14>;
  2714. phandle = <0xc7>;
  2715. clock-names = "dwc_general";
  2716. reg = <0xff500000 0x100000>;
  2717. status = "okay";
  2718. interrupts = <0x0 0x1e 0x4>;
  2719. compatible = "synopsys, dwc3";
  2720. clocks = <0x2 0x41>;
  2721. clock-src = "usb3.0";
  2722. };
  2723.  
  2724. amdolby_vision {
  2725. tv_mode = <0x0>;
  2726. dev_name = "aml_amdolby_vision_driver";
  2727. status = "okay";
  2728. compatible = "amlogic, dolby_vision_sm1";
  2729. };
  2730.  
  2731. bt-dev {
  2732. gpio_reset = <0x12 0x53 0x0>;
  2733. dev_name = "bt-dev";
  2734. status = "okay";
  2735. gpio_hostwake = <0x12 0x55 0x0>;
  2736. compatible = "amlogic, bt-dev";
  2737. };
  2738.  
  2739. dummy {
  2740. #sound-dai-cells = <0x0>;
  2741. phandle = <0x7d>;
  2742. status = "okay";
  2743. compatible = "amlogic, aml_dummy_codec";
  2744. };
  2745.  
  2746. linux,picdec {
  2747. alignment = <0x0>;
  2748. reusable;
  2749. phandle = <0x65>;
  2750. size = <0x0>;
  2751. linux,contiguous-region;
  2752. compatible = "shared-dma-pool";
  2753. };
  2754.  
  2755. ethernet@ff3f0000 {
  2756. pinctrl-names = "external_eth_pins";
  2757. mc_val_external_phy = <0x1621>;
  2758. interrupt-names = "macirq";
  2759. pinctrl-0 = <0x11>;
  2760. internal_phy = <0x0>;
  2761. phandle = <0x94>;
  2762. rst_pin-gpios = <0x12 0x10 0x0>;
  2763. clock-names = "ethclk81";
  2764. reg = <0xff3f0000 0x10000 0xff634540 0x8 0xff64c000 0xa0>;
  2765. reg-names = "eth_base", "eth_cfg", "eth_pll";
  2766. mc_val_internal_phy = <0x1800>;
  2767. status = "okay";
  2768. interrupts = <0x0 0x8 0x1>;
  2769. pll_val = <0x9c0040a 0x927e0000 0xac5f49e5>;
  2770. mc_val = <0x1621>;
  2771. compatible = "amlogic, g12a-eth-dwmac", "snps,dwmac";
  2772. analog_val = <0x20200000 0xc000 0x23>;
  2773. clocks = <0x2 0x38>;
  2774. };
  2775.  
  2776. pinctrl@ff634480 {
  2777. phandle = <0xa4>;
  2778. ranges;
  2779. #address-cells = <0x1>;
  2780. #size-cells = <0x1>;
  2781. compatible = "amlogic,meson-g12a-periphs-pinctrl";
  2782.  
  2783. i2c0_pins3 {
  2784. phandle = <0xac>;
  2785.  
  2786. mux {
  2787. groups = "i2c0_sda_z7", "i2c0_sck_z8";
  2788. function = "i2c0";
  2789. drive-strength = <0x2>;
  2790. };
  2791. };
  2792.  
  2793. sdio_clk_cmd_pins {
  2794. phandle = <0x46>;
  2795.  
  2796. mux {
  2797. groups = "sdio_clk", "sdio_cmd";
  2798. input-enable;
  2799. bias-pull-up;
  2800. function = "sdio";
  2801. drive-strength = <0x3>;
  2802. };
  2803. };
  2804.  
  2805. spicc0_pins_x {
  2806. phandle = <0xbd>;
  2807.  
  2808. mux {
  2809. groups = "spi0_mosi_x", "spi0_miso_x", "spi0_clk_x";
  2810. function = "spi0";
  2811. drive-strength = <0x1>;
  2812. };
  2813. };
  2814.  
  2815. i2c0_pins1 {
  2816. phandle = <0xab>;
  2817.  
  2818. mux {
  2819. groups = "i2c0_sda_c", "i2c0_sck_c";
  2820. function = "i2c0";
  2821. drive-strength = <0x2>;
  2822. };
  2823. };
  2824.  
  2825. tdmout_b {
  2826. phandle = <0x21>;
  2827.  
  2828. mux {
  2829. groups = "tdmb_sclk", "tdmb_fs", "tdmb_dout0";
  2830. function = "tdmb_out";
  2831. drive-strength = <0x2>;
  2832. };
  2833. };
  2834.  
  2835. pwm_e {
  2836. phandle = <0x60>;
  2837.  
  2838. mux {
  2839. groups = "pwm_e";
  2840. function = "pwm_e";
  2841. };
  2842. };
  2843.  
  2844. i2c3_pins2 {
  2845. phandle = <0x19>;
  2846.  
  2847. mux {
  2848. groups = "i2c3_sda_a", "i2c3_sck_a";
  2849. function = "i2c3";
  2850. drive-strength = <0x2>;
  2851. };
  2852. };
  2853.  
  2854. b_uart {
  2855. phandle = <0x30>;
  2856.  
  2857. mux {
  2858. groups = "uart_tx_b", "uart_rx_b";
  2859. function = "uart_b";
  2860. };
  2861. };
  2862.  
  2863. i2c1_pins3 {
  2864. phandle = <0xaf>;
  2865.  
  2866. mux {
  2867. groups = "i2c1_sda_h6", "i2c1_sck_h7";
  2868. function = "i2c1";
  2869. drive-strength = <0x2>;
  2870. };
  2871. };
  2872.  
  2873. cam_dvp_pins {
  2874. phandle = <0xc5>;
  2875.  
  2876. mux {
  2877. groups = "bt656_a_vs", "bt656_a_hs", "bt656_a_clk", "bt656_a_din0", "bt656_a_din1", "bt656_a_din2", "bt656_a_din3", "bt656_a_din4", "bt656_a_din5", "bt656_a_din6", "bt656_a_din7";
  2878. function = "bt656";
  2879. };
  2880. };
  2881.  
  2882. pwm_f_pins2 {
  2883. phandle = <0xbc>;
  2884.  
  2885. mux {
  2886. groups = "pwm_f_h";
  2887. function = "pwm_f";
  2888. };
  2889. };
  2890.  
  2891. i2c2_pins3 {
  2892. phandle = <0xb2>;
  2893.  
  2894. mux {
  2895. groups = "i2c2_sda_z10", "i2c2_sck_z11";
  2896. function = "i2c2";
  2897. drive-strength = <0x2>;
  2898. };
  2899. };
  2900.  
  2901. sdio_x_clk_cmd_pins {
  2902. phandle = <0xa7>;
  2903.  
  2904. mux {
  2905. groups = "GPIOX_5";
  2906. input-enable;
  2907. bias-pull-up;
  2908. function = "gpio_periphs";
  2909. drive-strength = <0x3>;
  2910. };
  2911.  
  2912. mux1 {
  2913. output-high;
  2914. groups = "GPIOX_4";
  2915. bias-pull-up;
  2916. function = "gpio_periphs";
  2917. drive-strength = <0x3>;
  2918. };
  2919. };
  2920.  
  2921. internal_gpio_pins {
  2922. phandle = <0xc1>;
  2923.  
  2924. mux {
  2925. groups = "GPIOZ_14", "GPIOZ_15";
  2926. input-enable;
  2927. bias-disable;
  2928. function = "gpio_periphs";
  2929. };
  2930. };
  2931.  
  2932. tdmb_mclk {
  2933. phandle = <0x20>;
  2934.  
  2935. mux {
  2936. groups = "mclk0_a";
  2937. function = "mclk0";
  2938. drive-strength = <0x2>;
  2939. };
  2940. };
  2941.  
  2942. i2c1_pins2 {
  2943. phandle = <0xae>;
  2944.  
  2945. mux {
  2946. groups = "i2c1_sda_h2", "i2c1_sck_h3";
  2947. function = "i2c1";
  2948. drive-strength = <0x2>;
  2949. };
  2950. };
  2951.  
  2952. gen_clk_ee_z {
  2953. phandle = <0xc4>;
  2954.  
  2955. mux {
  2956. groups = "gen_clk_ee_z";
  2957. function = "gen_clk_ee";
  2958. drive-strength = <0x3>;
  2959. };
  2960. };
  2961.  
  2962. ee_ceca {
  2963. phandle = <0x37>;
  2964.  
  2965. mux {
  2966. groups = "cec_ao_a_ee";
  2967. function = "cec_ao_ee";
  2968. };
  2969. };
  2970.  
  2971. tdmc_mclk {
  2972. phandle = <0x23>;
  2973.  
  2974. mux {
  2975. groups = "mclk1_a";
  2976. function = "mclk1";
  2977. };
  2978. };
  2979.  
  2980. hdmitx_hpd {
  2981. phandle = <0x33>;
  2982.  
  2983. mux {
  2984. groups = "hdmitx_hpd_in";
  2985. bias-disable;
  2986. function = "hdmitx";
  2987. };
  2988. };
  2989.  
  2990. all_nand_pins {
  2991. phandle = <0x47>;
  2992.  
  2993. mux {
  2994. groups = "emmc_nand_d0", "emmc_nand_d1", "emmc_nand_d2", "emmc_nand_d3", "emmc_nand_d4", "emmc_nand_d5", "emmc_nand_d6", "emmc_nand_d7", "nand_ce0", "nand_ale", "nand_cle", "nand_wen_clk", "nand_ren_wr", "nand_rb0";
  2995. input-enable;
  2996. function = "nand";
  2997. };
  2998. };
  2999.  
  3000. pwm_d_pins2 {
  3001. phandle = <0xba>;
  3002.  
  3003. mux {
  3004. groups = "pwm_d_x6";
  3005. function = "pwm_d";
  3006. };
  3007. };
  3008.  
  3009. spdifin {
  3010. phandle = <0x27>;
  3011.  
  3012. mux {
  3013. groups = "spdif_in_h";
  3014. function = "spdif_in";
  3015. };
  3016. };
  3017.  
  3018. i2c3_pins1 {
  3019. phandle = <0x36>;
  3020.  
  3021. mux {
  3022. groups = "i2c3_sda_h", "i2c3_sck_h";
  3023. function = "i2c3";
  3024. drive-strength = <0x2>;
  3025. };
  3026. };
  3027.  
  3028. i2c1_pins1 {
  3029. phandle = <0xad>;
  3030.  
  3031. mux {
  3032. groups = "i2c1_sda_x", "i2c1_sck_x";
  3033. function = "i2c1";
  3034. drive-strength = <0x2>;
  3035. };
  3036. };
  3037.  
  3038. jtag_apee_pin {
  3039. phandle = <0x17>;
  3040.  
  3041. mux {
  3042. groups = "jtag_b_tdi", "jtag_b_tdo", "jtag_b_clk", "jtag_b_tms";
  3043. function = "jtag_b";
  3044. };
  3045. };
  3046.  
  3047. pwm_a {
  3048. phandle = <0xb3>;
  3049.  
  3050. mux {
  3051. groups = "pwm_a";
  3052. function = "pwm_a";
  3053. };
  3054. };
  3055.  
  3056. tdmout_a {
  3057. phandle = <0x1e>;
  3058.  
  3059. mux {
  3060. groups = "tdma_sclk", "tdma_fs", "tdma_dout0";
  3061. function = "tdma_out";
  3062. };
  3063. };
  3064.  
  3065. pwm_b_pins1 {
  3066. phandle = <0xb4>;
  3067.  
  3068. mux {
  3069. groups = "pwm_b_x7";
  3070. function = "pwm_b";
  3071. };
  3072. };
  3073.  
  3074. tdmin_c {
  3075. phandle = <0x25>;
  3076.  
  3077. mux {
  3078. groups = "tdmc_din0_a";
  3079. function = "tdmc_in";
  3080. };
  3081. };
  3082.  
  3083. sd_all_pins {
  3084. phandle = <0x3f>;
  3085.  
  3086. mux {
  3087. groups = "sdcard_d0_c", "sdcard_d1_c", "sdcard_d2_c", "sdcard_d3_c", "sdcard_cmd_c";
  3088. input-enable;
  3089. bias-pull-up;
  3090. function = "sdcard";
  3091. drive-strength = <0x3>;
  3092. };
  3093.  
  3094. mux1 {
  3095. output-high;
  3096. groups = "sdcard_clk_c";
  3097. bias-pull-up;
  3098. function = "sdcard";
  3099. drive-strength = <0x3>;
  3100. };
  3101. };
  3102.  
  3103. pwm_c_pins1 {
  3104. phandle = <0xb6>;
  3105.  
  3106. mux {
  3107. groups = "pwm_c_c4";
  3108. function = "pwm_c";
  3109. };
  3110. };
  3111.  
  3112. sd_clr_noall_pins {
  3113. phandle = <0xa6>;
  3114.  
  3115. mux {
  3116. output-high;
  3117. groups = "GPIOC_0", "GPIOC_1", "GPIOC_4", "GPIOC_5";
  3118. function = "gpio_periphs";
  3119. };
  3120. };
  3121.  
  3122. sdio_x_clr_pins {
  3123. phandle = <0xaa>;
  3124.  
  3125. mux {
  3126. groups = "GPIOV_0";
  3127. output-low;
  3128. bias-pull-up;
  3129. function = "gpio_periphs";
  3130. };
  3131.  
  3132. mux1 {
  3133. groups = "GPIOX_4";
  3134. output-low;
  3135. function = "gpio_periphs";
  3136. };
  3137. };
  3138.  
  3139. sdio_all_pins {
  3140. phandle = <0x45>;
  3141.  
  3142. mux {
  3143. groups = "sdio_d0", "sdio_d1", "sdio_d2", "sdio_d3", "sdio_clk", "sdio_cmd";
  3144. input-enable;
  3145. bias-pull-up;
  3146. function = "sdio";
  3147. drive-strength = <0x3>;
  3148. };
  3149. };
  3150.  
  3151. tdmout_c {
  3152. phandle = <0x24>;
  3153.  
  3154. mux {
  3155. groups = "tdmc_sclk_a", "tdmc_fs_a", "tdmc_dout0_a";
  3156. function = "tdmc_out";
  3157. };
  3158. };
  3159.  
  3160. pdmin {
  3161. phandle = <0x28>;
  3162.  
  3163. mux {
  3164. groups = "pdm_din0_z", "pdm_din1_z", "pdm_din2_z", "pdm_din3_z", "pdm_dclk_z";
  3165. function = "pdm";
  3166. };
  3167. };
  3168.  
  3169. emmc_conf_pull_done {
  3170. phandle = <0x3e>;
  3171.  
  3172. mux {
  3173. groups = "emmc_nand_ds";
  3174. input-enable;
  3175. bias-pull-down;
  3176. function = "emmc";
  3177. drive-strength = <0x3>;
  3178. };
  3179. };
  3180.  
  3181. pwm_d_pins1 {
  3182. phandle = <0xb9>;
  3183.  
  3184. mux {
  3185. groups = "pwm_d_x3";
  3186. function = "pwm_d";
  3187. };
  3188. };
  3189.  
  3190. a_uart {
  3191. phandle = <0x2f>;
  3192.  
  3193. mux {
  3194. groups = "uart_tx_a", "uart_rx_a", "uart_cts_a", "uart_rts_a";
  3195. function = "uart_a";
  3196. };
  3197. };
  3198.  
  3199. pwm_f_pins1 {
  3200. phandle = <0xbb>;
  3201.  
  3202. mux {
  3203. groups = "pwm_f_x";
  3204. function = "pwm_f";
  3205. };
  3206. };
  3207.  
  3208. ao_to_sd_uart_pins {
  3209. phandle = <0x43>;
  3210.  
  3211. mux {
  3212. groups = "uart_ao_tx_a_c3", "uart_ao_rx_a_c2";
  3213. input-enable;
  3214. bias-pull-up;
  3215. function = "uart_ao_a_ee";
  3216. };
  3217. };
  3218.  
  3219. tdmin_a {
  3220. phandle = <0x1f>;
  3221.  
  3222. mux {
  3223. groups = "tdma_din1";
  3224. function = "tdma_in";
  3225. };
  3226. };
  3227.  
  3228. hdmitx_hpd_gpio {
  3229. phandle = <0x35>;
  3230.  
  3231. mux {
  3232. groups = "GPIOH_1";
  3233. bias-disable;
  3234. function = "gpio_periphs";
  3235. };
  3236. };
  3237.  
  3238. clk12_24_z_pins {
  3239. phandle = <0xc3>;
  3240.  
  3241. mux {
  3242. groups = "clk12_24_z";
  3243. function = "clk12_24_ee";
  3244. drive-strength = <0x3>;
  3245. };
  3246. };
  3247.  
  3248. internal_eth_pins {
  3249. phandle = <0xc0>;
  3250.  
  3251. mux {
  3252. groups = "eth_link_led", "eth_act_led";
  3253. function = "eth";
  3254. };
  3255. };
  3256.  
  3257. external_eth_pins {
  3258. phandle = <0x11>;
  3259.  
  3260. mux {
  3261. groups = "eth_mdio", "eth_mdc", "eth_rgmii_rx_clk", "eth_rx_dv", "eth_rxd0", "eth_rxd1", "eth_rxd2_rgmii", "eth_rxd3_rgmii", "eth_rgmii_tx_clk", "eth_txen", "eth_txd0", "eth_txd1", "eth_txd2_rgmii", "eth_txd3_rgmii";
  3262. function = "eth";
  3263. drive-strength = <0x3>;
  3264. };
  3265. };
  3266.  
  3267. i2c0_pins2 {
  3268. phandle = <0x18>;
  3269.  
  3270. mux {
  3271. groups = "i2c0_sda_z0", "i2c0_sck_z1";
  3272. function = "i2c0";
  3273. drive-strength = <0x2>;
  3274. };
  3275. };
  3276.  
  3277. sd_clk_cmd_pins {
  3278. phandle = <0x40>;
  3279.  
  3280. mux {
  3281. groups = "sdcard_cmd_c";
  3282. input-enable;
  3283. bias-pull-up;
  3284. function = "sdcard";
  3285. drive-strength = <0x3>;
  3286. };
  3287.  
  3288. mux1 {
  3289. output-high;
  3290. groups = "sdcard_clk_c";
  3291. bias-pull-up;
  3292. function = "sdcard";
  3293. drive-strength = <0x3>;
  3294. };
  3295. };
  3296.  
  3297. sdio_x_en_pins {
  3298. phandle = <0xa9>;
  3299.  
  3300. mux {
  3301. output-high;
  3302. groups = "sdio_dummy";
  3303. bias-pull-up;
  3304. function = "sdio";
  3305. };
  3306. };
  3307.  
  3308. i2c2_pins1 {
  3309. phandle = <0xb0>;
  3310.  
  3311. mux {
  3312. groups = "i2c2_sda_x", "i2c2_sck_x";
  3313. function = "i2c2";
  3314. drive-strength = <0x2>;
  3315. };
  3316. };
  3317.  
  3318. banks@ff6346c0 {
  3319. #gpio-cells = <0x2>;
  3320. phandle = <0x12>;
  3321. reg = <0xff6346c0 0x40 0xff6344e8 0x18 0xff634520 0x18 0xff634440 0x4c 0xff634740 0x1c>;
  3322. reg-names = "mux", "pull", "pull-enable", "gpio", "drive-strength";
  3323. gpio-controller;
  3324. };
  3325.  
  3326. sd_1bit_pins {
  3327. phandle = <0x41>;
  3328.  
  3329. mux {
  3330. groups = "sdcard_d0_c", "sdcard_cmd_c";
  3331. input-enable;
  3332. bias-pull-up;
  3333. function = "sdcard";
  3334. drive-strength = <0x3>;
  3335. };
  3336.  
  3337. mux1 {
  3338. output-high;
  3339. groups = "sdcard_clk_c";
  3340. bias-pull-up;
  3341. function = "sdcard";
  3342. drive-strength = <0x3>;
  3343. };
  3344. };
  3345.  
  3346. ee_cecb {
  3347. phandle = <0x38>;
  3348.  
  3349. mux {
  3350. groups = "cec_ao_b_ee";
  3351. function = "cec_ao_ee";
  3352. };
  3353. };
  3354.  
  3355. emmc_conf_pull_up {
  3356. phandle = <0x3d>;
  3357.  
  3358. mux {
  3359. groups = "emmc_nand_d7", "emmc_nand_d6", "emmc_nand_d5", "emmc_nand_d4", "emmc_nand_d3", "emmc_nand_d2", "emmc_nand_d1", "emmc_nand_d0", "emmc_clk", "emmc_cmd";
  3360. input-enable;
  3361. bias-pull-up;
  3362. function = "emmc";
  3363. drive-strength = <0x3>;
  3364. };
  3365. };
  3366.  
  3367. c_uart {
  3368. phandle = <0x31>;
  3369.  
  3370. mux {
  3371. groups = "uart_tx_c", "uart_rx_c";
  3372. function = "uart_c";
  3373. };
  3374. };
  3375.  
  3376. hdmitx_ddc {
  3377. phandle = <0x34>;
  3378.  
  3379. mux {
  3380. groups = "hdmitx_sda", "hdmitx_sck";
  3381. bias-disable;
  3382. function = "hdmitx";
  3383. drive-strength = <0x3>;
  3384. };
  3385. };
  3386.  
  3387. tdmin_b {
  3388. phandle = <0x22>;
  3389.  
  3390. mux {
  3391. groups = "tdmb_din1";
  3392. function = "tdmb_in";
  3393. drive-strength = <0x2>;
  3394. };
  3395. };
  3396.  
  3397. i2c2_pins2 {
  3398. phandle = <0xb1>;
  3399.  
  3400. mux {
  3401. groups = "i2c2_sda_z", "i2c2_sck_z";
  3402. function = "i2c2";
  3403. drive-strength = <0x2>;
  3404. };
  3405. };
  3406.  
  3407. pwm_c_pins3 {
  3408. phandle = <0xb8>;
  3409.  
  3410. mux {
  3411. groups = "pwm_c_x8";
  3412. function = "pwm_c";
  3413. };
  3414. };
  3415.  
  3416. sdio_x_all_pins {
  3417. phandle = <0xa8>;
  3418.  
  3419. mux {
  3420. groups = "GPIOX_0", "GPIOX_1", "GPIOX_2", "GPIOX_3", "GPIOX_5";
  3421. input-enable;
  3422. bias-pull-up;
  3423. function = "gpio_periphs";
  3424. drive-strength = <0x3>;
  3425. };
  3426.  
  3427. mux1 {
  3428. output-high;
  3429. groups = "GPIOX_4";
  3430. bias-pull-up;
  3431. function = "gpio_periphs";
  3432. drive-strength = <0x3>;
  3433. };
  3434. };
  3435.  
  3436. bl_pwm_off_pin {
  3437. phandle = <0xc2>;
  3438.  
  3439. mux {
  3440. output-high;
  3441. function = "gpio_periphs";
  3442. pins = "GPIOH_5";
  3443. };
  3444. };
  3445.  
  3446. nand_cs {
  3447. phandle = <0x48>;
  3448.  
  3449. mux {
  3450. groups = "nand_ce0";
  3451. function = "nand";
  3452. };
  3453. };
  3454.  
  3455. spicc1_pins {
  3456. phandle = <0xbf>;
  3457.  
  3458. mux {
  3459. groups = "spi1_mosi", "spi1_miso", "spi1_clk";
  3460. function = "spi1";
  3461. drive-strength = <0x1>;
  3462. };
  3463. };
  3464.  
  3465. pwm_c_pins2 {
  3466. phandle = <0xb7>;
  3467.  
  3468. mux {
  3469. groups = "pwm_c_x5";
  3470. function = "pwm_c";
  3471. };
  3472. };
  3473.  
  3474. spicc0_pins_c {
  3475. phandle = <0xbe>;
  3476.  
  3477. mux {
  3478. groups = "spi0_mosi_c", "spi0_miso_c", "spi0_ss0_c", "spi0_clk_c";
  3479. function = "spi0";
  3480. drive-strength = <0x1>;
  3481. };
  3482. };
  3483.  
  3484. spdifout {
  3485. phandle = <0x26>;
  3486.  
  3487. mux {
  3488. groups = "spdif_out_h";
  3489. function = "spdif_out";
  3490. };
  3491. };
  3492.  
  3493. sd_clr_all_pins {
  3494. phandle = <0xa5>;
  3495.  
  3496. mux {
  3497. output-high;
  3498. groups = "GPIOC_0", "GPIOC_1", "GPIOC_2", "GPIOC_3", "GPIOC_5";
  3499. function = "gpio_periphs";
  3500. };
  3501.  
  3502. mux1 {
  3503. groups = "GPIOC_4";
  3504. output-low;
  3505. function = "gpio_periphs";
  3506. };
  3507. };
  3508.  
  3509. pwm_b_pins2 {
  3510. phandle = <0xb5>;
  3511.  
  3512. mux {
  3513. groups = "pwm_b_x19";
  3514. function = "pwm_b";
  3515. };
  3516. };
  3517.  
  3518. emmc_clk_cmd_pins {
  3519. phandle = <0x3c>;
  3520.  
  3521. mux {
  3522. groups = "emmc_clk", "emmc_cmd";
  3523. input-enable;
  3524. bias-pull-up;
  3525. function = "emmc";
  3526. drive-strength = <0x3>;
  3527. };
  3528. };
  3529. };
  3530.  
  3531. sd@ffe05000 {
  3532. pinctrl-names = "sd_all_pins", "sd_clk_cmd_pins", "sd_1bit_pins", "sd_clk_cmd_uart_pins", "sd_1bit_uart_pins", "sd_to_ao_uart_pins", "ao_to_sd_uart_pins", "sd_to_ao_jtag_pins", "ao_to_sd_jtag_pins";
  3533. pinctrl-6 = <0x42 0x43>;
  3534. cap-mmc-highspeed;
  3535. pinctrl-3 = <0x42 0x40 0x43>;
  3536. disable-wp;
  3537. pinctrl-0 = <0x3f>;
  3538. phandle = <0xf6>;
  3539. clock-names = "core", "clkin0", "clkin1", "clkin2", "xtal";
  3540. reg = <0xffe05000 0x800>;
  3541. pinctrl-2 = <0x41>;
  3542. bus-width = <0x4>;
  3543. pinctrl-1 = <0x40>;
  3544. max-frequency = <0x5f5e100>;
  3545. status = "okay";
  3546. interrupts = <0x0 0xbe 0x1>;
  3547. pinctrl-8 = <0x42 0x43>;
  3548. cap-sd-highspeed;
  3549. pinctrl-4 = <0x42 0x41 0x43>;
  3550. compatible = "amlogic, meson-mmc-sm1";
  3551. pinctrl-7 = <0x3f 0x44>;
  3552. pinctrl-5 = <0x3f 0x44>;
  3553. clocks = <0x2 0x34 0x2 0x6e 0x2 0x2 0x2 0x5 0x15>;
  3554.  
  3555. sd {
  3556. f_min = <0x61a80>;
  3557. card_type = <0x5>;
  3558. f_max = <0x2faf080>;
  3559. jtag_pin = <0x12 0x2a 0x0>;
  3560. max_req_size = <0x20000>;
  3561. gpio_cd = <0x12 0x30 0x0>;
  3562. ocr_avail = <0x200080>;
  3563. pinname = "sd";
  3564. gpio_dat3 = <0x12 0x2d 0x0>;
  3565. caps = "MMC_CAP_4_BIT_DATA", "MMC_CAP_MMC_HIGHSPEED", "MMC_CAP_SD_HIGHSPEED";
  3566. };
  3567. };
  3568.  
  3569. amhdmitx {
  3570. pinctrl-names = "default", "hdmitx_i2c";
  3571. interrupt-names = "hdmitx_hpd";
  3572. pinctrl-0 = <0x33 0x34>;
  3573. phandle = <0xed>;
  3574. clock-names = "venci_top_gate", "venci_0_gate", "venci_1_gate", "hdmi_vapb_clk", "hdmi_vpu_clk";
  3575. pinctrl-1 = <0x35 0x36>;
  3576. dev_name = "amhdmitx";
  3577. status = "okay";
  3578. interrupts = <0x0 0x39 0x1>;
  3579. ic_type = <0xc>;
  3580. vend-data = <0x32>;
  3581. compatible = "amlogic, amhdmitx";
  3582. clocks = <0x2 0x55 0x2 0x4e 0x2 0x4f 0x2 0x95 0x2 0x8c>;
  3583.  
  3584. vend_data {
  3585. product_desc = "MBox Meson Ref";
  3586. phandle = <0x32>;
  3587. vendor_id = <0x0>;
  3588. vendor_name = "Amlogic";
  3589. };
  3590. };
  3591.  
  3592. reserved-memory {
  3593. ranges;
  3594. #address-cells = <0x1>;
  3595. #size-cells = <0x1>;
  3596.  
  3597. linux,secmon {
  3598. alignment = <0x400000>;
  3599. reusable;
  3600. phandle = <0xf>;
  3601. size = <0x400000>;
  3602. alloc-ranges = <0x5000000 0x400000>;
  3603. compatible = "shared-dma-pool";
  3604. };
  3605.  
  3606. linux,meson-fb {
  3607. alignment = <0x400000>;
  3608. reusable;
  3609. phandle = <0x3a>;
  3610. size = <0x800000>;
  3611. alloc-ranges = <0x7f800000 0x800000>;
  3612. compatible = "shared-dma-pool";
  3613. };
  3614.  
  3615. linux,vdin1_cma {
  3616. alignment = <0x400000>;
  3617. reusable;
  3618. phandle = <0x39>;
  3619. size = <0x4000000>;
  3620. compatible = "shared-dma-pool";
  3621. };
  3622.  
  3623. linux,ion-dev {
  3624. alignment = <0x400000>;
  3625. reusable;
  3626. phandle = <0x1c>;
  3627. size = <0x8000000>;
  3628. alloc-ranges = <0x30000000 0x50000000>;
  3629. compatible = "shared-dma-pool";
  3630. };
  3631.  
  3632. linux,di_cma {
  3633. alignment = <0x400000>;
  3634. reusable;
  3635. phandle = <0x67>;
  3636. size = <0x2800000>;
  3637. compatible = "shared-dma-pool";
  3638. };
  3639.  
  3640. linux,ppmgr {
  3641. phandle = <0x66>;
  3642. size = <0x0>;
  3643. compatible = "shared-dma-pool";
  3644. };
  3645.  
  3646. linux,codec_mm_cma {
  3647. alignment = <0x400000>;
  3648. reusable;
  3649. phandle = <0x63>;
  3650. size = <0x13400000>;
  3651. linux,contiguous-region;
  3652. alloc-ranges = <0x30000000 0x50000000>;
  3653. compatible = "shared-dma-pool";
  3654. };
  3655.  
  3656. linux,secos {
  3657. phandle = <0xfc>;
  3658. reg = <0x5300000 0x2000000>;
  3659. status = "disable";
  3660. no-map;
  3661. compatible = "amlogic, aml_secos_memory";
  3662. };
  3663.  
  3664. linux,codec_mm_reserved {
  3665. alignment = <0x100000>;
  3666. phandle = <0x64>;
  3667. size = <0x0>;
  3668. compatible = "amlogic, codec-mm-reserved";
  3669. };
  3670.  
  3671. ramoops@0x07400000 {
  3672. ftrace-size = <0x40000>;
  3673. reg = <0x7400000 0x100000>;
  3674. console-size = <0x8000>;
  3675. compatible = "ramoops";
  3676. record-size = <0x8000>;
  3677. };
  3678.  
  3679. linux,vm0_cma {
  3680. alignment = <0x400000>;
  3681. reusable;
  3682. phandle = <0xfd>;
  3683. size = <0x2000000>;
  3684. compatible = "shared-dma-pool";
  3685. };
  3686. };
  3687.  
  3688. ppmgr {
  3689. memory-region = <0x66>;
  3690. dev_name = "ppmgr";
  3691. status = "okay";
  3692. compatible = "amlogic, ppmgr";
  3693. };
  3694.  
  3695. psci {
  3696. method = "smc";
  3697. compatible = "arm,psci-0.2";
  3698. };
  3699.  
  3700. fb {
  3701. pxp_mode = <0x0>;
  3702. interrupt-names = "viu-vsync", "viu2-vsync", "rdma";
  3703. phandle = <0xf3>;
  3704. clock-names = "vpu_clkc";
  3705. mem_size = <0x800000 0x1980000 0x100000 0x100000 0x800000>;
  3706. memory-region = <0x3a>;
  3707. dev_name = "meson-fb";
  3708. status = "okay";
  3709. display_size_default = <0x780 0x438 0x780 0x870 0x20>;
  3710. interrupts = <0x0 0x3 0x1 0x0 0x38 0x1 0x0 0x59 0x1>;
  3711. display_mode_default = "1080p60hz";
  3712. mem_alloc = <0x0>;
  3713. logo_addr = "0x7f800000";
  3714. compatible = "amlogic, meson-sm1";
  3715. clocks = <0x2 0xc9>;
  3716. scale_mode = <0x1>;
  3717. };
  3718.  
  3719. cpu_opp_table0 {
  3720. opp-shared;
  3721. phandle = <0xd>;
  3722. compatible = "operating-points-v2";
  3723.  
  3724. opp04 {
  3725. opp-hz = <0x0 0x3b9aca00>;
  3726. opp-microvolt = <0xcd140>;
  3727. };
  3728.  
  3729. opp01 {
  3730. opp-hz = <0x0 0xee6b280>;
  3731. opp-microvolt = <0xc3500>;
  3732. };
  3733.  
  3734. opp09 {
  3735. opp-hz = <0x0 0x6590fa00>;
  3736. opp-microvolt = <0xe57e0>;
  3737. };
  3738.  
  3739. opp00 {
  3740. opp-hz = <0x0 0x5f5e100>;
  3741. opp-microvolt = <0xc3500>;
  3742. };
  3743.  
  3744. opp03 {
  3745. opp-hz = <0x0 0x27c19cc0>;
  3746. opp-microvolt = <0xc8320>;
  3747. };
  3748.  
  3749. opp11 {
  3750. opp-hz = <0x0 0x71b9c500>;
  3751. opp-microvolt = <0xf6950>;
  3752. };
  3753.  
  3754. opp06 {
  3755. opp-hz = <0x0 0x53af5700>;
  3756. opp-microvolt = <0xd6d80>;
  3757. };
  3758.  
  3759. opp02 {
  3760. opp-hz = <0x0 0x1dcd6500>;
  3761. opp-microvolt = <0xc3500>;
  3762. };
  3763.  
  3764. opp08 {
  3765. opp-hz = <0x0 0x5fd82200>;
  3766. opp-microvolt = <0xe09c0>;
  3767. };
  3768.  
  3769. opp07 {
  3770. opp-hz = <0x0 0x59682f00>;
  3771. opp-microvolt = <0xdbba0>;
  3772. };
  3773.  
  3774. opp05 {
  3775. opp-hz = <0x0 0x47868c00>;
  3776. opp-microvolt = <0xd1f60>;
  3777. };
  3778.  
  3779. opp10 {
  3780. opp-hz = <0x0 0x6b49d200>;
  3781. opp-microvolt = <0xecd10>;
  3782. };
  3783. };
  3784.  
  3785. xtal-clk {
  3786. clock-frequency = <0x16e3600>;
  3787. phandle = <0x15>;
  3788. clock-output-names = "xtal";
  3789. #clock-cells = <0x0>;
  3790. compatible = "fixed-clock";
  3791. };
  3792.  
  3793. partitions {
  3794. part-6 = <0x54>;
  3795. part-5 = <0x53>;
  3796. part-15 = <0x5d>;
  3797. part-7 = <0x55>;
  3798. parts = <0x11>;
  3799. part-11 = <0x59>;
  3800. part-3 = <0x51>;
  3801. part-10 = <0x58>;
  3802. phandle = <0xfb>;
  3803. part-2 = <0x50>;
  3804. part-14 = <0x5c>;
  3805. part-8 = <0x56>;
  3806. part-16 = <0x5e>;
  3807. part-1 = <0x4f>;
  3808. part-12 = <0x5a>;
  3809. part-0 = <0x4e>;
  3810. part-13 = <0x5b>;
  3811. part-9 = <0x57>;
  3812. part-4 = <0x52>;
  3813.  
  3814. rsv {
  3815. phandle = <0x55>;
  3816. size = <0x0 0x1000000>;
  3817. mask = <0x1>;
  3818. pname = "rsv";
  3819. };
  3820.  
  3821. misc {
  3822. phandle = <0x50>;
  3823. size = <0x0 0x800000>;
  3824. mask = <0x1>;
  3825. pname = "misc";
  3826. };
  3827.  
  3828. vendor {
  3829. phandle = <0x59>;
  3830. size = <0x0 0x14000000>;
  3831. mask = <0x1>;
  3832. pname = "vendor";
  3833. };
  3834.  
  3835. recovery {
  3836. phandle = <0x4f>;
  3837. size = <0x0 0x1800000>;
  3838. mask = <0x1>;
  3839. pname = "recovery";
  3840. };
  3841.  
  3842. tee {
  3843. phandle = <0x58>;
  3844. size = <0x0 0x2000000>;
  3845. mask = <0x1>;
  3846. pname = "tee";
  3847. };
  3848.  
  3849. dtbo {
  3850. phandle = <0x51>;
  3851. size = <0x0 0x800000>;
  3852. mask = <0x1>;
  3853. pname = "dtbo";
  3854. };
  3855.  
  3856. cache {
  3857. phandle = <0x5d>;
  3858. size = <0x0 0x46000000>;
  3859. mask = <0x2>;
  3860. pname = "cache";
  3861. };
  3862.  
  3863. boot {
  3864. phandle = <0x54>;
  3865. size = <0x0 0x1000000>;
  3866. mask = <0x1>;
  3867. pname = "boot";
  3868. };
  3869.  
  3870. product {
  3871. phandle = <0x5c>;
  3872. size = <0x0 0x8000000>;
  3873. mask = <0x1>;
  3874. pname = "product";
  3875. };
  3876.  
  3877. system {
  3878. phandle = <0x5b>;
  3879. size = <0x0 0x74000000>;
  3880. mask = <0x1>;
  3881. pname = "system";
  3882. };
  3883.  
  3884. metadata {
  3885. phandle = <0x56>;
  3886. size = <0x0 0x1000000>;
  3887. mask = <0x1>;
  3888. pname = "metadata";
  3889. };
  3890.  
  3891. data {
  3892. phandle = <0x5e>;
  3893. size = <0xffffffff 0xffffffff>;
  3894. mask = <0x4>;
  3895. pname = "data";
  3896. };
  3897.  
  3898. vbmeta {
  3899. phandle = <0x57>;
  3900. size = <0x0 0x200000>;
  3901. mask = <0x1>;
  3902. pname = "vbmeta";
  3903. };
  3904.  
  3905. cri_data {
  3906. phandle = <0x52>;
  3907. size = <0x0 0x800000>;
  3908. mask = <0x2>;
  3909. pname = "cri_data";
  3910. };
  3911.  
  3912. param {
  3913. phandle = <0x53>;
  3914. size = <0x0 0x1000000>;
  3915. mask = <0x2>;
  3916. pname = "param";
  3917. };
  3918.  
  3919. logo {
  3920. phandle = <0x4e>;
  3921. size = <0x0 0x800000>;
  3922. mask = <0x1>;
  3923. pname = "logo";
  3924. };
  3925.  
  3926. odm {
  3927. phandle = <0x5a>;
  3928. size = <0x0 0x8000000>;
  3929. mask = <0x1>;
  3930. pname = "odm";
  3931. };
  3932. };
  3933.  
  3934. serial@ffd23000 {
  3935. pinctrl-names = "default";
  3936. pinctrl-0 = <0x30>;
  3937. phandle = <0xea>;
  3938. clock-names = "clk_uart", "clk_gate";
  3939. reg = <0xffd23000 0x18>;
  3940. fifosize = <0x40>;
  3941. status = "disabled";
  3942. interrupts = <0x0 0x4b 0x1>;
  3943. compatible = "amlogic, meson-uart";
  3944. clocks = <0x15 0x2 0x3c>;
  3945. };
  3946.  
  3947. efuse {
  3948. phandle = <0xfa>;
  3949. clock-names = "efuse_clk";
  3950. read_cmd = <0x82000030>;
  3951. key = <0x4d>;
  3952. status = "disabled";
  3953. compatible = "amlogic, efuse";
  3954. clocks = <0x2 0x61>;
  3955. write_cmd = <0x82000031>;
  3956. get_max_cmd = <0x82000033>;
  3957. };
  3958.  
  3959. pcieA@fc000000 {
  3960. pcie-num = <0x1>;
  3961. interrupt-map-mask = <0x0 0x0 0x0 0x0>;
  3962. gpio-type = <0x2>;
  3963. phandle = <0xec>;
  3964. clock-names = "pcie_refpll", "pcie", "pcie_phy";
  3965. reg = <0xfc000000 0x400000 0xff648000 0x2000 0xfc400000 0x200000 0xff646000 0x2000 0xffd01080 0x10>;
  3966. pcie-ctrl-sleep-shift = <0x12>;
  3967. pcie-hhi-mem-pd-shift = <0x1a>;
  3968. bus-range = <0x0 0xff>;
  3969. reg-names = "elbi", "cfg", "config", "phy", "reset";
  3970. pcie-apb-rst-bit = <0xf>;
  3971. status = "disable";
  3972. ranges = <0x81000000 0x0 0x0 0xfc600000 0x0 0x100000 0x82000000 0xfc700000 0x0 0xfc700000 0x0 0x1900000>;
  3973. interrupts = <0x0 0xdd 0x0>;
  3974. pcie-ctrl-a-rst-bit = <0xc>;
  3975. interrupt-map = <0x0 0x0 0x0 0x0 0x1 0x0 0xdf 0x1>;
  3976. #address-cells = <0x3>;
  3977. #size-cells = <0x2>;
  3978. pwr-ctl = <0x1>;
  3979. num-lanes = <0x1>;
  3980. device_type = "pci";
  3981. reset-gpio = <0x12 0x49 0x0>;
  3982. pcie-phy-rst-bit = <0xe>;
  3983. compatible = "amlogic, amlogic-pcie-v2", "snps,dw-pcie";
  3984. clocks = <0x2 0x18 0x2 0x3f 0x2 0x42>;
  3985. #interrupt-cells = <0x1>;
  3986. pcie-hhi-mem-pd-mask = <0xf>;
  3987. pcie-ctrl-iso-shift = <0x12>;
  3988. };
  3989.  
  3990. arm_pmu {
  3991. reg = <0xff634680 0x4>;
  3992. cpumasks = <0xf>;
  3993. max-wait-cnt = <0x2710>;
  3994. relax-timer-ns = <0x989680>;
  3995. interrupts = <0x0 0x89 0x4>;
  3996. compatible = "arm,cortex-a15-pmu";
  3997. };
  3998.  
  3999. saradc {
  4000. phandle = <0xca>;
  4001. clock-names = "xtal", "saradc_clk";
  4002. reg = <0xff809000 0x48>;
  4003. status = "disabled";
  4004. interrupts = <0x0 0xc8 0x1>;
  4005. #io-channel-cells = <0x1>;
  4006. compatible = "amlogic,meson-g12a-saradc";
  4007. clocks = <0x15 0x2 0x105>;
  4008. };
  4009.  
  4010. t9015 {
  4011. #sound-dai-cells = <0x0>;
  4012. ch0_sel = <0x0>;
  4013. is_auge_used = <0x1>;
  4014. phandle = <0x7f>;
  4015. reg = <0xff632000 0x2000>;
  4016. tocodec_inout = <0x1>;
  4017. status = "okay";
  4018. tdmout_index = <0x1>;
  4019. compatible = "amlogic, aml_codec_T9015";
  4020. ch1_sel = <0x1>;
  4021. };
  4022.  
  4023. amvenc_avc {
  4024. interrupt-names = "mailbox_2";
  4025. dev_name = "amvenc_avc";
  4026. status = "okay";
  4027. interrupts = <0x0 0x2d 0x1>;
  4028. compatible = "amlogic, amvenc_avc";
  4029. };
  4030.  
  4031. secmon {
  4032. memory-region = <0xf>;
  4033. in_base_func = <0x82000020>;
  4034. out_base_func = <0x82000021>;
  4035. reserve_mem_size = <0x300000>;
  4036. compatible = "amlogic, secmon";
  4037. };
  4038.  
  4039. gpioleds {
  4040. status = "okay";
  4041. compatible = "gpio-leds";
  4042.  
  4043. sys_led {
  4044. label = "sys_led";
  4045. gpios = <0x5f 0xb 0x0>;
  4046. default-state = "on";
  4047. };
  4048. };
  4049. };
  4050.  
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