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- VSS=0V, VDD=5V, V0=potentio 0-20K to 5V, BLA=5V, BLK=0V
- Pinout: VSS,VDD,V0,RS,R/W,E,D0,D1,D2,D3,D4,D5,D6,D7,BLA,BLK
- Write/Read:
- RS/RW ..0ns.. EN=1 ..100ns.. Dx ..40ns.. EN=0 ..10ns.. ..1.52ms..
- {RS}{R/W}-{D7}D6}{D5}{D4}-{D3}{D2}{D1}{D0}
- 00-0000-0001 Clear display
- fill space to DDRAM, DDRAM address to 00h
- 00-0000-001x Return home
- DDRAM address to 00h, cursor to original location
- 00-0000-01{I/D}{S} Entry mode
- 11/01 shift display to left/right
- 1x/0x cursor/blink move to right/left, DDRAM address increased/decreased
- 00-0000-1{D}{C}{B} Display on/off
- D=1/0 display turn on/off
- C=1/0 cursor shown/hidden
- B=1/0 cursor blink/not
- 00-0001-{S/C}{R/L}xx Cursor or display shift
- 00/01 shift cursor to left/right, address counter--/++
- 10/11 shift display to left/right, address counter stays
- 00-001{DL}-{N}{F}xx Function
- DL=1/0 8-bit/4-bit
- {N}{F}=00 1-line display mode, 5x8 dots format
- {N}{F}=01 1-line, 5x8 dots
- {N}{F}=1x 2-line, 5x11 dots
- 00-01{AC5}{AC4}-{AC3}{AC2}{AC1}{AC} Set CGRAM address
- CGRAM data now available to read/write
- 00-1{AC6}{AC5}{AC4}-{AC3}{AC2}{AC1}{AC} Set DDRAM address
- DDRAM data now available to read/write
- in 1-line mode, DDRAM address from 00h to 4Fh
- in 2-line mode, DDRAM address from 00h to 27h (line 1), 40h to 67h (line 2)
- 01-{BF}{AC6}{AC5}{AC4}-{AC3}{AC2}{AC1}{AC} Read busy data and Address counter
- BF=1/0, busy/not
- 10-{D7}D6}{D5}{D4}-{D3}{D2}{D1}{D0} Write data to DDRAM/CGRAM
- 11-{D7}D6}{D5}{D4}-{D3}{D2}{D1}{D0} Read data from DDRAM/CGRAM
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