Advertisement
Nonta72

lcm_list.c

Dec 31st, 2016
1,016
0
Never
Not a member of Pastebin yet? Sign Up, it unlocks many cool features!
text 26.42 KB | None | 0 0
  1. /*
  2. * Copyright (C) 2015 MediaTek Inc.
  3. *
  4. * This program is free software: you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 as
  6. * published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope that it will be useful,
  9. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. * GNU General Public License for more details.
  12. */
  13.  
  14. #include "mt65xx_lcm_list.h"
  15. #include <lcm_drv.h>
  16. #ifdef BUILD_LK
  17. #include <platform/disp_drv_platform.h>
  18. #else
  19. #include <linux/delay.h>
  20. /* #include <mach/mt_gpio.h> */
  21. #endif
  22. LCM_DSI_MODE_CON lcm_dsi_mode;
  23.  
  24. /* used to identify float ID PIN status */
  25. #define LCD_HW_ID_STATUS_LOW 0
  26. #define LCD_HW_ID_STATUS_HIGH 1
  27. #define LCD_HW_ID_STATUS_FLOAT 0x02
  28. #define LCD_HW_ID_STATUS_ERROR 0x03
  29.  
  30. #ifdef BUILD_LK
  31. #define LCD_DEBUG(fmt) dprintf(CRITICAL, fmt)
  32. #else
  33. #define LCD_DEBUG(fmt, args...) pr_debug("[KERNEL/LCM]"fmt, ##args)
  34. #endif
  35.  
  36. LCM_DRIVER *lcm_driver_list[] = {
  37. #if defined(OTM1284A_HD720_DSI_VDO_TM)
  38. &otm1284a_hd720_dsi_vdo_tm_lcm_drv,
  39. #endif
  40. #if defined(OTM1285A_HD720_DSI_VDO_TM)
  41. &otm1285a_hd720_dsi_vdo_tm_lcm_drv,
  42. #endif
  43.  
  44. #if defined(NT35595_FHD_DSI_CMD_TRULY_8163)
  45. &nt35595_fhd_dsi_cmd_truly_8163_lcm_drv,
  46. #endif
  47.  
  48. #if defined(HCT_R69339_DSI_VDO_HD_SHARP_55_LN)
  49. &hct_r69339_dsi_vdo_hd_sharp_55_ln_lcm_drv,
  50. #endif
  51.  
  52. #if defined(NT35523_WXGA_DSI_VDO_8163)
  53. &nt35523_wxga_dsi_vdo_8163_lcm_drv,
  54. #endif
  55.  
  56. #if defined(EK79007_WSVGALNL_DSI_VDO)
  57. &ek79007_wsvgalnl_dsi_vdo_lcm_drv,
  58. #endif
  59.  
  60. #if defined(S6E3FA2_FHD1080_DSI_VDO)
  61. &s6e3fa2_fhd1080_dsi_vdo_lcm_drv,
  62. #endif
  63.  
  64. #if defined(OTM1283A_HD720_DSI_VDO_TM)
  65. &otm1283a_hd720_dsi_vdo_tm_lcm_drv,
  66. #endif
  67.  
  68. #if defined(IT6151_LP079QX1_EDP_DSI_VIDEO)
  69. &it6151_lp079qx1_edp_dsi_video_lcm_drv,
  70. #endif
  71.  
  72. #if defined(VVX10F008B00_WUXGA_DSI_VDO)
  73. &vvx10f008b00_wuxga_dsi_vdo_lcm_drv,
  74. #endif
  75.  
  76. #if defined(KR101IA2S_DSI_VDO)
  77. &kr101ia2s_dsi_vdo_lcm_drv,
  78. #endif
  79.  
  80. #if defined(KR070IA4T_DSI_VDO)
  81. &kr070ia4t_dsi_vdo_lcm_drv,
  82. #endif
  83.  
  84. #if defined(HX8394A_HD720_DSI_VDO_TIANMA_V2)
  85. &hx8394a_hd720_dsi_vdo_tianma_v2_lcm_drv,
  86. #endif
  87.  
  88. #if defined(OTM1283A)
  89. &otm1283a_6589_hd_dsi,
  90. #endif
  91. #if defined(OTM1282A_HD720_DSI_VDO_60HZ)
  92. &otm1282a_hd720_dsi_vdo_60hz_lcm_drv,
  93. #endif
  94. #if defined(OTM8018B_DSI_VDO_TXD_FWVGA)
  95. &otm8018b_dsi_vdo_txd_fwvga_lcm_drv,
  96. #endif
  97.  
  98. #if defined(TF070MC_RGB_V18_MT6571)
  99. &tf070mc_rgb_v18_mt6571_lcm_drv,
  100. #endif
  101.  
  102. #if defined(ZS070IH5015B3H6_RGB_MT6571)
  103. &zs070ih5015b3h6_mt6571_lcm_drv,
  104. #endif
  105.  
  106. #if defined(OTM1282A_HD720_DSI_VDO)
  107. &otm1282a_hd720_dsi_vdo_lcm_drv,
  108. #endif
  109.  
  110. #if defined(R63311_FHD_DSI_VDO)
  111. &r63311_fhd_dsi_vedio_lcm_drv,
  112. #endif
  113.  
  114. #if defined(R63315_FHD_DSI_VDO_TRULY)
  115. &r63315_fhd_dsi_vdo_truly_lcm_drv,
  116. #endif
  117.  
  118. #if defined(NT35517_QHD_DSI_VDO)
  119. &nt35517_dsi_vdo_lcm_drv,
  120. #endif
  121.  
  122. #if defined(ILI9806E_DSI_VDO_FWVGA)
  123. &ili9806e_dsi_vdo_fwvga_drv,
  124. #endif
  125.  
  126. #if defined(LP079X01)
  127. &lp079x01_lcm_drv,
  128. #endif
  129.  
  130. #if defined(HX8369)
  131. &hx8369_lcm_drv,
  132. #endif
  133.  
  134. #if defined(HX8369_6575)
  135. &hx8369_6575_lcm_drv,
  136. #endif
  137.  
  138. #if defined(BM8578)
  139. &bm8578_lcm_drv,
  140. #endif
  141.  
  142. #if defined(NT35582_MCU)
  143. &nt35582_mcu_lcm_drv,
  144. #endif
  145.  
  146. #if defined(NT35582_MCU_6575)
  147. &nt35582_mcu_6575_lcm_drv,
  148. #endif
  149.  
  150. #if defined(NT35590_HD720_DSI_CMD_TRULY2)
  151. &nt35590_hd720_dsi_cmd_truly2_lcm_drv,
  152. #endif
  153.  
  154. #if defined(NT35590_HD720_DSI_VDO_TRULY)
  155. &nt35590_hd720_dsi_vdo_truly_lcm_drv,
  156. #endif
  157.  
  158. #if defined(SSD2075_HD720_DSI_VDO_TRULY)
  159. &ssd2075_hd720_dsi_vdo_truly_lcm_drv,
  160. #endif
  161.  
  162. #if defined(NT35590_HD720_DSI_CMD)
  163. &nt35590_hd720_dsi_cmd_drv,
  164. #endif
  165.  
  166. #if defined(NT35590_HD720_DSI_CMD_AUO)
  167. &nt35590_hd720_dsi_cmd_auo_lcm_drv,
  168. #endif
  169.  
  170. #if defined(NT35590_HD720_DSI_CMD_AUO_WVGA)
  171. &nt35590_hd720_dsi_cmd_auo_wvga_lcm_drv,
  172. #endif
  173.  
  174. #if defined(NT35590_HD720_DSI_CMD_AUO_QHD)
  175. &nt35590_hd720_dsi_cmd_auo_qhd_lcm_drv,
  176. #endif
  177.  
  178. #if defined(NT35590_HD720_DSI_CMD_AUO_FWVGA)
  179. &nt35590_hd720_dsi_cmd_auo_fwvga_lcm_drv,
  180. #endif
  181.  
  182. #if defined(NT35590_HD720_DSI_CMD_CMI)
  183. &nt35590_hd720_dsi_cmd_cmi_lcm_drv,
  184. #endif
  185.  
  186. #if defined(NT35582_RGB_6575)
  187. &nt35582_rgb_6575_lcm_drv,
  188. #endif
  189.  
  190. #if defined(NT51012_HD720_DSI_VDO)
  191. &nt51012_hd720_dsi_vdo_lcm_drv,
  192. #endif
  193.  
  194. #if defined(HX8369_RGB_6585_FPGA)
  195. &hx8369_rgb_6585_fpga_lcm_drv,
  196. #endif
  197.  
  198. #if defined(HX8369_RGB_6572_FPGA)
  199. &hx8369_rgb_6572_fpga_lcm_drv,
  200. #endif
  201.  
  202. #if defined(HX8369_MCU_6572)
  203. &hx8369_mcu_6572_lcm_drv,
  204. #endif
  205.  
  206. #if defined(HX8369A_WVGA_DSI_CMD)
  207. &hx8369a_wvga_dsi_cmd_drv,
  208. #endif
  209.  
  210. #if defined(HX8369A_WVGA_DSI_VDO)
  211. &hx8369a_wvga_dsi_vdo_drv,
  212. #endif
  213.  
  214. #if defined(HX8357B)
  215. &hx8357b_lcm_drv,
  216. #endif
  217.  
  218. #if defined(HX8357C_HVGA_DSI_CMD)
  219. &hx8357c_hvga_dsi_cmd_drv,
  220. #endif
  221.  
  222. #if defined(R61408)
  223. &r61408_lcm_drv,
  224. #endif
  225.  
  226. #if defined(R61408_WVGA_DSI_CMD)
  227. &r61408_wvga_dsi_cmd_drv,
  228. #endif
  229.  
  230. #if defined(HX8369_DSI_VDO)
  231. &hx8369_dsi_vdo_lcm_drv,
  232. #endif
  233.  
  234. #if defined(HX8369_DSI)
  235. &hx8369_dsi_lcm_drv,
  236. #endif
  237.  
  238. #if defined(HX8369_6575_DSI)
  239. &hx8369_dsi_6575_lcm_drv,
  240. #endif
  241.  
  242. #if defined(HX8369_6575_DSI_NFC_ZTE)
  243. &hx8369_dsi_6575_lcm_drv,
  244. #endif
  245.  
  246. #if defined(HX8369_6575_DSI_HVGA)
  247. &hx8369_dsi_6575_hvga_lcm_drv,
  248. #endif
  249.  
  250. #if defined(HX8369_6575_DSI_QVGA)
  251. &hx8369_dsi_6575_qvga_lcm_drv,
  252. #endif
  253.  
  254. #if defined(HX8369_HVGA)
  255. &hx8369_hvga_lcm_drv,
  256. #endif
  257.  
  258. #if defined(NT35510)
  259. &nt35510_lcm_drv,
  260. #endif
  261.  
  262. #if defined(NT35510_RGB_6575)
  263. &nt35510_dpi_lcm_drv,
  264. #endif
  265.  
  266. #if defined(NT35510_HVGA)
  267. &nt35510_hvga_lcm_drv,
  268. #endif
  269.  
  270. #if defined(NT35510_QVGA)
  271. &nt35510_qvga_lcm_drv,
  272. #endif
  273.  
  274. #if defined(NT35510_WVGA_DSI_CMD)
  275. &nt35510_wvga_dsi_cmd_drv,
  276. #endif
  277.  
  278. #if defined(NT35510_6517)
  279. &nt35510_6517_lcm_drv,
  280. #endif
  281.  
  282. #if defined(NT35510_DSI_CMD_6572)
  283. &nt35510_dsi_cmd_6572_drv,
  284. #endif
  285.  
  286. #if defined(NT35510_DSI_CMD_6572_HVGA)
  287. &nt35510_dsi_cmd_6572_hvga_drv,
  288. #endif
  289.  
  290. #if defined(NT35510_DSI_CMD_6572_FWVGA)
  291. &nt35510_dsi_cmd_6572_fwvga_drv,
  292. #endif
  293.  
  294. #if defined(NT35510_DSI_CMD_6572_QVGA)
  295. &nt35510_dsi_cmd_6572_qvga_drv,
  296. #endif
  297.  
  298. #if defined(NT35510_DSI_VDO_6572)
  299. &nt35510_dsi_vdo_6572_drv,
  300. #endif
  301.  
  302. #if defined(NT35510_DPI_6572)
  303. &nt35510_dpi_6572_lcm_drv,
  304. #endif
  305.  
  306. #if defined(NT35510_MCU_6572)
  307. &nt35510_mcu_6572_lcm_drv,
  308. #endif
  309.  
  310. #if defined(ILI9481)
  311. &ili9481_lcm_drv,
  312. #endif
  313.  
  314. #if defined(NT35582)
  315. &nt35582_lcm_drv,
  316. #endif
  317.  
  318. #if defined(S6D0170)
  319. &s6d0170_lcm_drv,
  320. #endif
  321.  
  322. #if defined(SPFD5461A)
  323. &spfd5461a_lcm_drv,
  324. #endif
  325.  
  326. #if defined(TA7601)
  327. &ta7601_lcm_drv,
  328. #endif
  329.  
  330. #if defined(TFT1P3037)
  331. &tft1p3037_lcm_drv,
  332. #endif
  333.  
  334. #if defined(HA5266)
  335. &ha5266_lcm_drv,
  336. #endif
  337.  
  338. #if defined(HSD070IDW1)
  339. &hsd070idw1_lcm_drv,
  340. #endif
  341.  
  342. #if defined(HX8363_6575_DSI)
  343. &hx8363_6575_dsi_lcm_drv,
  344. #endif
  345.  
  346. #if defined(HX8363_6575_DSI_HVGA)
  347. &hx8363_6575_dsi_hvga_lcm_drv,
  348. #endif
  349.  
  350. #if defined(HX8363B_WVGA_DSI_CMD)
  351. &hx8363b_wvga_dsi_cmd_drv,
  352. #endif
  353.  
  354. #if defined(LG4571)
  355. &lg4571_lcm_drv,
  356. #endif
  357.  
  358. #if defined(LG4573B_WVGA_DSI_VDO_LH430MV1)
  359. &lg4573b_wvga_dsi_vdo_lh430mv1_drv,
  360. #endif
  361.  
  362. #if defined(LVDS_WSVGA)
  363. &lvds_wsvga_lcm_drv,
  364. #endif
  365.  
  366. #if defined(LVDS_WSVGA_TI)
  367. &lvds_wsvga_ti_lcm_drv,
  368. #endif
  369.  
  370. #if defined(LVDS_WSVGA_TI_N)
  371. &lvds_wsvga_ti_n_lcm_drv,
  372. #endif
  373.  
  374. #if defined(NT35565_3D)
  375. &nt35565_3d_lcm_drv,
  376. #endif
  377.  
  378. #if defined(TM070DDH03)
  379. &tm070ddh03_lcm_drv,
  380. #endif
  381. #if defined(R63303_IDISPLAY)
  382. &r63303_idisplay_lcm_drv,
  383. #endif
  384.  
  385. #if defined(HX8369B_DSI_VDO)
  386. &hx8369b_dsi_vdo_lcm_drv,
  387. #endif
  388.  
  389. #if defined(HX8369B_WVGA_DSI_VDO)
  390. &hx8369b_wvga_dsi_vdo_drv,
  391. #endif
  392.  
  393. #if defined(HX8369B_QHD_DSI_VDO)
  394. &hx8389b_qhd_dsi_vdo_drv,
  395. #endif
  396.  
  397. #if defined(HX8389B_HD720_DSI_VDO)
  398. &hx8389b_hd720_dsi_vdo_drv,
  399. #endif
  400.  
  401. #if defined(GN_SSD2825_SMD_S6E8AA)
  402. &gn_ssd2825_smd_s6e8aa,
  403. #endif
  404. #if defined(HX8369_TM_DSI)
  405. &hx8369_dsi_tm_lcm_drv,
  406. #endif
  407.  
  408. #if defined(HX8369_BLD_DSI)
  409. &hx8369_dsi_bld_lcm_drv,
  410. #endif
  411.  
  412. #if defined(HJ080IA)
  413. &hj080ia_lcm_drv,
  414. #endif
  415.  
  416. #if defined(HJ101NA02A)
  417. &hj101na02a_lcm_drv,
  418. #endif
  419.  
  420. #if defined(HJ101NA02A_8135)
  421. &hj101na02a_8135_lcm_drv,
  422. #endif
  423.  
  424. #if defined(HSD070PFW3)
  425. &hsd070pfw3_lcm_drv,
  426. #endif
  427.  
  428. #if defined(HSD070PFW3_8135)
  429. &hsd070pfw3_8135_lcm_drv,
  430. #endif
  431.  
  432. #if defined(EJ101IA)
  433. &ej101ia_lcm_drv,
  434. #endif
  435.  
  436. #if defined(SCF0700M48GGU02)
  437. &scf0700m48ggu02_lcm_drv,
  438. #endif
  439.  
  440. #if defined(OTM1280A_HD720_DSI_CMD)
  441. &otm1280a_hd720_dsi_cmd_drv,
  442. #endif
  443.  
  444. #if defined(OTM8018B_DSI_VDO)
  445. &otm8018b_dsi_vdo_lcm_drv,
  446. #endif
  447.  
  448. #if defined(NT35512_DSI_VDO)
  449. &nt35512_dsi_vdo_lcm_drv,
  450. #endif
  451.  
  452. #if defined(NT35512_WVGA_DSI_VDO_BOE)
  453. &nt35512_wvga_dsi_vdo_boe_drv,
  454. #endif
  455.  
  456. #if defined(HX8392A_DSI_CMD)
  457. &hx8392a_dsi_cmd_lcm_drv,
  458. #endif
  459.  
  460. #if defined(HX8392A_DSI_CMD_3LANE)
  461. &hx8392a_dsi_cmd_3lane_lcm_drv,
  462. #endif
  463.  
  464. #if defined(HX8392A_DSI_CMD_WVGA)
  465. &hx8392a_dsi_cmd_wvga_lcm_drv,
  466. #endif
  467.  
  468. #if defined(HX8392A_DSI_CMD_FWVGA)
  469. &hx8392a_dsi_cmd_fwvga_lcm_drv,
  470. #endif
  471.  
  472. #if defined(HX8392A_DSI_CMD_QHD)
  473. &hx8392a_dsi_cmd_qhd_lcm_drv,
  474. #endif
  475.  
  476. #if defined(HX8392A_DSI_VDO)
  477. &hx8392a_dsi_vdo_lcm_drv,
  478. #endif
  479.  
  480. #if defined(HX8392A_DSI_VDO_2LANE)
  481. &hx8392a_dsi_vdo_2lane_lcm_drv,
  482. #endif
  483.  
  484. #if defined(HX8392A_DSI_VDO_3LANE)
  485. &hx8392a_dsi_vdo_3lane_lcm_drv,
  486. #endif
  487.  
  488. #if defined(NT35516_QHD_DSI_CMD_IPSBOE)
  489. &nt35516_qhd_dsi_cmd_ipsboe_lcm_drv,
  490. #endif
  491.  
  492. #if defined(NT35516_QHD_DSI_CMD_IPSBOE_WVGA)
  493. &nt35516_qhd_dsi_cmd_ipsboe_wvga_lcm_drv,
  494. #endif
  495.  
  496. #if defined(NT35516_QHD_DSI_CMD_IPSBOE_FWVGA)
  497. &nt35516_qhd_dsi_cmd_ipsboe_fwvga_lcm_drv,
  498. #endif
  499.  
  500. #if defined(NT35516_QHD_DSI_CMD_IPS9K1431)
  501. &nt35516_qhd_dsi_cmd_ips9k1431_drv,
  502. #endif
  503.  
  504. #if defined(NT35516_QHD_DSI_CMD_TFT9K1342)
  505. &nt35516_qhd_dsi_cmd_tft9k1342_drv,
  506. #endif
  507.  
  508. #if defined(NT35516_QHD_DSI_VEDIO)
  509. &nt35516_qhd_rav4_lcm_drv,
  510. #endif
  511.  
  512. #if defined(BP070WS1)
  513. &bp070ws1_lcm_drv,
  514. #endif
  515.  
  516. #if defined(BP101WX1)
  517. &bp101wx1_lcm_drv,
  518. #endif
  519.  
  520. #if defined(BP101WX1_N)
  521. &bp101wx1_n_lcm_drv,
  522. #endif
  523.  
  524. #if defined(CM_N070ICE_DSI_VDO)
  525. &cm_n070ice_dsi_vdo_lcm_drv,
  526. #endif
  527.  
  528. #if defined(CM_N070ICE_DSI_VDO_MT8135)
  529. &cm_n070ice_dsi_vdo_mt8135_lcm_drv,
  530. #endif
  531.  
  532. #if defined(CM_OTC3108BH161_DSI_VDO)
  533. &cm_otc3108bhv161_dsi_vdo_lcm_drv,
  534. #endif
  535. #if defined(NT35510_FWVGA)
  536. &nt35510_fwvga_lcm_drv,
  537. #endif
  538.  
  539. #if defined(R63311_FHD_DSI_VDO_SHARP)
  540. &r63311_fhd_dsi_vdo_sharp_lcm_drv,
  541. #endif
  542.  
  543. #if defined(R81592_HVGA_DSI_CMD)
  544. &r81592_hvga_dsi_cmd_drv,
  545. #endif
  546.  
  547. #if defined(RM68190_QHD_DSI_VDO)
  548. &rm68190_dsi_vdo_lcm_drv,
  549. #endif
  550.  
  551. #if defined(NT35596_FHD_DSI_VDO_TRULY)
  552. &nt35596_fhd_dsi_vdo_truly_lcm_drv,
  553. #endif
  554.  
  555. #if defined(NT35595_FHD_DSI_VDO_TRULY)
  556. &nt35595_fhd_dsi_vdo_truly_lcm_drv,
  557. #endif
  558.  
  559. #if defined(R63319_WQHD_DSI_VDO_TRULY)
  560. &r63319_wqhd_dsi_vdo_truly_lcm_drv,
  561. #endif
  562.  
  563.  
  564. #if defined(NT35598_WQHD_DSI_VDO_TRULY)
  565. &nt35598_wqhd_dsi_vdo_truly_lcm_drv,
  566. #endif
  567.  
  568. #if defined(NT35595_FHD_DSI_CMD_TRULY_TPS65132)
  569. &nt35595_fhd_dsi_cmd_truly_tps65132_lcm_drv,
  570. #endif
  571.  
  572. #if defined(NT35595_FHD_DSI_VDO_TRULY_TPS65132)
  573. &nt35595_fhd_dsi_vdo_truly_tps65132_lcm_drv,
  574. #endif
  575.  
  576. #if defined(NT35595_FHD_DSI_CMD_TRULY_TPS65132_720P)
  577. &nt35595_fhd_dsi_cmd_truly_tps65132_720p_lcm_drv,
  578. #endif
  579.  
  580. #if defined(NT35595_FHD_DSI_CMD_TRULY)
  581. &nt35595_fhd_dsi_cmd_truly_lcm_drv,
  582. #endif
  583.  
  584. #if defined(NT35595_FHD_DSI_CMD_TRULY_NT50358)
  585. &nt35595_fhd_dsi_cmd_truly_nt50358_lcm_drv,
  586. #endif
  587.  
  588. #if defined(NT35595_FHD_DSI_VDO_TRULY_NT50358)
  589. &nt35595_fhd_dsi_vdo_truly_nt50358_lcm_drv,
  590. #endif
  591.  
  592. #if defined(NT35595_FHD_DSI_CMD_TRULY_NT50358_720P)
  593. &nt35595_fhd_dsi_cmd_truly_nt50358_720p_lcm_drv,
  594. #endif
  595.  
  596. #if defined(NT35595_FHD_DSI_CMD_TRULY_NT50358_QHD)
  597. &nt35595_fhd_dsi_cmd_truly_nt50358_qhd_lcm_drv,
  598. #endif
  599.  
  600. #if defined(NT35595_FHD_DSI_CMD_TRULY_NT50358_FWVGA)
  601. &nt35595_fhd_dsi_cmd_truly_nt50358_fwvga_lcm_drv,
  602. #endif
  603.  
  604. #if defined(NT35595_FHD_DSI_CMD_TRULY_NT50358_WVGA)
  605. &nt35595_fhd_dsi_cmd_truly_nt50358_wvga_lcm_drv,
  606. #endif
  607.  
  608. #if defined(NT35595_FHD_DSI_CMD_TRULY_NT50358_6735)
  609. &nt35595_fhd_dsi_cmd_truly_nt50358_6735_lcm_drv,
  610. #endif
  611.  
  612. #if defined(NT35595_FHD_DSI_CMD_TRULY_NT50358_6735_720P)
  613. &nt35595_fhd_dsi_cmd_truly_nt50358_6735_720p_lcm_drv,
  614. #endif
  615.  
  616. #if defined(NT35596_FHD_DSI_VDO_YASSY)
  617. &nt35596_fhd_dsi_vdo_yassy_lcm_drv,
  618. #endif
  619.  
  620. #if defined(NT35596_HD720_DSI_VDO_TRULY_TPS65132)
  621. &nt35596_hd720_dsi_vdo_truly_tps65132_lcm_drv,
  622. #endif
  623.  
  624. #if defined(AUO_B079XAT02_DSI_VDO)
  625. &auo_b079xat02_dsi_vdo_lcm_drv,
  626. #endif
  627.  
  628. #if defined(OTM9608_WVGA_DSI_CMD)
  629. &otm9608_wvga_dsi_cmd_drv,
  630. #endif
  631.  
  632. #if defined(OTM9608_FWVGA_DSI_CMD)
  633. &otm9608_fwvga_dsi_cmd_drv,
  634. #endif
  635.  
  636. #if defined(OTM9608_QHD_DSI_CMD)
  637. &otm9608_qhd_dsi_cmd_drv,
  638. #endif
  639.  
  640. #if defined(OTM9608_QHD_DSI_VDO)
  641. &otm9608_qhd_dsi_vdo_drv,
  642. #endif
  643.  
  644. #if defined(OTM8009A_FWVGA_DSI_CMD_TIANMA)
  645. &otm8009a_fwvga_dsi_cmd_tianma_lcm_drv,
  646. #endif
  647.  
  648. #if defined(OTM8009A_FWVGA_DSI_VDO_TIANMA)
  649. &otm8009a_fwvga_dsi_vdo_tianma_lcm_drv,
  650. #endif
  651.  
  652. #if defined(HX8389B_QHD_DSI_VDO_TIANMA)
  653. &hx8389b_qhd_dsi_vdo_tianma_lcm_drv,
  654. #endif
  655. #if defined(HX8389B_QHD_DSI_VDO_TIANMA055XDHP)
  656. &hx8389b_qhd_dsi_vdo_tianma055xdhp_lcm_drv,
  657. #endif
  658.  
  659. #if defined(CPT_CLAA101FP01_DSI_VDO)
  660. &cpt_claa101fp01_dsi_vdo_lcm_drv,
  661. #endif
  662.  
  663. #if defined(CPT_CLAA101FP01_DSI_VDO_8163)
  664. &cpt_claa101fp01_dsi_vdo_8163_lcm_drv,
  665. #endif
  666.  
  667. #if defined(IT6151_EDP_DSI_VIDEO_SHARP)
  668. &it6151_edp_dsi_video_sharp_lcm_drv,
  669. #endif
  670.  
  671. #if defined(CPT_CLAP070WP03XG_SN65DSI83)
  672. &cpt_clap070wp03xg_sn65dsi83_lcm_drv,
  673. #endif
  674. #if defined(NT35520_HD720_DSI_CMD_TM)
  675. &nt35520_hd720_tm_lcm_drv,
  676. #endif
  677. #if defined(NT35520_HD720_DSI_CMD_BOE)
  678. &nt35520_hd720_boe_lcm_drv,
  679. #endif
  680. #if defined(NT35521_HD720_DSI_VDO_BOE)
  681. &nt35521_hd720_dsi_vdo_boe_lcm_drv,
  682. #endif
  683. #if defined(NT35521_HD720_DSI_VIDEO_TM)
  684. &nt35521_hd720_tm_lcm_drv,
  685. #endif
  686. #if defined(R69338_HD720_DSI_VDO_JDI_DW8755A)
  687. &r69338_hd720_dsi_vdo_jdi_dw8755a_drv,
  688. #endif
  689. #if defined(H070D_18DM)
  690. &h070d_18dm_lcm_drv,
  691. #endif
  692. #if defined(R69429_WUXGA_DSI_VDO)
  693. &r69429_wuxga_dsi_vdo_lcm_drv,
  694. #endif
  695.  
  696. #if defined(HX8394D_HD720_DSI_VDO_TIANMA)
  697. &hx8394d_hd720_dsi_vdo_tianma_lcm_drv,
  698. #endif
  699.  
  700. #if defined(HX8394A_HD720_DSI_VDO_TIANMA)
  701. &hx8394a_hd720_dsi_vdo_tianma_lcm_drv,
  702. #endif
  703.  
  704. #if defined(R69429_WUXGA_DSI_CMD)
  705. &r69429_wuxga_dsi_cmd_lcm_drv,
  706. #endif
  707.  
  708. #if defined(RM68210_HD720_DSI_UFOE_CMD)
  709. &rm68210_hd720_dsi_ufoe_cmd_lcm_drv,
  710. #endif
  711.  
  712. #if defined(CPT_CLAP070WP03XG_LVDS)
  713. &cpt_clap070wp03xg_lvds_lcm_drv,
  714. #endif
  715.  
  716. #if defined(OTM8018B_DSI_VDO_L72)
  717. &otm8018b_dsi_vdo_l72_lcm_drv,
  718. #endif
  719.  
  720. #if defined(HX8369_DSI_CMD_6571)
  721. &hx8369_dsi_cmd_6571_lcm_drv,
  722. #endif
  723.  
  724. #if defined(HX8369_DSI_VDO_6571)
  725. &hx8369_dsi_vdo_6571_lcm_drv,
  726. #endif
  727.  
  728. #if defined(RX_498HX_615B_82)
  729. &RX_498HX_615B_82_lcm_drv,
  730. #endif
  731.  
  732. #if defined(HX8369_DBI_6571)
  733. &hx8369_dbi_6571_lcm_drv,
  734. #endif
  735.  
  736. #if defined(RX_498HX_615B)
  737. &RX_498HX_615B_lcm_drv,
  738. #endif
  739.  
  740. #if defined(HX8369_DPI_6571)
  741. &hx8369_dpi_6571_lcm_drv,
  742. #endif
  743.  
  744. #if defined(HX8389B_QHD_DSI_VDO_LGD)
  745. &hx8389b_qhd_dsi_vdo_lgd_lcm_drv,
  746. #endif
  747.  
  748. #if defined(NT35510_DSI_CMD_6571)
  749. &nt35510_dsi_cmd_6571_lcm_drv,
  750. #endif
  751.  
  752. #if defined(NT35510_DSI_CMD_6571_HVGA)
  753. &nt35510_dsi_cmd_6571_hvga_lcm_drv,
  754. #endif
  755.  
  756. #if defined(NT35510_DSI_CMD_6571_QVGA)
  757. &nt35510_dsi_cmd_6571_qvga_lcm_drv,
  758. #endif
  759.  
  760. #if defined(NT35510_DSI_VDO_6571)
  761. &nt35510_dsi_vdo_6571_lcm_drv,
  762. #endif
  763.  
  764. #if defined(NT35510_DBI_6571)
  765. &nt35510_dbi_6571_lcm_drv,
  766. #endif
  767.  
  768. #if defined(NT35510_DPI_6571)
  769. &nt35510_dpi_6571_lcm_drv,
  770. #endif
  771.  
  772. #if defined(NT35590_DSI_CMD_6571_FWVGA)
  773. &nt35590_dsi_cmd_6571_fwvga_lcm_drv,
  774. #endif
  775.  
  776. #if defined(NT35590_DSI_CMD_6571_QHD)
  777. &nt35590_dsi_cmd_6571_qhd_lcm_drv,
  778. #endif
  779.  
  780. #if defined(NT35517_QHD_DSI_VIDEO)
  781. &nt35517_qhd_dsi_vdo_lcm_drv,
  782. #endif
  783.  
  784. #if defined(IT6151_FHD_EDP_DSI_VIDEO_AUO)
  785. &it6151_fhd_edp_dsi_video_auo_lcm_drv,
  786. #endif
  787.  
  788. #if defined(A080EAN01_DSI_VDO)
  789. &a080ean01_dsi_vdo_lcm_drv,
  790. #endif
  791.  
  792. #if defined(IT6121_G156XW01V1_LVDS_VDO)
  793. &it6121_g156xw01v1_lvds_vdo_lcm_drv,
  794. #endif
  795.  
  796. #if defined(ILI9806C_DSI_VDO_DJN_FWVGA)
  797. &ili9806c_dsi_vdo_djn_fwvga_lcm_drv,
  798. #endif
  799.  
  800. #if defined(R69338_HD720_DSI_VDO_JDI)
  801. &r69338_hd720_dsi_vdo_jdi_drv,
  802. #endif
  803.  
  804. #if defined(R69338_HD720_5IN_DSI_VDO_JDI_DW8768)
  805. &r69338_hd720_5in_dsi_vdo_jdi_dw8768_drv,
  806. #endif
  807.  
  808. #if defined(DB7436_DSI_VDO_FWVGA)
  809. &db7436_dsi_vdo_fwvga_drv,
  810. #endif
  811.  
  812. #if defined(R63417_FHD_DSI_CMD_TRULY_NT50358)
  813. &r63417_fhd_dsi_cmd_truly_nt50358_lcm_drv,
  814. #endif
  815.  
  816. #if defined(R63417_FHD_DSI_CMD_TRULY_NT50358_720P)
  817. &r63417_fhd_dsi_cmd_truly_nt50358_720p_lcm_drv,
  818. #endif
  819.  
  820. #if defined(R63417_FHD_DSI_CMD_TRULY_NT50358_QHD)
  821. &r63417_fhd_dsi_cmd_truly_nt50358_qhd_lcm_drv,
  822. #endif
  823.  
  824. #if defined(R63417_FHD_DSI_VDO_TRULY_NT50358)
  825. &r63417_fhd_dsi_vdo_truly_nt50358_lcm_drv,
  826. #endif
  827.  
  828. #if defined(R63419_WQHD_TRULY_PHANTOM_2K_CMD_OK)
  829. &r63419_wqhd_truly_phantom_cmd_lcm_drv,
  830. #endif
  831.  
  832. #if defined(R63419_WQHD_TRULY_PHANTOM_2K_CMD_OK_MT6797)
  833. &r63419_wqhd_truly_phantom_cmd_lcm_drv,
  834. #endif
  835.  
  836. #if defined(R63419_WQHD_TRULY_PHANTOM_2K_VDO_OK)
  837. &r63419_wqhd_truly_phantom_vdo_lcm_drv,
  838. #endif
  839.  
  840. #if defined(R63419_WQHD_TRULY_PHANTOM_2K_VDO_OK_MT6797)
  841. &r63419_wqhd_truly_phantom_vdo_lcm_drv,
  842. #endif
  843.  
  844. #if defined(R63419_FHD_TRULY_PHANTOM_2K_CMD_OK)
  845. &r63419_fhd_truly_phantom_lcm_drv,
  846. #endif
  847.  
  848. #if defined(R63419_FHD_TRULY_PHANTOM_2K_CMD_OK_MT6797)
  849. &r63419_fhd_truly_phantom_lcm_drv,
  850. #endif
  851.  
  852. #if defined(R63423_WQHD_TRULY_PHANTOM_2K_CMD_OK)
  853. &r63423_wqhd_truly_phantom_lcm_drv,
  854. #endif
  855.  
  856. #if defined(NT35523_WXGA_DSI_VDO_BOE)
  857. &nt35523_wxga_dsi_vdo_boe_lcm_drv,
  858. #endif
  859.  
  860. #if defined(NT35523_WSVGA_DSI_VDO_BOE)
  861. &nt35523_wsvga_dsi_vdo_boe_lcm_drv,
  862. #endif
  863.  
  864. #if defined(EK79023_DSI_WSVGA_VDO)
  865. &ek79023_dsi_wsvga_vdo_lcm_drv,
  866. #endif
  867.  
  868. #if defined(OTM9605A_QHD_DSI_VDO)
  869. &otm9605a_qhd_dsi_vdo_drv,
  870. #endif
  871.  
  872. #if defined(OTM1906A_FHD_DSI_CMD_AUTO)
  873. &otm1906a_fhd_dsi_cmd_auto_lcm_drv,
  874. #endif
  875.  
  876. #if defined(NT35532_FHD_DSI_VDO_SHARP)
  877. &nt35532_fhd_dsi_vdo_sharp_lcm_drv,
  878. #endif
  879.  
  880. #if defined(CLAP070WP03XG_LVDS_8163)
  881. &clap070wp03xg_lvds_8163_lcm_drv,
  882. #endif
  883.  
  884. #if defined(S6D7AA0_WXGA_DSI_VDO)
  885. &s6d7aa0_wxga_dsi_vdo_lcm_drv,
  886. #endif
  887.  
  888. #if defined(SY20810800210132_WUXGA_DSI_VDO)
  889. &sy20810800210132_wuxga_dsi_vdo_lcm_drv,
  890. #endif
  891.  
  892. #if defined(OTM1906B_FHD_DSI_CMD_JDI_TPS65132)
  893. &otm1906b_fhd_dsi_cmd_jdi_tps65132_lcm_drv,
  894. #endif
  895.  
  896. #if defined(OTM1906B_FHD_DSI_CMD_JDI_TPS65132_MT6797)
  897. &otm1906b_fhd_dsi_cmd_jdi_tps65132_mt6797_lcm_drv,
  898. #endif
  899.  
  900. #if defined(OTM1906B_FHD_DSI_VDO_JDI_TPS65132_MT6797)
  901. &otm1906b_fhd_dsi_vdo_jdi_tps65132_mt6797_lcm_drv,
  902. #endif
  903.  
  904. #if defined(HX8394C_WXGA_DSI_VDO)
  905. &hx8394c_wxga_dsi_vdo_lcm_drv,
  906. #endif
  907.  
  908. #if defined(IT6151_LP079QX1_EDP_DSI_VIDEO_8163EVB)
  909. &it6151_lp079qx1_edp_dsi_video_8163evb_lcm_drv,
  910. #endif
  911.  
  912. #if defined(NT35510_DSI_CMD)
  913. &nt35510_dsi_cmd_lcm_drv,
  914. #endif
  915.  
  916. #if defined(NT35695_FHD_DSI_CMD_TRULY_NT50358)
  917. &nt35695_fhd_dsi_cmd_truly_nt50358_lcm_drv,
  918. #endif
  919.  
  920. #if defined(NT35695_FHD_DSI_VDO_TRULY_NT50358)
  921. &nt35695_fhd_dsi_vdo_truly_nt50358_lcm_drv,
  922. #endif
  923.  
  924. #if defined(NT35695_FHD_DSI_CMD_TRULY_NT50358_720P)
  925. &nt35695_fhd_dsi_cmd_truly_nt50358_720p_lcm_drv,
  926. #endif
  927.  
  928. #if defined(NT35695_FHD_DSI_CMD_TRULY_NT50358_QHD)
  929. &nt35695_fhd_dsi_cmd_truly_nt50358_qhd_lcm_drv,
  930. #endif
  931. #if defined(RM69032_DSI_CMD)
  932. &rm69032_dsi_cmd_lcm_drv,
  933. #endif
  934.  
  935. #if defined(ST7789H2_DBI)
  936. &st7789h2_dbi_lcm_drv,
  937. #endif
  938.  
  939. #if defined(CM_N070ICE_DSI_VDO_MT8173)
  940. &cm_n070ice_dsi_vdo_mt8173_lcm_drv,
  941. #endif
  942.  
  943. #if defined(NT35595_FHD_DSI_CMD_TRULY_NT50358_EXTERN)
  944. &nt35595_fhd_dsi_cmd_truly_nt50358_extern_lcm_drv,
  945. #endif
  946.  
  947. #if defined(R69429_WQXGA_DSI_VDO)
  948. &r69429_wqxga_dsi_vdo_lcm_drv,
  949. #endif
  950.  
  951. #if defined(HX8394C_WXGA_DSI_VDO)
  952. &hx8394c_wxga_dsi_vdo_lcm_drv,
  953. #endif
  954.  
  955. #if defined(NT35595_TRULY_FHD_DSI_VDO)
  956. &nt35595_truly_fhd_dsi_vdo_lcm_drv,
  957. #endif
  958.  
  959. #if defined(NT36850_WQHD_DSI_2K_CMD)
  960. &nt36850_wqhd_dsi_2k_cmd_lcm_drv,
  961. #endif
  962.  
  963. #if defined(S6E3HA3_WQHD_2K_CMD)
  964. &s6e3ha3_wqhd_2k_cmd_lcm_drv,
  965. #endif
  966.  
  967. #if defined(NT35595_FHD_DSI_CMD_TRULY_NT50358_720P_EXTERN)
  968. &nt35595_fhd_dsi_cmd_truly_nt50358_720p_extern_lcm_drv,
  969. #endif
  970. };
  971.  
  972. unsigned char lcm_name_list[][128] = {
  973. #if defined(HX8392A_DSI_CMD)
  974. "hx8392a_dsi_cmd",
  975. #endif
  976.  
  977. #if defined(S6E3HA3_WQHD_2K_CMD)
  978. "s6e3ha3_wqhd_2k_cmd",
  979. #endif
  980.  
  981. #if defined(HX8392A_DSI_VDO)
  982. "hx8392a_vdo_cmd",
  983. #endif
  984.  
  985. #if defined(HX8392A_DSI_CMD_FWVGA)
  986. "hx8392a_dsi_cmd_fwvga",
  987. #endif
  988.  
  989. #if defined(OTM9608_QHD_DSI_CMD)
  990. "otm9608a_qhd_dsi_cmd",
  991. #endif
  992.  
  993. #if defined(OTM9608_QHD_DSI_VDO)
  994. "otm9608a_qhd_dsi_vdo",
  995. #endif
  996.  
  997. #if defined(R63417_FHD_DSI_CMD_TRULY_NT50358)
  998. "r63417_fhd_dsi_cmd_truly_nt50358_drv",
  999. #endif
  1000.  
  1001. #if defined(R63419_WQHD_TRULY_PHANTOM_2K_CMD_OK)
  1002. "r63419_wqhd_truly_phantom_2k_cmd_ok",
  1003. #endif
  1004. };
  1005.  
  1006. #define LCM_COMPILE_ASSERT(condition) LCM_COMPILE_ASSERT_X(condition, __LINE__)
  1007. #define LCM_COMPILE_ASSERT_X(condition, line) LCM_COMPILE_ASSERT_XX(condition, line)
  1008. #define LCM_COMPILE_ASSERT_XX(condition, line) char assertion_failed_at_line_##line[(condition) ? 1 : -1]
  1009.  
  1010. unsigned int lcm_count = sizeof(lcm_driver_list) / sizeof(LCM_DRIVER *);
  1011. LCM_COMPILE_ASSERT(0 != sizeof(lcm_driver_list) / sizeof(LCM_DRIVER *));
  1012. #if defined(NT35520_HD720_DSI_CMD_TM) | defined(NT35520_HD720_DSI_CMD_BOE) | \
  1013. defined(NT35521_HD720_DSI_VDO_BOE) | defined(NT35521_HD720_DSI_VIDEO_TM)
  1014. static unsigned char lcd_id_pins_value = 0xFF;
  1015.  
  1016. /**
  1017. * Function: which_lcd_module_triple
  1018. * Description: read LCD ID PIN status,could identify three status:highlowfloat
  1019. * Input: none
  1020. * Output: none
  1021. * Return: LCD ID1|ID0 value
  1022. * Others:
  1023. */
  1024. unsigned char which_lcd_module_triple(void)
  1025. {
  1026. unsigned char high_read0 = 0;
  1027. unsigned char low_read0 = 0;
  1028. unsigned char high_read1 = 0;
  1029. unsigned char low_read1 = 0;
  1030. unsigned char lcd_id0 = 0;
  1031. unsigned char lcd_id1 = 0;
  1032. unsigned char lcd_id = 0;
  1033. /*Solve Coverity scan warning : check return value*/
  1034. unsigned int ret = 0;
  1035.  
  1036. /*only recognise once*/
  1037. if (0xFF != lcd_id_pins_value)
  1038. return lcd_id_pins_value;
  1039.  
  1040. /*Solve Coverity scan warning : check return value*/
  1041. ret = mt_set_gpio_mode(GPIO_DISP_ID0_PIN, GPIO_MODE_00);
  1042. if (0 != ret)
  1043. LCD_DEBUG("ID0 mt_set_gpio_mode fail\n");
  1044.  
  1045. ret = mt_set_gpio_dir(GPIO_DISP_ID0_PIN, GPIO_DIR_IN);
  1046. if (0 != ret)
  1047. LCD_DEBUG("ID0 mt_set_gpio_dir fail\n");
  1048.  
  1049. ret = mt_set_gpio_pull_enable(GPIO_DISP_ID0_PIN, GPIO_PULL_ENABLE);
  1050. if (0 != ret)
  1051. LCD_DEBUG("ID0 mt_set_gpio_pull_enable fail\n");
  1052.  
  1053. ret = mt_set_gpio_mode(GPIO_DISP_ID1_PIN, GPIO_MODE_00);
  1054. if (0 != ret)
  1055. LCD_DEBUG("ID1 mt_set_gpio_mode fail\n");
  1056.  
  1057. ret = mt_set_gpio_dir(GPIO_DISP_ID1_PIN, GPIO_DIR_IN);
  1058. if (0 != ret)
  1059. LCD_DEBUG("ID1 mt_set_gpio_dir fail\n");
  1060.  
  1061. ret = mt_set_gpio_pull_enable(GPIO_DISP_ID1_PIN, GPIO_PULL_ENABLE);
  1062. if (0 != ret)
  1063. LCD_DEBUG("ID1 mt_set_gpio_pull_enable fail\n");
  1064.  
  1065. /*pull down ID0 ID1 PIN*/
  1066. ret = mt_set_gpio_pull_select(GPIO_DISP_ID0_PIN, GPIO_PULL_DOWN);
  1067. if (0 != ret)
  1068. LCD_DEBUG("ID0 mt_set_gpio_pull_select->Down fail\n");
  1069.  
  1070. ret = mt_set_gpio_pull_select(GPIO_DISP_ID1_PIN, GPIO_PULL_DOWN);
  1071. if (0 != ret)
  1072. LCD_DEBUG("ID1 mt_set_gpio_pull_select->Down fail\n");
  1073.  
  1074. /* delay 100ms , for discharging capacitance*/
  1075. mdelay(100);
  1076. /* get ID0 ID1 status*/
  1077. low_read0 = mt_get_gpio_in(GPIO_DISP_ID0_PIN);
  1078. low_read1 = mt_get_gpio_in(GPIO_DISP_ID1_PIN);
  1079. /* pull up ID0 ID1 PIN */
  1080. ret = mt_set_gpio_pull_select(GPIO_DISP_ID0_PIN, GPIO_PULL_UP);
  1081. if (0 != ret)
  1082. LCD_DEBUG("ID0 mt_set_gpio_pull_select->UP fail\n");
  1083.  
  1084. ret = mt_set_gpio_pull_select(GPIO_DISP_ID1_PIN, GPIO_PULL_UP);
  1085. if (0 != ret)
  1086. LCD_DEBUG("ID1 mt_set_gpio_pull_select->UP fail\n");
  1087.  
  1088. /* delay 100ms , for charging capacitance */
  1089. mdelay(100);
  1090. /* get ID0 ID1 status */
  1091. high_read0 = mt_get_gpio_in(GPIO_DISP_ID0_PIN);
  1092. high_read1 = mt_get_gpio_in(GPIO_DISP_ID1_PIN);
  1093.  
  1094. if (low_read0 != high_read0) {
  1095. /*float status , pull down ID0 ,to prevent electric leakage*/
  1096. ret = mt_set_gpio_pull_select(GPIO_DISP_ID0_PIN, GPIO_PULL_DOWN);
  1097. if (0 != ret)
  1098. LCD_DEBUG("ID0 mt_set_gpio_pull_select->Down fail\n");
  1099.  
  1100. lcd_id0 = LCD_HW_ID_STATUS_FLOAT;
  1101. } else if ((LCD_HW_ID_STATUS_LOW == low_read0) && (LCD_HW_ID_STATUS_LOW == high_read0)) {
  1102. /*low status , pull down ID0 ,to prevent electric leakage*/
  1103. ret = mt_set_gpio_pull_select(GPIO_DISP_ID0_PIN, GPIO_PULL_DOWN);
  1104. if (0 != ret)
  1105. LCD_DEBUG("ID0 mt_set_gpio_pull_select->Down fail\n");
  1106.  
  1107. lcd_id0 = LCD_HW_ID_STATUS_LOW;
  1108. } else if ((LCD_HW_ID_STATUS_HIGH == low_read0) && (LCD_HW_ID_STATUS_HIGH == high_read0)) {
  1109. /*high status , pull up ID0 ,to prevent electric leakage*/
  1110. ret = mt_set_gpio_pull_select(GPIO_DISP_ID0_PIN, GPIO_PULL_UP);
  1111. if (0 != ret)
  1112. LCD_DEBUG("ID0 mt_set_gpio_pull_select->UP fail\n");
  1113.  
  1114. lcd_id0 = LCD_HW_ID_STATUS_HIGH;
  1115. } else {
  1116. LCD_DEBUG(" Read LCD_id0 error\n");
  1117. ret = mt_set_gpio_pull_select(GPIO_DISP_ID0_PIN, GPIO_PULL_DISABLE);
  1118. if (0 != ret)
  1119. LCD_DEBUG("ID0 mt_set_gpio_pull_select->Disbale fail\n");
  1120.  
  1121. lcd_id0 = LCD_HW_ID_STATUS_ERROR;
  1122. }
  1123.  
  1124.  
  1125. if (low_read1 != high_read1) {
  1126. /*float status , pull down ID1 ,to prevent electric leakage*/
  1127. ret = mt_set_gpio_pull_select(GPIO_DISP_ID1_PIN, GPIO_PULL_DOWN);
  1128. if (0 != ret)
  1129. LCD_DEBUG("ID1 mt_set_gpio_pull_select->Down fail\n");
  1130.  
  1131. lcd_id1 = LCD_HW_ID_STATUS_FLOAT;
  1132. } else if ((LCD_HW_ID_STATUS_LOW == low_read1) && (LCD_HW_ID_STATUS_LOW == high_read1)) {
  1133. /*low status , pull down ID1 ,to prevent electric leakage*/
  1134. ret = mt_set_gpio_pull_select(GPIO_DISP_ID1_PIN, GPIO_PULL_DOWN);
  1135. if (0 != ret)
  1136. LCD_DEBUG("ID1 mt_set_gpio_pull_select->Down fail\n");
  1137.  
  1138. lcd_id1 = LCD_HW_ID_STATUS_LOW;
  1139. } else if ((LCD_HW_ID_STATUS_HIGH == low_read1) && (LCD_HW_ID_STATUS_HIGH == high_read1)) {
  1140. /*high status , pull up ID1 ,to prevent electric leakage*/
  1141. ret = mt_set_gpio_pull_select(GPIO_DISP_ID1_PIN, GPIO_PULL_UP);
  1142. if (0 != ret)
  1143. LCD_DEBUG("ID1 mt_set_gpio_pull_select->UP fail\n");
  1144.  
  1145. lcd_id1 = LCD_HW_ID_STATUS_HIGH;
  1146. } else {
  1147.  
  1148. LCD_DEBUG(" Read LCD_id1 error\n");
  1149. ret = mt_set_gpio_pull_select(GPIO_DISP_ID1_PIN, GPIO_PULL_DISABLE);
  1150. if (0 != ret)
  1151. LCD_DEBUG("ID1 mt_set_gpio_pull_select->Disable fail\n");
  1152.  
  1153. lcd_id1 = LCD_HW_ID_STATUS_ERROR;
  1154. }
  1155. #ifdef BUILD_LK
  1156. dprintf(CRITICAL, "which_lcd_module_triple,lcd_id0:%d\n", lcd_id0);
  1157. dprintf(CRITICAL, "which_lcd_module_triple,lcd_id1:%d\n", lcd_id1);
  1158. #else
  1159. LCD_DEBUG("which_lcd_module_triple,lcd_id0:%d\n", lcd_id0);
  1160. LCD_DEBUG("which_lcd_module_triple,lcd_id1:%d\n", lcd_id1);
  1161. #endif
  1162. lcd_id = lcd_id0 | (lcd_id1 << 2);
  1163.  
  1164. #ifdef BUILD_LK
  1165. dprintf(CRITICAL, "which_lcd_module_triple,lcd_id:%d\n", lcd_id);
  1166. #else
  1167. LCD_DEBUG("which_lcd_module_triple,lcd_id:%d\n", lcd_id);
  1168. #endif
  1169.  
  1170. lcd_id_pins_value = lcd_id;
  1171. return lcd_id;
  1172. }
  1173. #endif
Advertisement
Add Comment
Please, Sign In to add comment
Advertisement