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dts not formatted still

Aug 28th, 2021
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  1. // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
  2. #include "qca955x.dtsi"
  3.  
  4. #include <dt-bindings/gpio/gpio.h>
  5. #include <dt-bindings/input/input.h>
  6.  
  7. / {
  8. compatible = "asus,rt-ac55u", "qca,qca9557";
  9. model = "ASUS RT-AC55U";
  10.  
  11. aliases {
  12. led-boot = &led_power;
  13. led-failsafe = &led_power;
  14. led-running = &led_power;
  15. led-upgrade = &led_power;
  16. };
  17.  
  18. keys {
  19. compatible = "gpio-keys";
  20.  
  21. reset {
  22. label = "reset";
  23. gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
  24. linux,code = <KEY_RESTART>;
  25. debounce-interval = <60>;
  26. };
  27. wps {
  28. label = "wps";
  29. gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
  30. linux,code = <KEY_WPS_BUTTON>;
  31. debounce-interval = <60>;
  32. };
  33. };
  34.  
  35. leds {
  36. compatible = "gpio-leds";
  37.  
  38. led_power: power {
  39. label = "blue:power";
  40. gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
  41. };
  42.  
  43.  
  44. wifi2g {
  45. label = "blue:wifi2g";
  46. gpios = <&gpio 13 GPIO_ACTIVE_HIGH>;
  47. linux,default-trigger = "phy1tpt";
  48. };
  49.  
  50.  
  51. wps {
  52. label = "blue:wps";
  53. gpios = <&gpio 20 GPIO_ACTIVE_LOW>;
  54. };
  55. };
  56. };
  57.  
  58. &nand {
  59. status="okay";
  60.  
  61. partitions {
  62. compatible="fixed-partitions";
  63. #address-cells = <1>;
  64. #size-cells = <1>;
  65.  
  66. partition@0 {
  67. label = "Bootloader";
  68. reg = <0x000000000000 0x000e0000>;
  69. };
  70. partition@000000100000 {
  71. label = "ubi";
  72. reg = <0x000000100000 0x07e00000>;
  73. };
  74. caldata: partition@000007f00000 {
  75. label = "caldata";
  76. reg = <0x000007f00000 0x00010000>;
  77. };
  78. };
  79. };
  80.  
  81. &wmac {
  82. status="okay";
  83. mtd-cal-data = <&caldata 0x1000>;
  84. };
  85. &pcie0 {
  86. status = "okay";
  87.  
  88. wifi@0,0 {
  89. compatible = "qcom,ath10k";
  90. reg = <0 0 0 0 0>;
  91. };
  92. };
  93.  
  94. &mdio0 {
  95. status = "okay";
  96.  
  97. phy17: ethernet-phy@11 {
  98. reg = <0x11>;
  99. phy-mode = "rgmii-id";
  100. };
  101.  
  102. switch0@1f {
  103. compatible = "qca,ar8327";
  104. reg = <0x1f>;
  105. qca,ar8327-initvals = <
  106. 0x04 0x87600000 /* PORT0 PAD MODE CTRL */
  107. 0x0c 0x00080080 /* PORT6 PAD MODE CTRL */
  108. 0x10 0x81000080 /* POWER_ON_STRAP */
  109. 0x50 0xffb7ffb7 /* LED_CTRL0 */
  110. 0x54 0xffb7ffb7 /* LED_CTRL1 */
  111. 0x58 0xffb7ffb7 /* LED_CTRL2 */
  112. 0x5c 0x03ffff00 /* LED_CTRL3 */
  113. 0x7c 0x0000007e /* PORT0_STATUS */
  114. 0x94 0x0000007e /* PORT6 STATUS */
  115. >;
  116. };
  117. };
  118.  
  119.  
  120. &mdio1 {
  121. status = "okay";
  122.  
  123. phy1: ethernet-phy@1 {
  124. reg = <1>;
  125. phy-mode = "sgmii";
  126. };
  127. };
  128.  
  129.  
  130. &eth0 {
  131. status = "okay";
  132.  
  133. pll-data = <0xa6000000 0x00000101 0x00001616>;
  134. phy-handle = <&phy17>;
  135.  
  136. fixed-link {
  137. speed = <1000>;
  138. full-duplex;
  139. };
  140. };
  141.  
  142. &eth1 {
  143. status = "okay";
  144.  
  145. fixed-link {
  146. speed = <1000>;
  147. full-duplex;
  148. };
  149. };
  150.  
  151.  
  152.  
  153. &pcie1 {
  154. status="okay";
  155. };
  156.  
  157. &usb_phy0 {
  158. status="okay";
  159. };
  160.  
  161. &usb0 {
  162. status="okay";
  163. };
  164.  
  165.  
  166.  
  167.  
  168.  
  169.  
  170.  
  171.  
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