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  1. $ litex/litex/boards/targets/versa_ecp5.py --gateware-toolchain trellis --yosys-nowidelut --csr-csv ./csr_ecp5versa.csv         --with-ethernet --sys-clk-freq=60e6 --cpu-type rocket --cpu-variant linux
  2.  
  3. Traceback (most recent call last):
  4.   File "litex/litex/boards/targets/versa_ecp5.py", line 151, in <module>
  5.     main()
  6.   File "litex/litex/boards/targets/versa_ecp5.py", line 146, in main
  7.     soc = cls(toolchain=args.toolchain, sys_clk_freq=int(float(args.sys_clk_freq)), **soc_sdram_argdict(args))
  8.   File "litex/litex/boards/targets/versa_ecp5.py", line 112, in __init__
  9.     BaseSoC.__init__(self, toolchain=toolchain, integrated_rom_size=0x10000, **kwargs)
  10.   File "litex/litex/boards/targets/versa_ecp5.py", line 85, in __init__
  11.     **kwargs)
  12.   File "/home/somlo/LITEX/litex/litex/soc/integration/soc_sdram.py", line 29, in __init__
  13.     SoCCore.__init__(self, platform, clk_freq, **kwargs)
  14.   File "/home/somlo/LITEX/litex/litex/soc/integration/soc_core.py", line 237, in __init__
  15.     self.submodules.uart_phy = uart.UARTPHY(platform.request(uart_name), clk_freq, uart_baudrate)
  16.   File "/home/somlo/LITEX/litex/litex/build/generic_platform.py", line 274, in request
  17.     return self.constraint_manager.request(*args, **kwargs)
  18.   File "/home/somlo/LITEX/litex/litex/build/generic_platform.py", line 182, in request
  19.     resource = _lookup(self.available, name, number)
  20.   File "/home/somlo/LITEX/litex/litex/build/generic_platform.py", line 89, in _lookup
  21.     raise ConstraintError("Resource not found: {}:{}".format(name, number))
  22. litex.build.generic_platform.ConstraintError: Resource not found: "serial":None
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