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- // DSPIC33FJ256MC710A Configuration Bit Settings
- // 'C' source line config statements
- // FBS
- #pragma config BWRP = WRPROTECT_OFF // Boot Segment Write Protect (Boot segment is write-protected)
- #pragma config BSS = SMALL_FLASH_STD // Boot Segment Program Flash Code Protection (Standard Security, Small-sized Boot Flash)
- #pragma config RBS = NO_RAM // Boot Segment RAM Protection (No Boot RAM)
- // FSS
- #pragma config SWRP = WRPROTECT_OFF // Secure Segment Program Write Protect (Secure Segment may be written)
- #pragma config SSS = NO_FLASH // Secure Segment Program Flash Code Protection (No Secure Segment)
- #pragma config RSS = NO_RAM // Secure Segment Data RAM Protection (No Secure RAM)
- // FGS
- #pragma config GWRP = OFF // General Code Segment Write Protect (User program memory is not write-protected)
- #pragma config GSS = OFF // General Segment Code Protection (User program memory is not code-protected)
- // FOSCSEL
- #pragma config FNOSC = LPRCDIVN // Oscillator Mode (Internal Fast RC (FRC) with divide by N)
- #pragma config IESO = ON // Two-speed Oscillator Start-Up Enable (Start up with FRC, then switch)
- // FOSC
- #pragma config POSCMD = NONE // Primary Oscillator Source (Primary Oscillator Disabled)
- #pragma config OSCIOFNC = OFF // OSC2 Pin Function (OSC2 pin has clock out function)
- #pragma config FCKSM = CSDCMD // Clock Switching and Monitor (Both Clock Switching and Fail-Safe Clock Monitor are disabled)
- // FWDT
- #pragma config WDTPOST = PS32768 // Watchdog Timer Postscaler (1:32,768)
- #pragma config WDTPRE = PR128 // WDT Prescaler (1:128)
- #pragma config PLLKEN = ON // PLL Lock Enable bit (Clock switch to PLL source will wait until the PLL lock signal is valid.)
- #pragma config WINDIS = OFF // Watchdog Timer Window (Watchdog Timer in Non-Window mode)
- #pragma config FWDTEN = ON // Watchdog Timer Enable (Watchdog timer always enabled)
- // FPOR
- #pragma config FPWRT = PWR128 // POR Timer Value (128ms)
- #pragma config LPOL = ON // Low-side PWM Output Polarity (Active High)
- #pragma config HPOL = ON // Motor Control PWM High Side Polarity bit (PWM module high side output pins have active-high output polarity)
- #pragma config PWMPIN = ON // Motor Control PWM Module Pin Mode bit (PWM module pins controlled by PORT register at device Reset)
- // FICD
- #pragma config ICS = PGD1 // Comm Channel Select (Communicate on PGC1/EMUC1 and PGD1/EMUD1)
- #pragma config JTAGEN = OFF // JTAG Port Enable (JTAG is Disabled)
- // #pragma config statements should precede project file includes.
- // Use project enums instead of #define for ON and OFF.
- #include <xc.h>
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