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  1. 00:52:36.250 -> NOTICE: CPU: STM32MP151AAC Rev.Z
  2. 00:52:36.250 -> NOTICE: Model: STMicroelectronics custom STM32CubeMX board - openstlinux-6.1-yocto-mickledore-mpu-v24.06.26
  3. 00:52:36.250 -> ERROR: nvmem node board_id not found
  4. 00:52:36.297 -> INFO: PMIC version = 0x21
  5. 00:52:36.390 -> WARNING: VDD unknown
  6. 00:52:36.390 -> INFO: Reset reason (0x15):
  7. 00:52:36.390 -> INFO: Power-on Reset (rst_por)
  8. 00:52:36.390 -> INFO: FCONF: Reading TB_FW firmware configuration file from: 0x2ffe2000
  9. 00:52:36.390 -> INFO: FCONF: Reading firmware configuration information for: stm32mp_io
  10. 00:52:36.390 -> INFO: FCONF: Reading firmware configuration information for: stm32mp_fuse
  11. 00:52:36.390 -> INFO: Using USB
  12. 00:52:36.390 -> INFO: Instance 2
  13. 00:52:36.390 -> INFO: Boot used partition fsbl1
  14. 00:52:36.390 -> NOTICE: BL2: v2.8-stm32mp1-r2.0(debug):fc5a7b038-dirty(fc5a7b03)
  15. 00:52:36.390 -> NOTICE: BL2: Built : 23:46:56, Aug 6 2024
  16. 00:52:36.390 -> INFO: BL2: Doing platform setup
  17. 00:52:36.390 -> INFO: RAM: DDR3-DDR3L 16bits 533000kHz
  18. 00:52:36.390 -> INFO: Memory size = 0x20000000 (512 MB)
  19. 00:52:36.390 -> INFO: DFU USB START...
  20. 00:52:38.084 -> INFO: phase ID :3, Manifestation 3 at c716471a
  21. 00:52:38.224 -> INFO: Send detach request
  22. 00:52:38.224 -> INFO: Receive DFU Detach
  23. 00:52:38.224 -> INFO: DFU USB STOP...
  24. 00:52:38.224 -> INFO: BL2: Loading image id 1
  25. 00:52:38.224 -> INFO: Loading image id=1 at address 0x2ffff000
  26. 00:52:38.224 -> INFO: Image id=1 loaded: 0x2ffff000 - 0x2ffff1ea
  27. 00:52:38.224 -> INFO: FCONF: Reading FW_CONFIG firmware configuration file from: 0x2ffff000
  28. 00:52:38.224 -> INFO: FCONF: Reading firmware configuration information for: dyn_cfg
  29. 00:52:38.224 -> INFO: FCONF: Reading firmware configuration information for: stm32mp1_firewall
  30. 00:52:38.224 -> INFO: BL2: Loading image id 4
  31. 00:52:38.224 -> INFO: Loading image id=4 at address 0xde000000
  32. 00:52:38.224 -> INFO: Image id=4 loaded: 0xde000000 - 0xde00001c
  33. 00:52:38.224 -> INFO: OPTEE ep=0xde000000
  34. 00:52:38.224 -> INFO: OPTEE header info:
  35. 00:52:38.224 -> INFO: magic=0x4554504f
  36. 00:52:38.224 -> INFO: version=0x2
  37. 00:52:38.224 -> INFO: arch=0x0
  38. 00:52:38.224 -> INFO: flags=0x0
  39. 00:52:38.224 -> INFO: nb_images=0x1
  40. 00:52:38.224 -> INFO: BL2: Loading image id 8
  41. 00:52:38.224 -> INFO: Loading image id=8 at address 0xde000000
  42. 00:52:38.224 -> INFO: Image id=8 loaded: 0xde000000 - 0xde037e08
  43. 00:52:38.224 -> INFO: BL2: Skip loading image id 9
  44. 00:52:38.224 -> INFO: BL2: Loading image id 2
  45. 00:52:38.224 -> INFO: Loading image id=2 at address 0xc0500000
  46. 00:52:38.224 -> INFO: Image id=2 loaded: 0xc0500000 - 0xc0513678
  47. 00:52:38.224 -> INFO: BL2: Skip loading image id 16
  48. 00:52:38.224 -> INFO: BL2: Loading image id 5
  49. 00:52:38.224 -> INFO: Loading image id=5 at address 0xc0100000
  50. 00:52:38.224 -> INFO: Image id=5 loaded: 0xc0100000 - 0xc0218f6c
  51. 00:52:38.224 -> NOTICE: BL2: Booting BL32
  52. 00:52:38.224 -> INFO: Entry point address = 0xde000000
  53. 00:52:38.224 -> INFO: SPSR = 0x1d3
  54. 00:52:38.224 -> I/TC: Early console on UART#4
  55. 00:52:38.599 -> D/TC:0 add_phys_mem:670 MCUSRAM_BASE type IO_SEC 0x30000000 size 0x00060000
  56. 00:52:38.599 -> D/TC:0 add_phys_mem:670 RETRAM_BASE type IO_SEC 0x38000000 size 0x00010000
  57. 00:52:38.599 -> D/TC:0 add_phys_mem:670 TEE_RAM_START type ROM_SEC 0xde000000 size 0x00200000
  58. 00:52:38.599 -> D/TC:0 add_phys_mem:670 DDR_BASE type RAM_NSEC 0xc0000000 size 0x00001000
  59. 00:52:38.599 -> D/TC:0 add_phys_mem:670 ROUNDDOWN(0xa0021000ul, CORE_MMU_PGDIR_SIZE) type IO_SEC 0xa0000000 size 0x00200000
  60. 00:52:38.599 -> D/TC:0 add_phys_mem:670 ROUNDDOWN(0x54000000, CORE_MMU_PGDIR_SIZE) type IO_SEC 0x54000000 size 0x00200000
  61. 00:52:38.599 -> D/TC:0 add_phys_mem:670 ROUNDDOWN(0x50000000, CORE_MMU_PGDIR_SIZE) type IO_SEC 0x50000000 size 0x00200000
  62. 00:52:38.599 -> D/TC:0 add_phys_mem:670 ROUNDDOWN(0x48000000, CORE_MMU_PGDIR_SIZE) type IO_SEC 0x48000000 size 0x01200000
  63. 00:52:38.599 -> D/TC:0 add_phys_mem:670 ROUNDDOWN(0x5c000000, CORE_MMU_PGDIR_SIZE) type IO_SEC 0x5c000000 size 0x00200000
  64. 00:52:38.599 -> D/TC:0 add_phys_mem:670 ROUNDDOWN(0x5a000000, CORE_MMU_PGDIR_SIZE) type IO_SEC 0x5a000000 size 0x00200000
  65. 00:52:38.599 -> D/TC:0 add_phys_mem:670 ROUNDDOWN(0x50020000, CORE_MMU_PGDIR_SIZE) type IO_SEC 0x50000000 size 0x00200000
  66. 00:52:38.599 -> D/TC:0 add_phys_mem:684 Physical mem map overlaps 0x50000000
  67. 00:52:38.599 -> D/TC:0 add_phys_mem:670 ROUNDDOWN(0x54000000, CORE_MMU_PGDIR_SIZE) type IO_NSEC 0x54000000 size 0x00200000
  68. 00:52:38.599 -> D/TC:0 add_phys_mem:670 ROUNDDOWN(0x50000000, CORE_MMU_PGDIR_SIZE) type IO_NSEC 0x50000000 size 0x00200000
  69. 00:52:38.599 -> D/TC:0 add_phys_mem:670 ROUNDDOWN(0x5c000000, CORE_MMU_PGDIR_SIZE) type IO_NSEC 0x5c000000 size 0x00200000
  70. 00:52:38.599 -> D/TC:0 add_phys_mem:670 ROUNDDOWN(0x5a000000, CORE_MMU_PGDIR_SIZE) type IO_NSEC 0x5a000000 size 0x00200000
  71. 00:52:38.599 -> D/TC:0 add_phys_mem:670 ROUNDDOWN(0x50020000, CORE_MMU_PGDIR_SIZE) type IO_NSEC 0x50000000 size 0x00200000
  72. 00:52:38.599 -> D/TC:0 add_phys_mem:684 Physical mem map overlaps 0x50000000
  73. 00:52:38.599 -> D/TC:0 add_phys_mem:670 ROUNDDOWN(0x44000000, CORE_MMU_PGDIR_SIZE) type IO_NSEC 0x44000000 size 0x00200000
  74. 00:52:38.599 -> D/TC:0 add_phys_mem:670 ROUNDDOWN(0x40000000, CORE_MMU_PGDIR_SIZE) type IO_NSEC 0x40000000 size 0x00200000
  75. 00:52:38.599 -> D/TC:0 add_phys_mem:670 TA_RAM_START type TA_RAM 0xde200000 size 0x01e00000
  76. 00:52:38.599 -> D/TC:0 add_phys_mem:670 VCORE_UNPG_RW_PA type TEE_RAM_RW 0xde037000 size 0x001c9000
  77. 00:52:38.599 -> D/TC:0 add_phys_mem:670 VCORE_UNPG_RX_PA type TEE_RAM_RX 0xde000000 size 0x00037000
  78. 00:52:38.599 -> D/TC:0 add_va_space:710 type RES_VASPACE size 0x00a00000
  79. 00:52:38.599 -> D/TC:0 add_va_space:710 type SHM_VASPACE size 0x02000000
  80. 00:52:38.599 -> D/TC:0 dump_mmap_table:837 type TA_RAM va 0xd6400000..0xd81fffff pa 0xde200000..0xdfffffff size 0x01e00000 (pgdir)
  81. 00:52:38.599 -> D/TC:0 dump_mmap_table:837 type ROM_SEC va 0xd8400000..0xd85fffff pa 0xde000000..0xde1fffff size 0x00200000 (pgdir)
  82. 00:52:38.599 -> D/TC:0 dump_mmap_table:837 type IO_SEC va 0xd8600000..0xd87fffff pa 0xa0000000..0xa01fffff size 0x00200000 (pgdir)
  83. 00:52:38.599 -> D/TC:0 dump_mmap_table:837 type IO_SEC va 0xd8800000..0xd89fffff pa 0x5c000000..0x5c1fffff size 0x00200000 (pgdir)
  84. 00:52:38.599 -> D/TC:0 dump_mmap_table:837 type IO_NSEC va 0xd8a00000..0xd8bfffff pa 0x5c000000..0x5c1fffff size 0x00200000 (pgdir)
  85. 00:52:38.599 -> D/TC:0 dump_mmap_table:837 type IO_NSEC va 0xd8c00000..0xd8dfffff pa 0x5a000000..0x5a1fffff size 0x00200000 (pgdir)
  86. 00:52:38.599 -> D/TC:0 dump_mmap_table:837 type IO_SEC va 0xd8e00000..0xd8ffffff pa 0x5a000000..0x5a1fffff size 0x00200000 (pgdir)
  87. 00:52:38.599 -> D/TC:0 dump_mmap_table:837 type IO_SEC va 0xd9000000..0xd91fffff pa 0x54000000..0x541fffff size 0x00200000 (pgdir)
  88. 00:52:38.599 -> D/TC:0 dump_mmap_table:837 type IO_NSEC va 0xd9200000..0xd93fffff pa 0x54000000..0x541fffff size 0x00200000 (pgdir)
  89. 00:52:38.599 -> D/TC:0 dump_mmap_table:837 type IO_NSEC va 0xd9400000..0xd95fffff pa 0x50000000..0x501fffff size 0x00200000 (pgdir)
  90. 00:52:38.599 -> D/TC:0 dump_mmap_table:837 type IO_SEC va 0xd9600000..0xd97fffff pa 0x50000000..0x501fffff size 0x00200000 (pgdir)
  91. 00:52:38.599 -> D/TC:0 dump_mmap_table:837 type IO_SEC va 0xd9800000..0xda9fffff pa 0x48000000..0x491fffff size 0x01200000 (pgdir)
  92. 00:52:38.599 -> D/TC:0 dump_mmap_table:837 type IO_NSEC va 0xdac00000..0xdadfffff pa 0x44000000..0x441fffff size 0x00200000 (pgdir)
  93. 00:52:38.741 -> D/TC:0 dump_mmap_table:837 type IO_NSEC va 0xdae00000..0xdaffffff pa 0x40000000..0x401fffff size 0x00200000 (pgdir)
  94. 00:52:38.741 -> D/TC:0 dump_mmap_table:837 type RES_VASPACE va 0xdb000000..0xdb9fffff pa 0x00000000..0x009fffff size 0x00a00000 (pgdir)
  95. 00:52:38.741 -> D/TC:0 dump_mmap_table:837 type SHM_VASPACE va 0xdbc00000..0xddbfffff pa 0x00000000..0x01ffffff size 0x02000000 (pgdir)
  96. 00:52:38.741 -> D/TC:0 dump_mmap_table:837 type RAM_NSEC va 0xddf8f000..0xddf8ffff pa 0xc0000000..0xc0000fff size 0x00001000 (smallpg)
  97. 00:52:38.741 -> D/TC:0 dump_mmap_table:837 type IO_SEC va 0xddf90000..0xddf9ffff pa 0x38000000..0x3800ffff size 0x00010000 (smallpg)
  98. 00:52:38.741 -> D/TC:0 dump_mmap_table:837 type IO_SEC va 0xddfa0000..0xddffffff pa 0x30000000..0x3005ffff size 0x00060000 (smallpg)
  99. 00:52:38.741 -> D/TC:0 dump_mmap_table:837 type TEE_RAM_RX va 0xde000000..0xde036fff pa 0xde000000..0xde036fff size 0x00037000 (smallpg)
  100. 00:52:38.741 -> D/TC:0 dump_mmap_table:837 type TEE_RAM_RW va 0xde037000..0xde1fffff pa 0xde037000..0xde1fffff size 0x001c9000 (smallpg)
  101. 00:52:38.741 -> D/TC:0 core_mmu_xlat_table_alloc:526 xlat tables used 1 / 10
  102. 00:52:38.741 -> D/TC:0 core_mmu_xlat_table_alloc:526 xlat tables used 2 / 10
  103. 00:52:38.741 -> D/TC:0 core_mmu_xlat_table_alloc:526 xlat tables used 3 / 10
  104. 00:52:38.788 -> I/TC:
  105. 00:52:38.788 -> I/TC: Embedded DTB found
  106. 00:52:38.882 -> D/TC:0 0 core_mmu_set_discovered_nsec_ddr:485 Non-secure memory range [0xc0000000 0xde000000]
  107. 00:52:38.882 -> D/TC:0 0 get_console_node_from_dt:72 No console directive from DTB
  108. 00:52:38.882 -> I/TC: OP-TEE version: 2867849ba-dev (gcc version 12.3.0 (GCC)) #3 Wed Aug 7 21:46:36 UTC 2024 arm
  109. 00:52:38.882 -> I/TC: WARNING: This OP-TEE configuration might be insecure!
  110. 00:52:38.882 -> I/TC: WARNING: Please check https://optee.readthedocs.io/en/latest/architecture/porting_guidelines.html
  111. 00:52:38.882 -> I/TC: Primary CPU initializing
  112. 00:52:38.882 -> D/TC:0 0 call_preinitcalls:21 level 2 mobj_mapped_shm_init()
  113. 00:52:38.882 -> D/TC:0 0 mobj_mapped_shm_init:463 Shared memory address range: dbc00000, ddc00000
  114. 00:52:38.882 -> D/TC:0 0 call_initcalls:40 level 1 register_time_source()
  115. 00:52:38.882 -> D/TC:0 0 call_initcalls:40 level 1 initialize_bsec()
  116. 00:52:39.164 -> D/TC:0 0 save_dt_nvmem_layout:875 nvmem[1] = cfg0_otp 0bit offset: 0, length: 8
  117. 00:52:39.164 -> D/TC:0 0 save_dt_nvmem_layout:875 nvmem[2] = part_number_otp 1bit offset: 0, length: 8
  118. 00:52:39.164 -> D/TC:0 0 save_dt_nvmem_layout:875 nvmem[3] = monotonic_otp 4bit offset: 0, length: 32
  119. 00:52:39.164 -> D/TC:0 0 save_dt_nvmem_layout:875 nvmem[4] = nand_otp 9bit offset: 0, length: 32
  120. 00:52:39.164 -> D/TC:0 0 save_dt_nvmem_layout:875 nvmem[5] = uid_otp 13bit offset: 0, length: 96
  121. 00:52:39.164 -> D/TC:0 0 save_dt_nvmem_layout:875 nvmem[6] = package_otp 16bit offset: 0, length: 32
  122. 00:52:39.164 -> D/TC:0 0 save_dt_nvmem_layout:875 nvmem[7] = hw2_otp 18bit offset: 0, length: 32
  123. 00:52:39.164 -> D/TC:0 0 save_dt_nvmem_layout:875 nvmem[8] = calib 23bit offset: 0, length: 16
  124. 00:52:39.164 -> D/TC:0 0 save_dt_nvmem_layout:875 nvmem[9] = calib 23bit offset: 16, length: 16
  125. 00:52:39.164 -> D/TC:0 0 save_dt_nvmem_layout:875 nvmem[10] = pkh_otp 24bit offset: 0, length: 256
  126. 00:52:39.164 -> D/TC:0 0 save_dt_nvmem_layout:875 nvmem[11] = mac 57bit offset: 0, length: 64
  127. 00:52:39.164 -> D/TC:0 0 call_initcalls:40 level 1 clk_dt_probe()
  128. 00:52:39.164 -> D/TC:0 0 clk_dt_probe:202 Probing clocks from devicetree
  129. 00:52:39.164 -> D/TC:0 0 clk_register:126 Registered clock clk-hse, freq 24000000
  130. 00:52:39.164 -> D/TC:0 0 probe_driver_node:443 element: fixed_clock on node clk-hse initialized
  131. 00:52:39.164 -> D/TC:0 0 clk_register:126 Registered clock clk-hsi, freq 64000000
  132. 00:52:39.164 -> D/TC:0 0 probe_driver_node:443 element: fixed_clock on node clk-hsi initialized
  133. 00:52:39.164 -> D/TC:0 0 clk_register:126 Registered clock clk-lse, freq 32768
  134. 00:52:39.164 -> D/TC:0 0 probe_driver_node:443 element: fixed_clock on node clk-lse initialized
  135. 00:52:39.164 -> D/TC:0 0 clk_register:126 Registered clock clk-lsi, freq 32000
  136. 00:52:39.164 -> D/TC:0 0 probe_driver_node:443 element: fixed_clock on node clk-lsi initialized
  137. 00:52:39.164 -> D/TC:0 0 clk_register:126 Registered clock clk-csi, freq 4000000
  138. 00:52:39.164 -> D/TC:0 0 probe_driver_node:443 element: fixed_clock on node clk-csi initialized
  139. 00:52:39.539 -> D/TC:0 0 clk_register:126 Registered clock (null), freq 266500000
  140. 00:52:39.539 -> D/TC:0 0 clk_register:126 Registered clock (null), freq 266500000
  141. 00:52:39.539 -> D/TC:0 0 clk_register:126 Registered clock (null), freq 266500000
  142. 00:52:39.539 -> D/TC:0 0 clk_register:126 Registered clock (null), freq 266500000
  143. 00:52:39.539 -> D/TC:0 0 clk_register:126 Registered clock (null), freq 533000000
  144. 00:52:39.539 -> D/TC:0 0 clk_register:126 Registered clock (null), freq 533000000
  145. 00:52:39.539 -> D/TC:0 0 clk_register:126 Registered clock (null), freq 133250000
  146. 00:52:39.539 -> D/TC:0 0 clk_register:126 Registered clock (null), freq 133250000
  147. 00:52:39.539 -> D/TC:0 0 clk_register:126 Registered clock (null), freq 266500000
  148. 00:52:39.539 -> D/TC:0 0 clk_register:126 Registered clock (null), freq 133250000
  149. 00:52:39.539 -> D/TC:0 0 clk_register:126 Registered clock (null), freq 133250000
  150. 00:52:39.539 -> D/TC:0 0 clk_register:126 Registered clock spi6, freq 66625000
  151. 00:52:39.539 -> D/TC:0 0 clk_register:126 Registered clock i2c4, freq 64000000
  152. 00:52:39.539 -> D/TC:0 0 clk_register:126 Registered clock i2c6, freq 64000000
  153. 00:52:39.539 -> D/TC:0 0 clk_register:126 Registered clock usart1, freq 66625000
  154. 00:52:39.539 -> D/TC:0 0 clk_register:126 Registered clock rtcapb, freq 66625000
  155. 00:52:39.539 -> D/TC:0 0 clk_register:126 Registered clock (null), freq 66625000
  156. 00:52:39.539 -> D/TC:0 0 clk_register:126 Registered clock (null), freq 66625000
  157. 00:52:39.539 -> D/TC:0 0 clk_register:126 Registered clock (null), freq 66625000
  158. 00:52:39.539 -> D/TC:0 0 clk_register:126 Registered clock iwdg, freq 66625000
  159. 00:52:39.539 -> D/TC:0 0 clk_register:126 Registered clock (null), freq 66625000
  160. 00:52:39.539 -> D/TC:0 0 clk_register:126 Registered clock (null), freq 24000000
  161. 00:52:39.539 -> D/TC:0 0 clk_register:126 Registered clock gpioz, freq 266500000
  162. 00:52:39.539 -> D/TC:0 0 clk_register:126 Registered clock crpy1, freq 266500000
  163. 00:52:39.539 -> D/TC:0 0 clk_register:126 Registered clock hash1, freq 266500000
  164. 00:52:39.539 -> D/TC:0 0 clk_register:126 Registered clock rng1, freq 4000000
  165. 00:52:39.539 -> D/TC:0 0 clk_register:126 Registered clock bkpsram, freq 266500000
  166. 00:52:39.539 -> D/TC:0 0 clk_register:126 Registered clock (null), freq 266500000
  167. 00:52:39.539 -> D/TC:0 0 clk_register:126 Registered clock rtc, freq 32768
  168. 00:52:39.539 -> D/TC:0 0 clk_register:126 Registered clock gpioa, freq 0
  169. 00:52:39.539 -> D/TC:0 0 clk_register:126 Registered clock gpiob, freq 0
  170. 00:52:39.539 -> D/TC:0 0 clk_register:126 Registered clock gpioc, freq 0
  171. 00:52:39.539 -> D/TC:0 0 clk_register:126 Registered clock gpiod, freq 0
  172. 00:52:39.539 -> D/TC:0 0 clk_register:126 Registered clock gpioe, freq 0
  173. 00:52:39.539 -> D/TC:0 0 clk_register:126 Registered clock gpiof, freq 0
  174. 00:52:39.539 -> D/TC:0 0 clk_register:126 Registered clock gpiog, freq 0
  175. 00:52:39.539 -> D/TC:0 0 clk_register:126 Registered clock gpioh, freq 0
  176. 00:52:39.539 -> D/TC:0 0 clk_register:126 Registered clock gpioi, freq 0
  177. 00:52:39.539 -> D/TC:0 0 clk_register:126 Registered clock gpioj, freq 0
  178. 00:52:39.539 -> D/TC:0 0 clk_register:126 Registered clock gpiok, freq 0
  179. 00:52:39.539 -> D/TC:0 0 clk_register:126 Registered clock (null), freq 208877928
  180. 00:52:39.539 -> D/TC:0 0 clk_register:126 Registered clock (null), freq 64000000
  181. 00:52:39.539 -> D/TC:0 0 clk_register:126 Registered clock (null), freq 64000000
  182. 00:52:39.539 -> D/TC:0 0 clk_register:126 Registered clock (null), freq 64000000
  183. 00:52:39.539 -> D/TC:0 0 clk_register:126 Registered clock (null), freq 64000000
  184. 00:52:39.539 -> D/TC:0 0 clk_register:126 Registered clock (null), freq 64000000
  185. 00:52:39.539 -> D/TC:0 0 clk_register:126 Registered clock (null), freq 64000000
  186. 00:52:39.539 -> D/TC:0 0 clk_register:126 Registered clock (null), freq 208877928
  187. 00:52:39.539 -> D/TC:0 0 clk_register:126 Registered clock (null), freq 64000000
  188. 00:52:39.539 -> D/TC:0 0 clk_register:126 Registered clock syscfg, freq 0
  189. 00:52:39.539 -> D/TC:0 0 clk_register:126 Registered clock (null), freq 0
  190. 00:52:39.539 -> D/TC:0 0 clk_register:126 Registered clock (null), freq 0
  191. 00:52:39.539 -> D/TC:0 0 clk_register:126 Registered clock dbg, freq 0
  192. 00:52:39.539 -> D/TC:0 0 clk_register:126 Registered clock hse, freq 24000000
  193. 00:52:39.539 -> D/TC:0 0 clk_register:126 Registered clock csi, freq 4000000
  194. 00:52:39.539 -> D/TC:0 0 clk_register:126 Registered clock lsi, freq 32000
  195. 00:52:39.539 -> D/TC:0 0 clk_register:126 Registered clock lse, freq 32768
  196. 00:52:39.539 -> D/TC:0 0 clk_register:126 Registered clock hsi, freq 64000000
  197. 00:52:39.539 -> D/TC:0 0 clk_register:126 Registered clock (null), freq 12000000
  198. 00:52:39.539 -> D/TC:0 0 clk_register:126 Registered clock (null), freq 650000000
  199. 00:52:39.539 -> D/TC:0 0 clk_register:126 Registered clock (null), freq 650000000
  200. 00:52:39.539 -> D/TC:0 0 clk_register:126 Registered clock (null), freq 650000000
  201. 00:52:39.539 -> D/TC:0 0 clk_register:126 Registered clock (null), freq 266500000
  202. 00:52:39.632 -> D/TC:0 0 clk_register:126 Registered clock pll2q, freq 266500000
  203. 00:52:39.632 -> D/TC:0 0 clk_register:126 Registered clock pll2r, freq 533000000
  204. 00:52:39.632 -> D/TC:0 0 clk_register:126 Registered clock (null), freq 208877929
  205. 00:52:39.632 -> D/TC:0 0 clk_register:126 Registered clock pll3q, freq 24573874
  206. 00:52:39.632 -> D/TC:0 0 clk_register:126 Registered clock pll3r, freq 11290698
  207. 00:52:39.632 -> D/TC:0 0 clk_register:126 Registered clock (null), freq 266500000
  208. 00:52:39.632 -> D/TC:0 0 clk_register:126 Registered clock (null), freq 64000000
  209. 00:52:39.632 -> D/TC:0 0 clk_register:126 Registered clock mcu, freq 208877929
  210. 00:52:39.632 -> D/TC:0 0 probe_driver_node:443 element: stm32mp1_clock on node rcc@50000000 initialized
  211. 00:52:39.914 -> D/TC:0 0 call_initcalls:40 level 2 init_debug()
  212. 00:52:39.914 -> D/TC:0 0 stm32_bsec_find_otp_in_nvmem_layout:644 nvmem cfg0_otp = 0: 0 bit offset: 0, length: 8
  213. 00:52:39.914 -> I/TC: WARNING: All debug access are allowed
  214. 00:52:39.914 -> D/TC:0 0 call_initcalls:40 level 2 provisioning_probe()
  215. 00:52:40.008 -> D/TC:0 0 call_initcalls:40 level 2 probe_dt_drivers_early()
  216. 00:52:40.008 -> D/TC:0 0 add_node_to_probe:641 element: stm32-cpu-opp on node cpu0-opp-table
  217. 00:52:40.008 -> D/TC:0 0 add_node_to_probe:641 element: simple-bus on node soc
  218. 00:52:40.008 -> D/TC:0 0 add_node_to_probe:641 element: simple-bus on node ahb
  219. 00:52:40.008 -> D/TC:0 0 probe_driver_node:443 element: simple-bus on node ahb initialized
  220. 00:52:40.055 -> D/TC:0 0 add_node_to_probe:641 element: stm32mp15_rstctrl on node rcc@50000000
  221. 00:52:40.055 -> D/TC:0 0 add_node_to_probe:641 element: stm32mp1-pwr-regu on node pwr@50001000
  222. 00:52:40.150 -> D/TC:0 0 add_node_to_probe:641 element: stm32-rtc on node rtc@5c004000
  223. 00:52:40.150 -> D/TC:0 0 add_node_to_probe:641 element: stm32mp1-tzc400 on node tzc@5c006000
  224. 00:52:40.150 -> D/TC:0 0 add_node_to_probe:641 element: stm32-tamp on node tamp@5c00a000
  225. 00:52:40.150 -> D/TC:0 0 add_node_to_probe:641 element: stm32_gpio on node pin-controller@50002000
  226. 00:52:40.150 -> D/TC:0 0 add_node_to_probe:641 element: stm32_gpio on node pin-controller-z@54004000
  227. 00:52:40.150 -> D/TC:0 0 add_node_to_probe:641 element: stm32-etzpc on node etzpc@5c007000
  228. 00:52:40.150 -> D/TC:0 0 probe_driver_node:443 element: simple-bus on node soc initialized
  229. 00:52:40.150 -> D/TC:0 0 probe_driver_node:449 element: stm32-cpu-opp on node cpu0-opp-table deferred 1 time(s)
  230. 00:52:40.150 -> D/TC:0 0 probe_driver_node:449 element: stm32-cpu-opp on node cpu0-opp-table deferred 2 time(s)
  231. 00:52:40.197 -> D/TC:0 0 stm32_etzpc_set_driverdata:517 ETZPC revision 0x32, per_sec 96, ahb_sec 0, tzma 2
  232. 00:52:40.338 -> D/TC:0 0 probe_driver_node:443 element: stm32-etzpc on node etzpc@5c007000 initialized
  233. 00:52:40.431 -> D/TC:0 0 _fdt_stm32_gpio_controller:930 Bank name gpio@54004000
  234. 00:52:40.431 -> D/TC:0 0 _fdt_stm32_gpio_controller:982 GPIO bank Z assigned to non-secure
  235. 00:52:40.431 -> D/TC:0 0 stm32_gpio_parse_pinctrl_node:1146 Registered GPIO bank Z (8 pins) @d9004000
  236. 00:52:40.431 -> D/TC:0 0 probe_driver_node:443 element: stm32_gpio on node pin-controller-z@54004000 initialized
  237. 00:52:40.478 -> D/TC:0 0 _fdt_stm32_gpio_controller:930 Bank name gpio@50002000
  238. 00:52:40.478 -> D/TC:0 0 stm32_gpio_parse_pinctrl_node:1146 Registered GPIO bank A (16 pins) @d9402000
  239. 00:52:40.574 -> D/TC:0 0 _fdt_stm32_gpio_controller:930 Bank name gpio@50003000
  240. 00:52:40.574 -> D/TC:0 0 stm32_gpio_parse_pinctrl_node:1146 Registered GPIO bank B (16 pins) @d9403000
  241. 00:52:40.669 -> D/TC:0 0 _fdt_stm32_gpio_controller:930 Bank name gpio@50004000
  242. 00:52:40.669 -> D/TC:0 0 stm32_gpio_parse_pinctrl_node:1146 Registered GPIO bank C (16 pins) @d9404000
  243. 00:52:40.717 -> D/TC:0 0 _fdt_stm32_gpio_controller:930 Bank name gpio@50005000
  244. 00:52:40.717 -> D/TC:0 0 stm32_gpio_parse_pinctrl_node:1146 Registered GPIO bank D (16 pins) @d9405000
  245. 00:52:40.811 -> D/TC:0 0 _fdt_stm32_gpio_controller:930 Bank name gpio@50006000
  246. 00:52:40.811 -> D/TC:0 0 stm32_gpio_parse_pinctrl_node:1146 Registered GPIO bank E (16 pins) @d9406000
  247. 00:52:40.966 -> D/TC:0 0 _fdt_stm32_gpio_controller:930 Bank name gpio@50007000
  248. 00:52:40.966 -> D/TC:0 0 stm32_gpio_parse_pinctrl_node:1146 Registered GPIO bank F (16 pins) @d9407000
  249. 00:52:41.031 -> D/TC:0 0 _fdt_stm32_gpio_controller:930 Bank name gpio@50008000
  250. 00:52:41.031 -> D/TC:0 0 stm32_gpio_parse_pinctrl_node:1146 Registered GPIO bank G (16 pins) @d9408000
  251. 00:52:41.066 -> D/TC:0 0 _fdt_stm32_gpio_controller:930 Bank name gpio@50009000
  252. 00:52:41.066 -> D/TC:0 0 stm32_gpio_parse_pinctrl_node:1146 Registered GPIO bank H (16 pins) @d9409000
  253. 00:52:41.159 -> D/TC:0 0 _fdt_stm32_gpio_controller:930 Bank name gpio@5000a000
  254. 00:52:41.159 -> D/TC:0 0 stm32_gpio_parse_pinctrl_node:1146 Registered GPIO bank I (12 pins) @d940a000
  255. 00:52:41.159 -> D/TC:0 0 probe_driver_node:443 element: stm32_gpio on node pin-controller@50002000 initialized
  256. 00:52:41.159 -> D/TC:0 0 probe_driver_node:449 element: stm32-tamp on node tamp@5c00a000 deferred 1 time(s)
  257. 00:52:41.488 -> D/TC:0 0 tzc_set_driverdata:124 TZC400 Filters 2 Regions 8
  258. 00:52:41.488 -> D/TC:0 0 add_carved_out_nsec:382 0xc0000000 - 0xddffffff : Sec access 0 NS access 0x87fb87fb
  259. 00:52:41.488 -> D/TC:0 0 tzc_dump_state:473 region 0
  260. 00:52:41.488 -> D/TC:0 0 tzc_dump_state:476 region_base: 0x0000000000000000
  261. 00:52:41.488 -> D/TC:0 0 tzc_dump_state:479 region_top: 0x00000000ffffffff
  262. 00:52:41.488 -> D/TC:0 0 tzc_dump_state:481 secure rw: TZC_REGION_S_NONE
  263. 00:52:41.488 -> D/TC:0 0 tzc_dump_state:486 filter 0 enable
  264. 00:52:41.488 -> D/TC:0 0 tzc_dump_state:486 filter 1 enable
  265. 00:52:41.488 -> D/TC:0 0 tzc_dump_state:473 region 1
  266. 00:52:41.488 -> D/TC:0 0 tzc_dump_state:476 region_base: 0x00000000de000000
  267. 00:52:41.488 -> D/TC:0 0 tzc_dump_state:479 region_top: 0x00000000dfffffff
  268. 00:52:41.488 -> D/TC:0 0 tzc_dump_state:481 secure rw: TZC_REGION_S_RDWR
  269. 00:52:41.488 -> D/TC:0 0 tzc_dump_state:486 filter 0 enable
  270. 00:52:41.488 -> D/TC:0 0 tzc_dump_state:486 filter 1 enable
  271. 00:52:41.488 -> D/TC:0 0 tzc_dump_state:473 region 2
  272. 00:52:41.488 -> D/TC:0 0 tzc_dump_state:476 region_base: 0x00000000c0000000
  273. 00:52:41.488 -> D/TC:0 0 tzc_dump_state:479 region_top: 0x00000000ddffffff
  274. 00:52:41.488 -> D/TC:0 0 tzc_dump_state:481 secure rw: TZC_REGION_S_NONE
  275. 00:52:41.488 -> D/TC:0 0 tzc_dump_state:486 filter 0 enable
  276. 00:52:41.488 -> D/TC:0 0 tzc_dump_state:486 filter 1 enable
  277. 00:52:41.488 -> D/TC:0 0 gic_it_set_cpu_mask:350 cpu_mask: writing 0xff to 0xd8621824
  278. 00:52:41.488 -> D/TC:0 0 gic_it_set_cpu_mask:352 cpu_mask: 0x3
  279. 00:52:41.488 -> D/TC:0 0 gic_it_set_prio:361 prio: writing 0x1 to 0xd8621424
  280. 00:52:41.488 -> D/TC:0 0 probe_driver_node:443 element: stm32mp1-tzc400 on node tzc@5c006000 initialized
  281. 00:52:41.535 -> D/TC:0 0 probe_driver_node:443 element: stm32-rtc on node rtc@5c004000 initialized
  282. 00:52:41.582 -> D/TC:0 0 probe_driver_node:443 element: stm32mp1-pwr-regu on node pwr@50001000 initialized
  283. 00:52:41.628 -> D/TC:0 0 probe_driver_node:443 element: stm32mp15_rstctrl on node rcc@50000000 initialized
  284. 00:52:41.770 -> D/TC:0 0 probe_driver_node:449 element: stm32-tamp on node tamp@5c00a000 deferred 2 time(s)
  285. 00:52:41.770 -> D/TC:0 0 probe_driver_node:449 element: stm32-cpu-opp on node cpu0-opp-table deferred 3 time(s)
  286. 00:52:41.770 -> D/TC:0 0 process_probe_list:590 Unresolved dependencies after 3 rounds, 3 deferred
  287. 00:52:41.770 -> D/TC:0 0 probe_dt_drivers_early:774 Deferred drivers probing
  288. 00:52:41.770 -> D/TC:0 0 print_probe_list:397 Probe list: 2 elements
  289. 00:52:41.770 -> D/TC:0 0 print_probe_list:399 |- Driver stm32-tamp probes on node tamp@5c00a000
  290. 00:52:41.770 -> D/TC:0 0 print_probe_list:399 |- Driver stm32-cpu-opp probes on node cpu0-opp-table
  291. 00:52:41.770 -> D/TC:0 0 print_probe_list:403 `- Probe list end
  292. 00:52:41.770 -> D/TC:0 0 print_probe_list:409 Failed list: 0 elements
  293. 00:52:41.770 -> D/TC:0 0 print_probe_list:414 `- Failed list end
  294. 00:52:41.770 -> D/TC:0 0 call_initcalls:40 level 3 platform_banner()
  295. 00:52:41.770 -> I/TC: Platform stm32mp1: flavor PLATFORM_FLAVOR - DT stm32mp151a-stm32-computer-firmware-mx.dts
  296. 00:52:41.770 -> I/TC: OP-TEE ST profile: system_services
  297. 00:52:41.770 -> D/TC:0 0 call_initcalls:40 level 3 init_stm32mp1_calib()
  298. 00:52:41.770 -> D/TC:0 0 stm32mp_start_clock_calib:406 HSI clock calibration not supported
  299. 00:52:41.770 -> D/TC:0 0 stm32mp_start_clock_calib:408 CSI clock calibration not supported
  300. 00:52:41.770 -> D/TC:0 0 call_initcalls:40 level 3 verify_pseudo_tas_conformance()
  301. 00:52:41.770 -> D/TC:0 0 call_initcalls:40 level 3 mobj_init()
  302. 00:52:41.770 -> D/TC:0 0 call_initcalls:40 level 3 default_mobj_init()
  303. 00:52:41.770 -> D/TC:0 0 call_initcalls:40 level 3 tee_cryp_init()
  304. 00:52:41.770 -> D/TC:0 0 call_initcalls:40 level 4 init_console_from_dt()
  305. 00:52:41.864 -> D/TC:0 0 get_console_node_from_dt:72 No console directive from DTB
  306. 00:52:41.864 -> D/TC:0 0 get_console_node_from_dt:72 No console directive from DTB
  307. 00:52:41.864 -> D/TC:0 0 call_initcalls:40 level 5 stm32mp_syscfg_enable_io_compensation()
  308. 00:52:41.864 -> D/TC:0 0 call_initcalls:40 level 5 init_pm_support()
  309. 00:52:41.864 -> D/TC:0 0 call_initcalls:40 level 5 probe_dt_drivers()
  310. 00:52:41.864 -> D/TC:0 0 probe_driver_node:449 element: stm32-cpu-opp on node cpu0-opp-table deferred 4 time(s)
  311. 00:52:41.958 -> D/TC:0 0 stm32_tamp_parse_passive_conf:1608 Passive conf from dt: precharge=0, nb_sample=0, clk_div=32768
  312. 00:52:41.958 -> D/TC:0 0 stm32_tamp_parse_active_conf:1823 Active conf from dt: no filter clk_div=1
  313. 00:52:41.958 -> D/TC:0 0 gic_it_set_cpu_mask:350 cpu_mask: writing 0xff00 to 0xd86218e4
  314. 00:52:41.958 -> D/TC:0 0 gic_it_set_cpu_mask:352 cpu_mask: 0x300
  315. 00:52:41.958 -> D/TC:0 0 gic_it_set_prio:361 prio: writing 0x1 to 0xd86214e5
  316. 00:52:41.958 -> D/TC:0 0 add_node_to_probe:641 element: stm32_tamp_nvram on node nvram@5c00a100
  317. 00:52:41.958 -> D/TC:0 0 probe_driver_node:443 element: stm32-tamp on node tamp@5c00a000 initialized
  318. 00:52:42.287 -> D/TC:0 0 probe_driver_node:443 element: stm32_tamp_nvram on node nvram@5c00a100 initialized
  319. 00:52:42.287 -> D/TC:0 0 probe_driver_node:449 element: stm32-cpu-opp on node cpu0-opp-table deferred 5 time(s)
  320. 00:52:42.287 -> D/TC:0 0 probe_driver_node:449 element: stm32-cpu-opp on node cpu0-opp-table deferred 6 time(s)
  321. 00:52:42.287 -> D/TC:0 0 process_probe_list:590 Unresolved dependencies after 6 rounds, 6 deferred
  322. 00:52:42.287 -> E/TC:0 0 probe_dt_drivers:795 Probe sequence result: 0x80000000
  323. 00:52:42.287 -> D/TC:0 0 print_probe_list:397 Probe list: 1 elements
  324. 00:52:42.287 -> D/TC:0 0 print_probe_list:399 |- Driver stm32-cpu-opp probes on node cpu0-opp-table
  325. 00:52:42.287 -> D/TC:0 0 print_probe_list:403 `- Probe list end
  326. 00:52:42.287 -> D/TC:0 0 print_probe_list:409 Failed list: 0 elements
  327. 00:52:42.287 -> D/TC:0 0 print_probe_list:414 `- Failed list end
  328. 00:52:42.287 -> E/TC:0 0 Panic at core/kernel/dt_driver.c:797 <probe_dt_drivers>
  329. 00:52:42.287 -> E/TC:0 0 TEE load address @ 0xde000000
  330. 00:52:42.287 -> E/TC:0 0 Call stack:
  331. 00:52:42.287 -> E/TC:0 0 0xde002679
  332. 00:52:42.287 -> E/TC:0 0 0xde015517
  333. 00:52:42.287 -> E/TC:0 0 0xde0148bb
  334. 00:52:42.287 -> E/TC:0 0 0xde01602d
  335. 00:52:42.287 -> E/TC:0 0 0xde00243d
  336. 00:52:42.287 -> E/TC:0 0 0xde00019c
  337. 00:52:42.287 -> D/TC:0 0 stm32_bsec_find_otp_in_nvmem_layout:644 nvmem part_number_otp = 1: 1 bit offset: 0, length: 8
  338. 00:52:42.287 -> M/TC: CPU : 0
  339. 00:52:42.287 -> M/TC: usr_sp : 0x00000000
  340. 00:52:42.287 -> M/TC: usr_lr : 0x00000000
  341. 00:52:42.287 -> M/TC: irq_spsr : 0x00000000
  342. 00:52:42.287 -> M/TC: irq_sp : 0x00000000
  343. 00:52:42.287 -> M/TC: irq_lr : 0x00000000
  344. 00:52:42.287 -> M/TC: fiq_spsr : 0x00000000
  345. 00:52:42.287 -> M/TC: fiq_sp : 0x00000000
  346. 00:52:42.287 -> M/TC: fiq_lr : 0x00000000
  347. 00:52:42.287 -> M/TC: svc_spsr : 0x00000000
  348. 00:52:42.287 -> M/TC: svc_sp : 0x00000000
  349. 00:52:42.287 -> M/TC: svc_lr : 0x00000000
  350. 00:52:42.287 -> M/TC: abt_spsr : 0x00000000
  351. 00:52:42.287 -> M/TC: abt_sp : 0x00000000
  352. 00:52:42.287 -> M/TC: abt_lr : 0x00000000
  353. 00:52:42.287 -> M/TC: und_spsr : 0x00000000
  354. 00:52:42.287 -> M/TC: und_sp : 0x00000000
  355. 00:52:42.287 -> M/TC: und_lr : 0x00000000
  356. 00:52:42.287 -> M/TC: pmcr : 0x00000000
  357.  
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