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  1. /*
  2. **
  3. ** File: fmopl.c - software implementation of FM sound generator
  4. **                                            types OPL and OPL2
  5. **
  6. ** Copyright (C) 2002,2003 Jarek Burczynski (bujar at mame dot net)
  7. ** Copyright (C) 1999,2000 Tatsuyuki Satoh , MultiArcadeMachineEmulator development
  8. **
  9. ** Version 0.72
  10. **
  11.  
  12. Revision History:
  13.  
  14. 04-08-2003 Jarek Burczynski:
  15.  - removed BFRDY hack. BFRDY is busy flag, and it should be 0 only when the chip
  16.    handles memory read/write or during the adpcm synthesis when the chip
  17.    requests another byte of ADPCM data.
  18.  
  19. 24-07-2003 Jarek Burczynski:
  20.  - added a small hack for Y8950 status BFRDY flag (bit 3 should be set after
  21.    some (unknown) delay). Right now it's always set.
  22.  
  23. 14-06-2003 Jarek Burczynski:
  24.  - implemented all of the status register flags in Y8950 emulation
  25.  - renamed Y8950SetDeltaTMemory() parameters from _rom_ to _mem_ since
  26.    they can be either RAM or ROM
  27.  
  28. 08-10-2002 Jarek Burczynski (thanks to Dox for the YM3526 chip)
  29.  - corrected YM3526Read() to always set bit 2 and bit 1
  30.    to HIGH state - identical to YM3812Read (verified on real YM3526)
  31.  
  32. 04-28-2002 Jarek Burczynski:
  33.  - binary exact Envelope Generator (verified on real YM3812);
  34.    compared to YM2151: the EG clock is equal to internal_clock,
  35.    rates are 2 times slower and volume resolution is one bit less
  36.  - modified interface functions (they no longer return pointer -
  37.    that's internal to the emulator now):
  38.     - new wrapper functions for OPLCreate: YM3526Init(), YM3812Init() and Y8950Init()
  39.  - corrected 'off by one' error in feedback calculations (when feedback is off)
  40.  - enabled waveform usage (credit goes to Vlad Romascanu and zazzal22)
  41.  - speeded up noise generator calculations (Nicola Salmoria)
  42.  
  43. 03-24-2002 Jarek Burczynski (thanks to Dox for the YM3812 chip)
  44.  Complete rewrite (all verified on real YM3812):
  45.  - corrected sin_tab and tl_tab data
  46.  - corrected operator output calculations
  47.  - corrected waveform_select_enable register;
  48.    simply: ignore all writes to waveform_select register when
  49.    waveform_select_enable == 0 and do not change the waveform previously selected.
  50.  - corrected KSR handling
  51.  - corrected Envelope Generator: attack shape, Sustain mode and
  52.    Percussive/Non-percussive modes handling
  53.  - Envelope Generator rates are two times slower now
  54.  - LFO amplitude (tremolo) and phase modulation (vibrato)
  55.  - rhythm sounds phase generation
  56.  - white noise generator (big thanks to Olivier Galibert for mentioning Berlekamp-Massey algorithm)
  57.  - corrected key on/off handling (the 'key' signal is ORed from three sources: FM, rhythm and CSM)
  58.  - funky details (like ignoring output of operator 1 in BD rhythm sound when connect == 1)
  59.  
  60. 12-28-2001 Acho A. Tang
  61.  - reflected Delta-T EOS status on Y8950 status port.
  62.  - fixed subscription range of attack/decay tables
  63.  
  64.  
  65.     To do:
  66.         add delay before key off in CSM mode (see CSMKeyControll)
  67.         verify volume of the FM part on the Y8950
  68. */
  69.  
  70. #include <stdio.h>
  71. #include <stdlib.h>
  72. #include <math.h>
  73. #include <string.h>
  74.  
  75. //#include "driver.h"       /* use M.A.M.E. */
  76.  
  77. //#include "ymdeltat.h"
  78.  
  79. #include "fmopl.h"
  80.  
  81. #ifndef PI
  82. #define PI 3.14159265358979323846
  83. #endif
  84.  
  85. #ifdef _MSC_VER
  86. #  define INLINE __inline
  87. #elif defined(__GNUC__)
  88. #  define INLINE inline
  89. #else
  90. #  define INLINE
  91. #endif
  92.  
  93. /* output final shift */
  94. #if (OPL_SAMPLE_BITS==16)
  95.     #define FINAL_SH    (0)
  96.     #define MAXOUT      (+32767)
  97.     #define MINOUT      (-32768)
  98. #else
  99.     #define FINAL_SH    (8)
  100.     #define MAXOUT      (+127)
  101.     #define MINOUT      (-128)
  102. #endif
  103.  
  104.  
  105. #define FREQ_SH         16  /* 16.16 fixed point (frequency calculations) */
  106. #define EG_SH           16  /* 16.16 fixed point (EG timing)              */
  107. #define LFO_SH          24  /*  8.24 fixed point (LFO calculations)       */
  108. #define TIMER_SH        16  /* 16.16 fixed point (timers calculations)    */
  109.  
  110. #define FREQ_MASK       ((1<<FREQ_SH)-1)
  111.  
  112. /* envelope output entries */
  113. #define ENV_BITS        10
  114. #define ENV_LEN         (1<<ENV_BITS)
  115. #define ENV_STEP        (128.0/ENV_LEN)
  116.  
  117. #define MAX_ATT_INDEX   ((1<<(ENV_BITS-1))-1) /*511*/
  118. #define MIN_ATT_INDEX   (0)
  119.  
  120. /* sinwave entries */
  121. #define SIN_BITS        10
  122. #define SIN_LEN         (1<<SIN_BITS)
  123. #define SIN_MASK        (SIN_LEN-1)
  124.  
  125. #define TL_RES_LEN      (256)   /* 8 bits addressing (real chip) */
  126.  
  127.  
  128.  
  129. /* register number to channel number , slot offset */
  130. #define SLOT1 0
  131. #define SLOT2 1
  132.  
  133. /* Envelope Generator phases */
  134.  
  135. #define EG_ATT          4
  136. #define EG_DEC          3
  137. #define EG_SUS          2
  138. #define EG_REL          1
  139. #define EG_OFF          0
  140.  
  141.  
  142. /* save output as raw 16-bit sample */
  143.  
  144. /*#define SAVE_SAMPLE*/
  145.  
  146. #ifdef SAVE_SAMPLE
  147. INLINE signed int acc_calc(signed int value)
  148. {
  149.     if (value>=0)
  150.     {
  151.         if (value < 0x0200)
  152.             return (value & ~0);
  153.         if (value < 0x0400)
  154.             return (value & ~1);
  155.         if (value < 0x0800)
  156.             return (value & ~3);
  157.         if (value < 0x1000)
  158.             return (value & ~7);
  159.         if (value < 0x2000)
  160.             return (value & ~15);
  161.         if (value < 0x4000)
  162.             return (value & ~31);
  163.         return (value & ~63);
  164.     }
  165.     /*else value < 0*/
  166.     if (value > -0x0200)
  167.         return (~abs(value) & ~0);
  168.     if (value > -0x0400)
  169.         return (~abs(value) & ~1);
  170.     if (value > -0x0800)
  171.         return (~abs(value) & ~3);
  172.     if (value > -0x1000)
  173.         return (~abs(value) & ~7);
  174.     if (value > -0x2000)
  175.         return (~abs(value) & ~15);
  176.     if (value > -0x4000)
  177.         return (~abs(value) & ~31);
  178.     return (~abs(value) & ~63);
  179. }
  180.  
  181.  
  182. static FILE *sample[1];
  183.     #if 1   /*save to MONO file */
  184.         #define SAVE_ALL_CHANNELS \
  185.         {   signed int pom = acc_calc(lt); \
  186.             fputc((unsigned short)pom&0xff,sample[0]); \
  187.             fputc(((unsigned short)pom>>8)&0xff,sample[0]); \
  188.         }
  189.     #else   /*save to STEREO file */
  190.         #define SAVE_ALL_CHANNELS \
  191.         {   signed int pom = lt; \
  192.             fputc((unsigned short)pom&0xff,sample[0]); \
  193.             fputc(((unsigned short)pom>>8)&0xff,sample[0]); \
  194.             pom = rt; \
  195.             fputc((unsigned short)pom&0xff,sample[0]); \
  196.             fputc(((unsigned short)pom>>8)&0xff,sample[0]); \
  197.         }
  198.     #endif
  199. #endif
  200.  
  201. /* #define LOG_CYM_FILE */
  202. #ifdef LOG_CYM_FILE
  203.     FILE * cymfile = NULL;
  204. #endif
  205.  
  206.  
  207.  
  208. #define OPL_TYPE_WAVESEL   0x01  /* waveform select     */
  209. #define OPL_TYPE_ADPCM     0x02  /* DELTA-T ADPCM unit  */
  210. #define OPL_TYPE_KEYBOARD  0x04  /* keyboard interface  */
  211. #define OPL_TYPE_IO        0x08  /* I/O port            */
  212.  
  213. /* ---------- Generic interface section ---------- */
  214. #define OPL_TYPE_YM3526 (0)
  215. #define OPL_TYPE_YM3812 (OPL_TYPE_WAVESEL)
  216. #define OPL_TYPE_Y8950  (OPL_TYPE_ADPCM|OPL_TYPE_KEYBOARD|OPL_TYPE_IO)
  217.  
  218.  
  219.  
  220. typedef struct{
  221.     UINT32  ar;         /* attack rate: AR<<2           */
  222.     UINT32  dr;         /* decay rate:  DR<<2           */
  223.     UINT32  rr;         /* release rate:RR<<2           */
  224.     UINT8   KSR;        /* key scale rate               */
  225.     UINT8   ksl;        /* keyscale level               */
  226.     UINT8   ksr;        /* key scale rate: kcode>>KSR   */
  227.     UINT8   mul;        /* multiple: mul_tab[ML]        */
  228.  
  229.     /* Phase Generator */
  230.     UINT32  Cnt;        /* frequency counter            */
  231.     UINT32  Incr;       /* frequency counter step       */
  232.     UINT8   FB;         /* feedback shift value         */
  233.     INT32   *connect1;  /* slot1 output pointer         */
  234.     INT32   op1_out[2]; /* slot1 output for feedback    */
  235.     UINT8   CON;        /* connection (algorithm) type  */
  236.  
  237.     /* Envelope Generator */
  238.     UINT8   eg_type;    /* percussive/non-percussive mode */
  239.     UINT8   state;      /* phase type                   */
  240.     UINT32  TL;         /* total level: TL << 2         */
  241.     INT32   TLL;        /* adjusted now TL              */
  242.     INT32   volume;     /* envelope counter             */
  243.     UINT32  sl;         /* sustain level: sl_tab[SL]    */
  244.     UINT8   eg_sh_ar;   /* (attack state)               */
  245.     UINT8   eg_sel_ar;  /* (attack state)               */
  246.     UINT8   eg_sh_dr;   /* (decay state)                */
  247.     UINT8   eg_sel_dr;  /* (decay state)                */
  248.     UINT8   eg_sh_rr;   /* (release state)              */
  249.     UINT8   eg_sel_rr;  /* (release state)              */
  250.     UINT32  key;        /* 0 = KEY OFF, >0 = KEY ON     */
  251.  
  252.     /* LFO */
  253.     UINT32  AMmask;     /* LFO Amplitude Modulation enable mask */
  254.     UINT8   vib;        /* LFO Phase Modulation enable flag (active high)*/
  255.  
  256.     /* waveform select */
  257.     unsigned int wavetable;
  258. } OPL_SLOT;
  259.  
  260. typedef struct{
  261.     OPL_SLOT SLOT[2];
  262.     /* phase generator state */
  263.     UINT32  block_fnum; /* block+fnum                   */
  264.     UINT32  fc;         /* Freq. Increment base         */
  265.     UINT32  ksl_base;   /* KeyScaleLevel Base step      */
  266.     UINT8   kcode;      /* key code (for key scaling)   */
  267. } OPL_CH;
  268.  
  269. /* OPL state */
  270. typedef struct fm_opl_f {
  271.     /* FM channel slots */
  272.     OPL_CH  P_CH[9];                /* OPL/OPL2 chips have 9 channels*/
  273.  
  274.     UINT32  eg_cnt;                 /* global envelope generator counter    */
  275.     UINT32  eg_timer;               /* global envelope generator counter works at frequency = chipclock/72 */
  276.     UINT32  eg_timer_add;           /* step of eg_timer                     */
  277.     UINT32  eg_timer_overflow;      /* envelope generator timer overlfows every 1 sample (on real chip) */
  278.  
  279.     UINT8   rhythm;                 /* Rhythm mode                  */
  280.  
  281.     UINT32  fn_tab[1024];           /* fnumber->increment counter   */
  282.  
  283.     /* LFO */
  284.     UINT8   lfo_am_depth;
  285.     UINT8   lfo_pm_depth_range;
  286.     UINT32  lfo_am_cnt;
  287.     UINT32  lfo_am_inc;
  288.     UINT32  lfo_pm_cnt;
  289.     UINT32  lfo_pm_inc;
  290.  
  291.     UINT32  noise_rng;              /* 23 bit noise shift register  */
  292.     UINT32  noise_p;                /* current noise 'phase'        */
  293.     UINT32  noise_f;                /* current noise period         */
  294.  
  295.     UINT8   wavesel;                /* waveform select enable flag  */
  296.  
  297.     int     T[2];                   /* timer counters               */
  298.     UINT8   st[2];                  /* timer enable                 */
  299.  
  300. #if BUILD_Y8950
  301.     /* Delta-T ADPCM unit (Y8950) */
  302.  
  303.     YM_DELTAT *deltat;
  304.  
  305.     /* Keyboard and I/O ports interface */
  306.     UINT8   portDirection;
  307.     UINT8   portLatch;
  308.     OPL_PORTHANDLER_R porthandler_r;
  309.     OPL_PORTHANDLER_W porthandler_w;
  310.     void *  port_param;
  311.     OPL_PORTHANDLER_R keyboardhandler_r;
  312.     OPL_PORTHANDLER_W keyboardhandler_w;
  313.     void *  keyboard_param;
  314. #endif
  315.  
  316.     /* external event callback handlers */
  317.     OPL_TIMERHANDLER  TimerHandler; /* TIMER handler                */
  318.     void *TimerParam;                   /* TIMER parameter              */
  319.     OPL_IRQHANDLER    IRQHandler;   /* IRQ handler                  */
  320.     void *IRQParam;                 /* IRQ parameter                */
  321.     OPL_UPDATEHANDLER UpdateHandler;/* stream update handler        */
  322.     void *UpdateParam;              /* stream update parameter      */
  323.  
  324.     UINT8 type;                     /* chip type                    */
  325.     UINT8 address;                  /* address register             */
  326.     UINT8 status;                   /* status flag                  */
  327.     UINT8 statusmask;               /* status mask                  */
  328.     UINT8 mode;                     /* Reg.08 : CSM,notesel,etc.    */
  329.  
  330.     int clock;                      /* master clock  (Hz)           */
  331.     int rate;                       /* sampling rate (Hz)           */
  332.     double freqbase;                /* frequency base               */
  333.     double TimerBase;               /* Timer base time (==sampling time)*/
  334. } FM_OPL;
  335.  
  336.  
  337.  
  338. /* mapping of register number (offset) to slot number used by the emulator */
  339. static const int slot_array[32]=
  340. {
  341.      0, 2, 4, 1, 3, 5,-1,-1,
  342.      6, 8,10, 7, 9,11,-1,-1,
  343.     12,14,16,13,15,17,-1,-1,
  344.     -1,-1,-1,-1,-1,-1,-1,-1
  345. };
  346.  
  347. /* key scale level */
  348. /* table is 3dB/octave , DV converts this into 6dB/octave */
  349. /* 0.1875 is bit 0 weight of the envelope counter (volume) expressed in the 'decibel' scale */
  350. #define DV (0.1875/2.0)
  351. static const UINT32 ksl_tab[8*16]=
  352. {
  353.     /* OCT 0 */
  354.      0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
  355.      0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
  356.      0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
  357.      0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
  358.     /* OCT 1 */
  359.      0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
  360.      0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
  361.      0.000/DV, 0.750/DV, 1.125/DV, 1.500/DV,
  362.      1.875/DV, 2.250/DV, 2.625/DV, 3.000/DV,
  363.     /* OCT 2 */
  364.      0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
  365.      0.000/DV, 1.125/DV, 1.875/DV, 2.625/DV,
  366.      3.000/DV, 3.750/DV, 4.125/DV, 4.500/DV,
  367.      4.875/DV, 5.250/DV, 5.625/DV, 6.000/DV,
  368.     /* OCT 3 */
  369.      0.000/DV, 0.000/DV, 0.000/DV, 1.875/DV,
  370.      3.000/DV, 4.125/DV, 4.875/DV, 5.625/DV,
  371.      6.000/DV, 6.750/DV, 7.125/DV, 7.500/DV,
  372.      7.875/DV, 8.250/DV, 8.625/DV, 9.000/DV,
  373.     /* OCT 4 */
  374.      0.000/DV, 0.000/DV, 3.000/DV, 4.875/DV,
  375.      6.000/DV, 7.125/DV, 7.875/DV, 8.625/DV,
  376.      9.000/DV, 9.750/DV,10.125/DV,10.500/DV,
  377.     10.875/DV,11.250/DV,11.625/DV,12.000/DV,
  378.     /* OCT 5 */
  379.      0.000/DV, 3.000/DV, 6.000/DV, 7.875/DV,
  380.      9.000/DV,10.125/DV,10.875/DV,11.625/DV,
  381.     12.000/DV,12.750/DV,13.125/DV,13.500/DV,
  382.     13.875/DV,14.250/DV,14.625/DV,15.000/DV,
  383.     /* OCT 6 */
  384.      0.000/DV, 6.000/DV, 9.000/DV,10.875/DV,
  385.     12.000/DV,13.125/DV,13.875/DV,14.625/DV,
  386.     15.000/DV,15.750/DV,16.125/DV,16.500/DV,
  387.     16.875/DV,17.250/DV,17.625/DV,18.000/DV,
  388.     /* OCT 7 */
  389.      0.000/DV, 9.000/DV,12.000/DV,13.875/DV,
  390.     15.000/DV,16.125/DV,16.875/DV,17.625/DV,
  391.     18.000/DV,18.750/DV,19.125/DV,19.500/DV,
  392.     19.875/DV,20.250/DV,20.625/DV,21.000/DV
  393. };
  394. #undef DV
  395.  
  396. /* sustain level table (3dB per step) */
  397. /* 0 - 15: 0, 3, 6, 9,12,15,18,21,24,27,30,33,36,39,42,93 (dB)*/
  398. #define SC(db) (UINT32) ( db * (2.0/ENV_STEP) )
  399. static const UINT32 sl_tab[16]={
  400.  SC( 0),SC( 1),SC( 2),SC(3 ),SC(4 ),SC(5 ),SC(6 ),SC( 7),
  401.  SC( 8),SC( 9),SC(10),SC(11),SC(12),SC(13),SC(14),SC(31)
  402. };
  403. #undef SC
  404.  
  405.  
  406. #define RATE_STEPS (8)
  407. static const unsigned char eg_inc[15*RATE_STEPS]={
  408.  
  409. /*cycle:0 1  2 3  4 5  6 7*/
  410.  
  411. /* 0 */ 0,1, 0,1, 0,1, 0,1, /* rates 00..12 0 (increment by 0 or 1) */
  412. /* 1 */ 0,1, 0,1, 1,1, 0,1, /* rates 00..12 1 */
  413. /* 2 */ 0,1, 1,1, 0,1, 1,1, /* rates 00..12 2 */
  414. /* 3 */ 0,1, 1,1, 1,1, 1,1, /* rates 00..12 3 */
  415.  
  416. /* 4 */ 1,1, 1,1, 1,1, 1,1, /* rate 13 0 (increment by 1) */
  417. /* 5 */ 1,1, 1,2, 1,1, 1,2, /* rate 13 1 */
  418. /* 6 */ 1,2, 1,2, 1,2, 1,2, /* rate 13 2 */
  419. /* 7 */ 1,2, 2,2, 1,2, 2,2, /* rate 13 3 */
  420.  
  421. /* 8 */ 2,2, 2,2, 2,2, 2,2, /* rate 14 0 (increment by 2) */
  422. /* 9 */ 2,2, 2,4, 2,2, 2,4, /* rate 14 1 */
  423. /*10 */ 2,4, 2,4, 2,4, 2,4, /* rate 14 2 */
  424. /*11 */ 2,4, 4,4, 2,4, 4,4, /* rate 14 3 */
  425.  
  426. /*12 */ 4,4, 4,4, 4,4, 4,4, /* rates 15 0, 15 1, 15 2, 15 3 (increment by 4) */
  427. /*13 */ 8,8, 8,8, 8,8, 8,8, /* rates 15 2, 15 3 for attack */
  428. /*14 */ 0,0, 0,0, 0,0, 0,0, /* infinity rates for attack and decay(s) */
  429. };
  430.  
  431.  
  432. #define O(a) (a*RATE_STEPS)
  433.  
  434. /*note that there is no O(13) in this table - it's directly in the code */
  435. static const unsigned char eg_rate_select[16+64+16]={   /* Envelope Generator rates (16 + 64 rates + 16 RKS) */
  436. /* 16 infinite time rates */
  437. O(14),O(14),O(14),O(14),O(14),O(14),O(14),O(14),
  438. O(14),O(14),O(14),O(14),O(14),O(14),O(14),O(14),
  439.  
  440. /* rates 00-12 */
  441. O( 0),O( 1),O( 2),O( 3),
  442. O( 0),O( 1),O( 2),O( 3),
  443. O( 0),O( 1),O( 2),O( 3),
  444. O( 0),O( 1),O( 2),O( 3),
  445. O( 0),O( 1),O( 2),O( 3),
  446. O( 0),O( 1),O( 2),O( 3),
  447. O( 0),O( 1),O( 2),O( 3),
  448. O( 0),O( 1),O( 2),O( 3),
  449. O( 0),O( 1),O( 2),O( 3),
  450. O( 0),O( 1),O( 2),O( 3),
  451. O( 0),O( 1),O( 2),O( 3),
  452. O( 0),O( 1),O( 2),O( 3),
  453. O( 0),O( 1),O( 2),O( 3),
  454.  
  455. /* rate 13 */
  456. O( 4),O( 5),O( 6),O( 7),
  457.  
  458. /* rate 14 */
  459. O( 8),O( 9),O(10),O(11),
  460.  
  461. /* rate 15 */
  462. O(12),O(12),O(12),O(12),
  463.  
  464. /* 16 dummy rates (same as 15 3) */
  465. O(12),O(12),O(12),O(12),O(12),O(12),O(12),O(12),
  466. O(12),O(12),O(12),O(12),O(12),O(12),O(12),O(12),
  467.  
  468. };
  469. #undef O
  470.  
  471. /*rate  0,    1,    2,    3,   4,   5,   6,  7,  8,  9,  10, 11, 12, 13, 14, 15 */
  472. /*shift 12,   11,   10,   9,   8,   7,   6,  5,  4,  3,  2,  1,  0,  0,  0,  0  */
  473. /*mask  4095, 2047, 1023, 511, 255, 127, 63, 31, 15, 7,  3,  1,  0,  0,  0,  0  */
  474.  
  475. #define O(a) (a*1)
  476. static const unsigned char eg_rate_shift[16+64+16]={    /* Envelope Generator counter shifts (16 + 64 rates + 16 RKS) */
  477. /* 16 infinite time rates */
  478. O(0),O(0),O(0),O(0),O(0),O(0),O(0),O(0),
  479. O(0),O(0),O(0),O(0),O(0),O(0),O(0),O(0),
  480.  
  481. /* rates 00-12 */
  482. O(12),O(12),O(12),O(12),
  483. O(11),O(11),O(11),O(11),
  484. O(10),O(10),O(10),O(10),
  485. O( 9),O( 9),O( 9),O( 9),
  486. O( 8),O( 8),O( 8),O( 8),
  487. O( 7),O( 7),O( 7),O( 7),
  488. O( 6),O( 6),O( 6),O( 6),
  489. O( 5),O( 5),O( 5),O( 5),
  490. O( 4),O( 4),O( 4),O( 4),
  491. O( 3),O( 3),O( 3),O( 3),
  492. O( 2),O( 2),O( 2),O( 2),
  493. O( 1),O( 1),O( 1),O( 1),
  494. O( 0),O( 0),O( 0),O( 0),
  495.  
  496. /* rate 13 */
  497. O( 0),O( 0),O( 0),O( 0),
  498.  
  499. /* rate 14 */
  500. O( 0),O( 0),O( 0),O( 0),
  501.  
  502. /* rate 15 */
  503. O( 0),O( 0),O( 0),O( 0),
  504.  
  505. /* 16 dummy rates (same as 15 3) */
  506. O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),
  507. O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),
  508.  
  509. };
  510. #undef O
  511.  
  512.  
  513. /* multiple table */
  514. #define ML 2
  515. static const UINT8 mul_tab[16]= {
  516. /* 1/2, 1, 2, 3, 4, 5, 6, 7, 8, 9,10,10,12,12,15,15 */
  517.    0.50*ML, 1.00*ML, 2.00*ML, 3.00*ML, 4.00*ML, 5.00*ML, 6.00*ML, 7.00*ML,
  518.    8.00*ML, 9.00*ML,10.00*ML,10.00*ML,12.00*ML,12.00*ML,15.00*ML,15.00*ML
  519. };
  520. #undef ML
  521.  
  522. /*  TL_TAB_LEN is calculated as:
  523. *   12 - sinus amplitude bits     (Y axis)
  524. *   2  - sinus sign bit           (Y axis)
  525. *   TL_RES_LEN - sinus resolution (X axis)
  526. */
  527. #define TL_TAB_LEN (12*2*TL_RES_LEN)
  528. static signed int tl_tab[TL_TAB_LEN];
  529.  
  530. #define ENV_QUIET       (TL_TAB_LEN>>4)
  531.  
  532. /* sin waveform table in 'decibel' scale */
  533. /* four waveforms on OPL2 type chips */
  534. static unsigned int sin_tab[SIN_LEN * 4];
  535.  
  536.  
  537. /* LFO Amplitude Modulation table (verified on real YM3812)
  538.    27 output levels (triangle waveform); 1 level takes one of: 192, 256 or 448 samples
  539.  
  540.    Length: 210 elements.
  541.  
  542.     Each of the elements has to be repeated
  543.     exactly 64 times (on 64 consecutive samples).
  544.     The whole table takes: 64 * 210 = 13440 samples.
  545.  
  546.     When AM = 1 data is used directly
  547.     When AM = 0 data is divided by 4 before being used (loosing precision is important)
  548. */
  549.  
  550. #define LFO_AM_TAB_ELEMENTS 210
  551.  
  552. static const UINT8 lfo_am_table[LFO_AM_TAB_ELEMENTS] = {
  553. 0,0,0,0,0,0,0,
  554. 1,1,1,1,
  555. 2,2,2,2,
  556. 3,3,3,3,
  557. 4,4,4,4,
  558. 5,5,5,5,
  559. 6,6,6,6,
  560. 7,7,7,7,
  561. 8,8,8,8,
  562. 9,9,9,9,
  563. 10,10,10,10,
  564. 11,11,11,11,
  565. 12,12,12,12,
  566. 13,13,13,13,
  567. 14,14,14,14,
  568. 15,15,15,15,
  569. 16,16,16,16,
  570. 17,17,17,17,
  571. 18,18,18,18,
  572. 19,19,19,19,
  573. 20,20,20,20,
  574. 21,21,21,21,
  575. 22,22,22,22,
  576. 23,23,23,23,
  577. 24,24,24,24,
  578. 25,25,25,25,
  579. 26,26,26,
  580. 25,25,25,25,
  581. 24,24,24,24,
  582. 23,23,23,23,
  583. 22,22,22,22,
  584. 21,21,21,21,
  585. 20,20,20,20,
  586. 19,19,19,19,
  587. 18,18,18,18,
  588. 17,17,17,17,
  589. 16,16,16,16,
  590. 15,15,15,15,
  591. 14,14,14,14,
  592. 13,13,13,13,
  593. 12,12,12,12,
  594. 11,11,11,11,
  595. 10,10,10,10,
  596. 9,9,9,9,
  597. 8,8,8,8,
  598. 7,7,7,7,
  599. 6,6,6,6,
  600. 5,5,5,5,
  601. 4,4,4,4,
  602. 3,3,3,3,
  603. 2,2,2,2,
  604. 1,1,1,1
  605. };
  606.  
  607. /* LFO Phase Modulation table (verified on real YM3812) */
  608. static const INT8 lfo_pm_table[8*8*2] = {
  609.  
  610. /* FNUM2/FNUM = 00 0xxxxxxx (0x0000) */
  611. 0, 0, 0, 0, 0, 0, 0, 0, /*LFO PM depth = 0*/
  612. 0, 0, 0, 0, 0, 0, 0, 0, /*LFO PM depth = 1*/
  613.  
  614. /* FNUM2/FNUM = 00 1xxxxxxx (0x0080) */
  615. 0, 0, 0, 0, 0, 0, 0, 0, /*LFO PM depth = 0*/
  616. 1, 0, 0, 0,-1, 0, 0, 0, /*LFO PM depth = 1*/
  617.  
  618. /* FNUM2/FNUM = 01 0xxxxxxx (0x0100) */
  619. 1, 0, 0, 0,-1, 0, 0, 0, /*LFO PM depth = 0*/
  620. 2, 1, 0,-1,-2,-1, 0, 1, /*LFO PM depth = 1*/
  621.  
  622. /* FNUM2/FNUM = 01 1xxxxxxx (0x0180) */
  623. 1, 0, 0, 0,-1, 0, 0, 0, /*LFO PM depth = 0*/
  624. 3, 1, 0,-1,-3,-1, 0, 1, /*LFO PM depth = 1*/
  625.  
  626. /* FNUM2/FNUM = 10 0xxxxxxx (0x0200) */
  627. 2, 1, 0,-1,-2,-1, 0, 1, /*LFO PM depth = 0*/
  628. 4, 2, 0,-2,-4,-2, 0, 2, /*LFO PM depth = 1*/
  629.  
  630. /* FNUM2/FNUM = 10 1xxxxxxx (0x0280) */
  631. 2, 1, 0,-1,-2,-1, 0, 1, /*LFO PM depth = 0*/
  632. 5, 2, 0,-2,-5,-2, 0, 2, /*LFO PM depth = 1*/
  633.  
  634. /* FNUM2/FNUM = 11 0xxxxxxx (0x0300) */
  635. 3, 1, 0,-1,-3,-1, 0, 1, /*LFO PM depth = 0*/
  636. 6, 3, 0,-3,-6,-3, 0, 3, /*LFO PM depth = 1*/
  637.  
  638. /* FNUM2/FNUM = 11 1xxxxxxx (0x0380) */
  639. 3, 1, 0,-1,-3,-1, 0, 1, /*LFO PM depth = 0*/
  640. 7, 3, 0,-3,-7,-3, 0, 3  /*LFO PM depth = 1*/
  641. };
  642.  
  643.  
  644. /* lock level of common table */
  645. static int num_lock = 0;
  646.  
  647.  
  648. static void *cur_chip = NULL;   /* current chip pointer */
  649. static OPL_SLOT *SLOT7_1, *SLOT7_2, *SLOT8_1, *SLOT8_2;
  650.  
  651. static signed int phase_modulation; /* phase modulation input (SLOT 2) */
  652. static signed int output[1];
  653.  
  654. #if BUILD_Y8950
  655. static INT32 output_deltat[4];      /* for Y8950 DELTA-T, chip is mono, that 4 here is just for safety */
  656. #endif
  657.  
  658. static UINT32   LFO_AM;
  659. static INT32    LFO_PM;
  660.  
  661.  
  662.  
  663. INLINE int limit( int val, int max, int min ) {
  664.     if ( val > max )
  665.         val = max;
  666.     else if ( val < min )
  667.         val = min;
  668.  
  669.     return val;
  670. }
  671.  
  672.  
  673. /* status set and IRQ handling */
  674. INLINE void OPL_STATUS_SET(FM_OPL *OPL,int flag)
  675. {
  676.     /* set status flag */
  677.     OPL->status |= flag;
  678.     if(!(OPL->status & 0x80))
  679.     {
  680.         if(OPL->status & OPL->statusmask)
  681.         {   /* IRQ on */
  682.             OPL->status |= 0x80;
  683.             /* callback user interrupt handler (IRQ is OFF to ON) */
  684.             if(OPL->IRQHandler) (OPL->IRQHandler)(OPL->IRQParam,1);
  685.         }
  686.     }
  687. }
  688.  
  689. /* status reset and IRQ handling */
  690. INLINE void OPL_STATUS_RESET(FM_OPL *OPL,int flag)
  691. {
  692.     /* reset status flag */
  693.     OPL->status &=~flag;
  694.     if((OPL->status & 0x80))
  695.     {
  696.         if (!(OPL->status & OPL->statusmask) )
  697.         {
  698.             OPL->status &= 0x7f;
  699.             /* callback user interrupt handler (IRQ is ON to OFF) */
  700.             if(OPL->IRQHandler) (OPL->IRQHandler)(OPL->IRQParam,0);
  701.         }
  702.     }
  703. }
  704.  
  705. /* IRQ mask set */
  706. INLINE void OPL_STATUSMASK_SET(FM_OPL *OPL,int flag)
  707. {
  708.     OPL->statusmask = flag;
  709.     /* IRQ handling check */
  710.     OPL_STATUS_SET(OPL,0);
  711.     OPL_STATUS_RESET(OPL,0);
  712. }
  713.  
  714.  
  715. /* advance LFO to next sample */
  716. INLINE void advance_lfo(FM_OPL *OPL)
  717. {
  718.     UINT8 tmp;
  719.  
  720.     /* LFO */
  721.     OPL->lfo_am_cnt += OPL->lfo_am_inc;
  722.     if (OPL->lfo_am_cnt >= (LFO_AM_TAB_ELEMENTS<<LFO_SH) )  /* lfo_am_table is 210 elements long */
  723.         OPL->lfo_am_cnt -= (LFO_AM_TAB_ELEMENTS<<LFO_SH);
  724.  
  725.     tmp = lfo_am_table[ OPL->lfo_am_cnt >> LFO_SH ];
  726.  
  727.     if (OPL->lfo_am_depth)
  728.         LFO_AM = tmp;
  729.     else
  730.         LFO_AM = tmp>>2;
  731.  
  732.     OPL->lfo_pm_cnt += OPL->lfo_pm_inc;
  733.     LFO_PM = ((OPL->lfo_pm_cnt>>LFO_SH) & 7) | OPL->lfo_pm_depth_range;
  734. }
  735.  
  736. /* advance to next sample */
  737. INLINE void advance(FM_OPL *OPL)
  738. {
  739.     OPL_CH *CH;
  740.     OPL_SLOT *op;
  741.     int i;
  742.  
  743.     OPL->eg_timer += OPL->eg_timer_add;
  744.  
  745.     while (OPL->eg_timer >= OPL->eg_timer_overflow)
  746.     {
  747.         OPL->eg_timer -= OPL->eg_timer_overflow;
  748.  
  749.         OPL->eg_cnt++;
  750.  
  751.         for (i=0; i<9*2; i++)
  752.         {
  753.             CH  = &OPL->P_CH[i/2];
  754.             op  = &CH->SLOT[i&1];
  755.  
  756.             /* Envelope Generator */
  757.             switch(op->state)
  758.             {
  759.             case EG_ATT:        /* attack phase */
  760.                 if ( !(OPL->eg_cnt & ((1<<op->eg_sh_ar)-1) ) )
  761.                 {
  762.                     op->volume += (~op->volume *
  763.                                                (eg_inc[op->eg_sel_ar + ((OPL->eg_cnt>>op->eg_sh_ar)&7)])
  764.                                               ) >>3;
  765.  
  766.                     if (op->volume <= MIN_ATT_INDEX)
  767.                     {
  768.                         op->volume = MIN_ATT_INDEX;
  769.                         op->state = EG_DEC;
  770.                     }
  771.  
  772.                 }
  773.             break;
  774.  
  775.             case EG_DEC:    /* decay phase */
  776.                 if ( !(OPL->eg_cnt & ((1<<op->eg_sh_dr)-1) ) )
  777.                 {
  778.                     op->volume += eg_inc[op->eg_sel_dr + ((OPL->eg_cnt>>op->eg_sh_dr)&7)];
  779.  
  780.                     if ( op->volume >= op->sl )
  781.                         op->state = EG_SUS;
  782.  
  783.                 }
  784.             break;
  785.  
  786.             case EG_SUS:    /* sustain phase */
  787.  
  788.                 /* this is important behaviour:
  789.                 one can change percusive/non-percussive modes on the fly and
  790.                 the chip will remain in sustain phase - verified on real YM3812 */
  791.  
  792.                 if(op->eg_type)     /* non-percussive mode */
  793.                 {
  794.                                     /* do nothing */
  795.                 }
  796.                 else                /* percussive mode */
  797.                 {
  798.                     /* during sustain phase chip adds Release Rate (in percussive mode) */
  799.                     if ( !(OPL->eg_cnt & ((1<<op->eg_sh_rr)-1) ) )
  800.                     {
  801.                         op->volume += eg_inc[op->eg_sel_rr + ((OPL->eg_cnt>>op->eg_sh_rr)&7)];
  802.  
  803.                         if ( op->volume >= MAX_ATT_INDEX )
  804.                             op->volume = MAX_ATT_INDEX;
  805.                     }
  806.                     /* else do nothing in sustain phase */
  807.                 }
  808.             break;
  809.  
  810.             case EG_REL:    /* release phase */
  811.                 if ( !(OPL->eg_cnt & ((1<<op->eg_sh_rr)-1) ) )
  812.                 {
  813.                     op->volume += eg_inc[op->eg_sel_rr + ((OPL->eg_cnt>>op->eg_sh_rr)&7)];
  814.  
  815.                     if ( op->volume >= MAX_ATT_INDEX )
  816.                     {
  817.                         op->volume = MAX_ATT_INDEX;
  818.                         op->state = EG_OFF;
  819.                     }
  820.  
  821.                 }
  822.             break;
  823.  
  824.             default:
  825.             break;
  826.             }
  827.         }
  828.     }
  829.  
  830.     for (i=0; i<9*2; i++)
  831.     {
  832.         CH  = &OPL->P_CH[i/2];
  833.         op  = &CH->SLOT[i&1];
  834.  
  835.         /* Phase Generator */
  836.         if(op->vib)
  837.         {
  838.             UINT8 block;
  839.             unsigned int block_fnum = CH->block_fnum;
  840.  
  841.             unsigned int fnum_lfo   = (block_fnum&0x0380) >> 7;
  842.  
  843.             signed int lfo_fn_table_index_offset = lfo_pm_table[LFO_PM + 16*fnum_lfo ];
  844.  
  845.             if (lfo_fn_table_index_offset)  /* LFO phase modulation active */
  846.             {
  847.                 block_fnum += lfo_fn_table_index_offset;
  848.                 block = (block_fnum&0x1c00) >> 10;
  849.                 op->Cnt += (OPL->fn_tab[block_fnum&0x03ff] >> (7-block)) * op->mul;
  850.             }
  851.             else    /* LFO phase modulation  = zero */
  852.             {
  853.                 op->Cnt += op->Incr;
  854.             }
  855.         }
  856.         else    /* LFO phase modulation disabled for this operator */
  857.         {
  858.             op->Cnt += op->Incr;
  859.         }
  860.     }
  861.  
  862.     /*  The Noise Generator of the YM3812 is 23-bit shift register.
  863.     *   Period is equal to 2^23-2 samples.
  864.     *   Register works at sampling frequency of the chip, so output
  865.     *   can change on every sample.
  866.     *
  867.     *   Output of the register and input to the bit 22 is:
  868.     *   bit0 XOR bit14 XOR bit15 XOR bit22
  869.     *
  870.     *   Simply use bit 22 as the noise output.
  871.     */
  872.  
  873.     OPL->noise_p += OPL->noise_f;
  874.     i = OPL->noise_p >> FREQ_SH;        /* number of events (shifts of the shift register) */
  875.     OPL->noise_p &= FREQ_MASK;
  876.     while (i)
  877.     {
  878.         /*
  879.         UINT32 j;
  880.         j = ( (OPL->noise_rng) ^ (OPL->noise_rng>>14) ^ (OPL->noise_rng>>15) ^ (OPL->noise_rng>>22) ) & 1;
  881.         OPL->noise_rng = (j<<22) | (OPL->noise_rng>>1);
  882.         */
  883.  
  884.         /*
  885.             Instead of doing all the logic operations above, we
  886.             use a trick here (and use bit 0 as the noise output).
  887.             The difference is only that the noise bit changes one
  888.             step ahead. This doesn't matter since we don't know
  889.             what is real state of the noise_rng after the reset.
  890.         */
  891.  
  892.         if (OPL->noise_rng & 1) OPL->noise_rng ^= 0x800302;
  893.         OPL->noise_rng >>= 1;
  894.  
  895.         i--;
  896.     }
  897. }
  898.  
  899.  
  900. INLINE signed int op_calc(UINT32 phase, unsigned int env, signed int pm, unsigned int wave_tab)
  901. {
  902.     UINT32 p;
  903.  
  904.     p = (env<<4) + sin_tab[wave_tab + ((((signed int)((phase & ~FREQ_MASK) + (pm<<16))) >> FREQ_SH ) & SIN_MASK) ];
  905.  
  906.     if (p >= TL_TAB_LEN)
  907.         return 0;
  908.     return tl_tab[p];
  909. }
  910.  
  911. INLINE signed int op_calc1(UINT32 phase, unsigned int env, signed int pm, unsigned int wave_tab)
  912. {
  913.     UINT32 p;
  914.  
  915.     p = (env<<4) + sin_tab[wave_tab + ((((signed int)((phase & ~FREQ_MASK) + pm      )) >> FREQ_SH ) & SIN_MASK) ];
  916.  
  917.     if (p >= TL_TAB_LEN)
  918.         return 0;
  919.     return tl_tab[p];
  920. }
  921.  
  922.  
  923. #define volume_calc(OP) ((OP)->TLL + ((UINT32)(OP)->volume) + (LFO_AM & (OP)->AMmask))
  924.  
  925. /* calculate output */
  926. INLINE void OPL_CALC_CH( OPL_CH *CH )
  927. {
  928.     OPL_SLOT *SLOT;
  929.     unsigned int env;
  930.     signed int out;
  931.  
  932.     phase_modulation = 0;
  933.  
  934.     /* SLOT 1 */
  935.     SLOT = &CH->SLOT[SLOT1];
  936.     env  = volume_calc(SLOT);
  937.     out  = SLOT->op1_out[0] + SLOT->op1_out[1];
  938.     SLOT->op1_out[0] = SLOT->op1_out[1];
  939.     *SLOT->connect1 += SLOT->op1_out[0];
  940.     SLOT->op1_out[1] = 0;
  941.     if( env < ENV_QUIET )
  942.     {
  943.         if (!SLOT->FB)
  944.             out = 0;
  945.         SLOT->op1_out[1] = op_calc1(SLOT->Cnt, env, (out<<SLOT->FB), SLOT->wavetable );
  946.     }
  947.  
  948.     /* SLOT 2 */
  949.     SLOT++;
  950.     env = volume_calc(SLOT);
  951.     if( env < ENV_QUIET )
  952.         output[0] += op_calc(SLOT->Cnt, env, phase_modulation, SLOT->wavetable);
  953. }
  954.  
  955. /*
  956.     operators used in the rhythm sounds generation process:
  957.  
  958.     Envelope Generator:
  959.  
  960. channel  operator  register number   Bass  High  Snare Tom  Top
  961. / slot   number    TL ARDR SLRR Wave Drum  Hat   Drum  Tom  Cymbal
  962.  6 / 0   12        50  70   90   f0  +
  963.  6 / 1   15        53  73   93   f3  +
  964.  7 / 0   13        51  71   91   f1        +
  965.  7 / 1   16        54  74   94   f4              +
  966.  8 / 0   14        52  72   92   f2                    +
  967.  8 / 1   17        55  75   95   f5                          +
  968.  
  969.     Phase Generator:
  970.  
  971. channel  operator  register number   Bass  High  Snare Tom  Top
  972. / slot   number    MULTIPLE          Drum  Hat   Drum  Tom  Cymbal
  973.  6 / 0   12        30                +
  974.  6 / 1   15        33                +
  975.  7 / 0   13        31                      +     +           +
  976.  7 / 1   16        34                -----  n o t  u s e d -----
  977.  8 / 0   14        32                                  +
  978.  8 / 1   17        35                      +                 +
  979.  
  980. channel  operator  register number   Bass  High  Snare Tom  Top
  981. number   number    BLK/FNUM2 FNUM    Drum  Hat   Drum  Tom  Cymbal
  982.    6     12,15     B6        A6      +
  983.  
  984.    7     13,16     B7        A7            +     +           +
  985.  
  986.    8     14,17     B8        A8            +           +     +
  987.  
  988. */
  989.  
  990. /* calculate rhythm */
  991.  
  992. INLINE void OPL_CALC_RH( OPL_CH *CH, unsigned int noise )
  993. {
  994.     OPL_SLOT *SLOT;
  995.     signed int out;
  996.     unsigned int env;
  997.  
  998.  
  999.     /* Bass Drum (verified on real YM3812):
  1000.       - depends on the channel 6 'connect' register:
  1001.           when connect = 0 it works the same as in normal (non-rhythm) mode (op1->op2->out)
  1002.           when connect = 1 _only_ operator 2 is present on output (op2->out), operator 1 is ignored
  1003.       - output sample always is multiplied by 2
  1004.     */
  1005.  
  1006.     phase_modulation = 0;
  1007.     /* SLOT 1 */
  1008.     SLOT = &CH[6].SLOT[SLOT1];
  1009.     env = volume_calc(SLOT);
  1010.  
  1011.     out = SLOT->op1_out[0] + SLOT->op1_out[1];
  1012.     SLOT->op1_out[0] = SLOT->op1_out[1];
  1013.  
  1014.     if (!SLOT->CON)
  1015.         phase_modulation = SLOT->op1_out[0];
  1016.     /* else ignore output of operator 1 */
  1017.  
  1018.     SLOT->op1_out[1] = 0;
  1019.     if( env < ENV_QUIET )
  1020.     {
  1021.         if (!SLOT->FB)
  1022.             out = 0;
  1023.         SLOT->op1_out[1] = op_calc1(SLOT->Cnt, env, (out<<SLOT->FB), SLOT->wavetable );
  1024.     }
  1025.  
  1026.     /* SLOT 2 */
  1027.     SLOT++;
  1028.     env = volume_calc(SLOT);
  1029.     if( env < ENV_QUIET )
  1030.         output[0] += op_calc(SLOT->Cnt, env, phase_modulation, SLOT->wavetable) * 2;
  1031.  
  1032.  
  1033.     /* Phase generation is based on: */
  1034.     /* HH  (13) channel 7->slot 1 combined with channel 8->slot 2 (same combination as TOP CYMBAL but different output phases) */
  1035.     /* SD  (16) channel 7->slot 1 */
  1036.     /* TOM (14) channel 8->slot 1 */
  1037.     /* TOP (17) channel 7->slot 1 combined with channel 8->slot 2 (same combination as HIGH HAT but different output phases) */
  1038.  
  1039.     /* Envelope generation based on: */
  1040.     /* HH  channel 7->slot1 */
  1041.     /* SD  channel 7->slot2 */
  1042.     /* TOM channel 8->slot1 */
  1043.     /* TOP channel 8->slot2 */
  1044.  
  1045.  
  1046.     /* The following formulas can be well optimized.
  1047.        I leave them in direct form for now (in case I've missed something).
  1048.     */
  1049.  
  1050.     /* High Hat (verified on real YM3812) */
  1051.     env = volume_calc(SLOT7_1);
  1052.     if( env < ENV_QUIET )
  1053.     {
  1054.  
  1055.         /* high hat phase generation:
  1056.             phase = d0 or 234 (based on frequency only)
  1057.             phase = 34 or 2d0 (based on noise)
  1058.         */
  1059.  
  1060.         /* base frequency derived from operator 1 in channel 7 */
  1061.         unsigned char bit7 = ((SLOT7_1->Cnt>>FREQ_SH)>>7)&1;
  1062.         unsigned char bit3 = ((SLOT7_1->Cnt>>FREQ_SH)>>3)&1;
  1063.         unsigned char bit2 = ((SLOT7_1->Cnt>>FREQ_SH)>>2)&1;
  1064.  
  1065.         unsigned char res1 = (bit2 ^ bit7) | bit3;
  1066.  
  1067.         /* when res1 = 0 phase = 0x000 | 0xd0; */
  1068.         /* when res1 = 1 phase = 0x200 | (0xd0>>2); */
  1069.         UINT32 phase = res1 ? (0x200|(0xd0>>2)) : 0xd0;
  1070.  
  1071.         /* enable gate based on frequency of operator 2 in channel 8 */
  1072.         unsigned char bit5e= ((SLOT8_2->Cnt>>FREQ_SH)>>5)&1;
  1073.         unsigned char bit3e= ((SLOT8_2->Cnt>>FREQ_SH)>>3)&1;
  1074.  
  1075.         unsigned char res2 = (bit3e ^ bit5e);
  1076.  
  1077.         /* when res2 = 0 pass the phase from calculation above (res1); */
  1078.         /* when res2 = 1 phase = 0x200 | (0xd0>>2); */
  1079.         if (res2)
  1080.             phase = (0x200|(0xd0>>2));
  1081.  
  1082.  
  1083.         /* when phase & 0x200 is set and noise=1 then phase = 0x200|0xd0 */
  1084.         /* when phase & 0x200 is set and noise=0 then phase = 0x200|(0xd0>>2), ie no change */
  1085.         if (phase&0x200)
  1086.         {
  1087.             if (noise)
  1088.                 phase = 0x200|0xd0;
  1089.         }
  1090.         else
  1091.         /* when phase & 0x200 is clear and noise=1 then phase = 0xd0>>2 */
  1092.         /* when phase & 0x200 is clear and noise=0 then phase = 0xd0, ie no change */
  1093.         {
  1094.             if (noise)
  1095.                 phase = 0xd0>>2;
  1096.         }
  1097.  
  1098.         output[0] += op_calc(phase<<FREQ_SH, env, 0, SLOT7_1->wavetable) * 2;
  1099.     }
  1100.  
  1101.     /* Snare Drum (verified on real YM3812) */
  1102.     env = volume_calc(SLOT7_2);
  1103.     if( env < ENV_QUIET )
  1104.     {
  1105.         /* base frequency derived from operator 1 in channel 7 */
  1106.         unsigned char bit8 = ((SLOT7_1->Cnt>>FREQ_SH)>>8)&1;
  1107.  
  1108.         /* when bit8 = 0 phase = 0x100; */
  1109.         /* when bit8 = 1 phase = 0x200; */
  1110.         UINT32 phase = bit8 ? 0x200 : 0x100;
  1111.  
  1112.         /* Noise bit XOR'es phase by 0x100 */
  1113.         /* when noisebit = 0 pass the phase from calculation above */
  1114.         /* when noisebit = 1 phase ^= 0x100; */
  1115.         /* in other words: phase ^= (noisebit<<8); */
  1116.         if (noise)
  1117.             phase ^= 0x100;
  1118.  
  1119.         output[0] += op_calc(phase<<FREQ_SH, env, 0, SLOT7_2->wavetable) * 2;
  1120.     }
  1121.  
  1122.     /* Tom Tom (verified on real YM3812) */
  1123.     env = volume_calc(SLOT8_1);
  1124.     if( env < ENV_QUIET )
  1125.         output[0] += op_calc(SLOT8_1->Cnt, env, 0, SLOT8_1->wavetable) * 2;
  1126.  
  1127.     /* Top Cymbal (verified on real YM3812) */
  1128.     env = volume_calc(SLOT8_2);
  1129.     if( env < ENV_QUIET )
  1130.     {
  1131.         /* base frequency derived from operator 1 in channel 7 */
  1132.         unsigned char bit7 = ((SLOT7_1->Cnt>>FREQ_SH)>>7)&1;
  1133.         unsigned char bit3 = ((SLOT7_1->Cnt>>FREQ_SH)>>3)&1;
  1134.         unsigned char bit2 = ((SLOT7_1->Cnt>>FREQ_SH)>>2)&1;
  1135.  
  1136.         unsigned char res1 = (bit2 ^ bit7) | bit3;
  1137.  
  1138.         /* when res1 = 0 phase = 0x000 | 0x100; */
  1139.         /* when res1 = 1 phase = 0x200 | 0x100; */
  1140.         UINT32 phase = res1 ? 0x300 : 0x100;
  1141.  
  1142.         /* enable gate based on frequency of operator 2 in channel 8 */
  1143.         unsigned char bit5e= ((SLOT8_2->Cnt>>FREQ_SH)>>5)&1;
  1144.         unsigned char bit3e= ((SLOT8_2->Cnt>>FREQ_SH)>>3)&1;
  1145.  
  1146.         unsigned char res2 = (bit3e ^ bit5e);
  1147.         /* when res2 = 0 pass the phase from calculation above (res1); */
  1148.         /* when res2 = 1 phase = 0x200 | 0x100; */
  1149.         if (res2)
  1150.             phase = 0x300;
  1151.  
  1152.         output[0] += op_calc(phase<<FREQ_SH, env, 0, SLOT8_2->wavetable) * 2;
  1153.     }
  1154.  
  1155. }
  1156.  
  1157.  
  1158. /* generic table initialize */
  1159. static int init_tables(void)
  1160. {
  1161.     signed int i,x;
  1162.     signed int n;
  1163.     double o,m;
  1164.  
  1165.  
  1166.     for (x=0; x<TL_RES_LEN; x++)
  1167.     {
  1168.         m = (1<<16) / pow(2, (x+1) * (ENV_STEP/4.0) / 8.0);
  1169.         m = floor(m);
  1170.  
  1171.         /* we never reach (1<<16) here due to the (x+1) */
  1172.         /* result fits within 16 bits at maximum */
  1173.  
  1174.         n = (int)m;     /* 16 bits here */
  1175.         n >>= 4;        /* 12 bits here */
  1176.         if (n&1)        /* round to nearest */
  1177.             n = (n>>1)+1;
  1178.         else
  1179.             n = n>>1;
  1180.                         /* 11 bits here (rounded) */
  1181.         n <<= 1;        /* 12 bits here (as in real chip) */
  1182.         tl_tab[ x*2 + 0 ] = n;
  1183.         tl_tab[ x*2 + 1 ] = -tl_tab[ x*2 + 0 ];
  1184.  
  1185.         for (i=1; i<12; i++)
  1186.         {
  1187.             tl_tab[ x*2+0 + i*2*TL_RES_LEN ] =  tl_tab[ x*2+0 ]>>i;
  1188.             tl_tab[ x*2+1 + i*2*TL_RES_LEN ] = -tl_tab[ x*2+0 + i*2*TL_RES_LEN ];
  1189.         }
  1190.     #if 0
  1191.             logerror("tl %04i", x*2);
  1192.             for (i=0; i<12; i++)
  1193.                 logerror(", [%02i] %5i", i*2, tl_tab[ x*2 /*+1*/ + i*2*TL_RES_LEN ] );
  1194.             logerror("\n");
  1195.     #endif
  1196.     }
  1197.     /*logerror("FMOPL.C: TL_TAB_LEN = %i elements (%i bytes)\n",TL_TAB_LEN, (int)sizeof(tl_tab));*/
  1198.  
  1199.  
  1200.     for (i=0; i<SIN_LEN; i++)
  1201.     {
  1202.         /* non-standard sinus */
  1203.         m = sin( ((i*2)+1) * PI / SIN_LEN ); /* checked against the real chip */
  1204.  
  1205.         /* we never reach zero here due to ((i*2)+1) */
  1206.  
  1207.         if (m>0.0)
  1208.             o = 8*log(1.0/m)/log(2);    /* convert to 'decibels' */
  1209.         else
  1210.             o = 8*log(-1.0/m)/log(2);   /* convert to 'decibels' */
  1211.  
  1212.         o = o / (ENV_STEP/4);
  1213.  
  1214.         n = (int)(2.0*o);
  1215.         if (n&1)                        /* round to nearest */
  1216.             n = (n>>1)+1;
  1217.         else
  1218.             n = n>>1;
  1219.  
  1220.         sin_tab[ i ] = n*2 + (m>=0.0? 0: 1 );
  1221.  
  1222.         /*logerror("FMOPL.C: sin [%4i (hex=%03x)]= %4i (tl_tab value=%5i)\n", i, i, sin_tab[i], tl_tab[sin_tab[i]] );*/
  1223.     }
  1224.  
  1225.     for (i=0; i<SIN_LEN; i++)
  1226.     {
  1227.         /* waveform 1:  __      __     */
  1228.         /*             /  \____/  \____*/
  1229.         /* output only first half of the sinus waveform (positive one) */
  1230.  
  1231.         if (i & (1<<(SIN_BITS-1)) )
  1232.             sin_tab[1*SIN_LEN+i] = TL_TAB_LEN;
  1233.         else
  1234.             sin_tab[1*SIN_LEN+i] = sin_tab[i];
  1235.  
  1236.         /* waveform 2:  __  __  __  __ */
  1237.         /*             /  \/  \/  \/  \*/
  1238.         /* abs(sin) */
  1239.  
  1240.         sin_tab[2*SIN_LEN+i] = sin_tab[i & (SIN_MASK>>1) ];
  1241.  
  1242.         /* waveform 3:  _   _   _   _  */
  1243.         /*             / |_/ |_/ |_/ |_*/
  1244.         /* abs(output only first quarter of the sinus waveform) */
  1245.  
  1246.         if (i & (1<<(SIN_BITS-2)) )
  1247.             sin_tab[3*SIN_LEN+i] = TL_TAB_LEN;
  1248.         else
  1249.             sin_tab[3*SIN_LEN+i] = sin_tab[i & (SIN_MASK>>2)];
  1250.  
  1251.         /*logerror("FMOPL.C: sin1[%4i]= %4i (tl_tab value=%5i)\n", i, sin_tab[1*SIN_LEN+i], tl_tab[sin_tab[1*SIN_LEN+i]] );
  1252.         logerror("FMOPL.C: sin2[%4i]= %4i (tl_tab value=%5i)\n", i, sin_tab[2*SIN_LEN+i], tl_tab[sin_tab[2*SIN_LEN+i]] );
  1253.         logerror("FMOPL.C: sin3[%4i]= %4i (tl_tab value=%5i)\n", i, sin_tab[3*SIN_LEN+i], tl_tab[sin_tab[3*SIN_LEN+i]] );*/
  1254.     }
  1255.     /*logerror("FMOPL.C: ENV_QUIET= %08x (dec*8=%i)\n", ENV_QUIET, ENV_QUIET*8 );*/
  1256.  
  1257.  
  1258. #ifdef SAVE_SAMPLE
  1259.     sample[0]=fopen("sampsum.pcm","wb");
  1260. #endif
  1261.  
  1262.     return 1;
  1263. }
  1264.  
  1265. static void OPLCloseTable( void )
  1266. {
  1267. #ifdef SAVE_SAMPLE
  1268.     fclose(sample[0]);
  1269. #endif
  1270. }
  1271.  
  1272.  
  1273.  
  1274. static void OPL_initalize(FM_OPL *OPL)
  1275. {
  1276.     int i;
  1277.  
  1278.     /* frequency base */
  1279.     OPL->freqbase  = (OPL->rate) ? ((double)OPL->clock / 72.0) / OPL->rate  : 0;
  1280. #if 0
  1281.     OPL->rate = (double)OPL->clock / 72.0;
  1282.     OPL->freqbase  = 1.0;
  1283. #endif
  1284.  
  1285.     /*logerror("freqbase=%f\n", OPL->freqbase);*/
  1286.  
  1287.     /* Timer base time */
  1288.     OPL->TimerBase = 1.0 / ((double)OPL->clock / 72.0 );
  1289.  
  1290.     /* make fnumber -> increment counter table */
  1291.     for( i=0 ; i < 1024 ; i++ )
  1292.     {
  1293.         /* opn phase increment counter = 20bit */
  1294.         OPL->fn_tab[i] = (UINT32)( (double)i * 64 * OPL->freqbase * (1<<(FREQ_SH-10)) ); /* -10 because chip works with 10.10 fixed point, while we use 16.16 */
  1295. #if 0
  1296.         logerror("FMOPL.C: fn_tab[%4i] = %08x (dec=%8i)\n",
  1297.                  i, OPL->fn_tab[i]>>6, OPL->fn_tab[i]>>6 );
  1298. #endif
  1299.     }
  1300.  
  1301. #if 0
  1302.     for( i=0 ; i < 16 ; i++ )
  1303.     {
  1304.         logerror("FMOPL.C: sl_tab[%i] = %08x\n",
  1305.             i, sl_tab[i] );
  1306.     }
  1307.     for( i=0 ; i < 8 ; i++ )
  1308.     {
  1309.         int j;
  1310.         logerror("FMOPL.C: ksl_tab[oct=%2i] =",i);
  1311.         for (j=0; j<16; j++)
  1312.         {
  1313.             logerror("%08x ", ksl_tab[i*16+j] );
  1314.         }
  1315.         logerror("\n");
  1316.     }
  1317. #endif
  1318.  
  1319.  
  1320.     /* Amplitude modulation: 27 output levels (triangle waveform); 1 level takes one of: 192, 256 or 448 samples */
  1321.     /* One entry from LFO_AM_TABLE lasts for 64 samples */
  1322.     OPL->lfo_am_inc = (1.0 / 64.0 ) * (1<<LFO_SH) * OPL->freqbase;
  1323.  
  1324.     /* Vibrato: 8 output levels (triangle waveform); 1 level takes 1024 samples */
  1325.     OPL->lfo_pm_inc = (1.0 / 1024.0) * (1<<LFO_SH) * OPL->freqbase;
  1326.  
  1327.     /*logerror ("OPL->lfo_am_inc = %8x ; OPL->lfo_pm_inc = %8x\n", OPL->lfo_am_inc, OPL->lfo_pm_inc);*/
  1328.  
  1329.     /* Noise generator: a step takes 1 sample */
  1330.     //OPL->noise_f = (1.0 / 1.0) * (1<<FREQ_SH) * OPL->freqbase;
  1331.     OPL->noise_f = 0;
  1332.  
  1333.     OPL->eg_timer_add  = (1<<EG_SH)  * OPL->freqbase;
  1334.     OPL->eg_timer_overflow = ( 1 ) * (1<<EG_SH);
  1335.     /*logerror("OPLinit eg_timer_add=%8x eg_timer_overflow=%8x\n", OPL->eg_timer_add, OPL->eg_timer_overflow);*/
  1336.  
  1337. }
  1338.  
  1339. INLINE void FM_KEYON(OPL_SLOT *SLOT, UINT32 key_set)
  1340. {
  1341.     if( !SLOT->key )
  1342.     {
  1343.         /* restart Phase Generator */
  1344.         SLOT->Cnt = 0;
  1345.         /* phase -> Attack */
  1346.         SLOT->state = EG_ATT;
  1347.     }
  1348.     SLOT->key |= key_set;
  1349. }
  1350.  
  1351. INLINE void FM_KEYOFF(OPL_SLOT *SLOT, UINT32 key_clr)
  1352. {
  1353.     if( SLOT->key )
  1354.     {
  1355.         SLOT->key &= key_clr;
  1356.  
  1357.         if( !SLOT->key )
  1358.         {
  1359.             /* phase -> Release */
  1360.             if (SLOT->state>EG_REL)
  1361.                 SLOT->state = EG_REL;
  1362.         }
  1363.     }
  1364. }
  1365.  
  1366. /* update phase increment counter of operator (also update the EG rates if necessary) */
  1367. INLINE void CALC_FCSLOT(OPL_CH *CH,OPL_SLOT *SLOT)
  1368. {
  1369.     int ksr;
  1370.  
  1371.     /* (frequency) phase increment counter */
  1372.     SLOT->Incr = CH->fc * SLOT->mul;
  1373.     ksr = CH->kcode >> SLOT->KSR;
  1374.  
  1375.     if( SLOT->ksr != ksr )
  1376.     {
  1377.         SLOT->ksr = ksr;
  1378.  
  1379.         /* calculate envelope generator rates */
  1380.         if ((SLOT->ar + SLOT->ksr) < 16+62)
  1381.         {
  1382.             SLOT->eg_sh_ar  = eg_rate_shift [SLOT->ar + SLOT->ksr ];
  1383.             SLOT->eg_sel_ar = eg_rate_select[SLOT->ar + SLOT->ksr ];
  1384.         }
  1385.         else
  1386.         {
  1387.             SLOT->eg_sh_ar  = 0;
  1388.             SLOT->eg_sel_ar = 13*RATE_STEPS;
  1389.         }
  1390.         SLOT->eg_sh_dr  = eg_rate_shift [SLOT->dr + SLOT->ksr ];
  1391.         SLOT->eg_sel_dr = eg_rate_select[SLOT->dr + SLOT->ksr ];
  1392.         SLOT->eg_sh_rr  = eg_rate_shift [SLOT->rr + SLOT->ksr ];
  1393.         SLOT->eg_sel_rr = eg_rate_select[SLOT->rr + SLOT->ksr ];
  1394.     }
  1395. }
  1396.  
  1397. /* set multi,am,vib,EG-TYP,KSR,mul */
  1398. INLINE void set_mul(FM_OPL *OPL,int slot,int v)
  1399. {
  1400.     OPL_CH   *CH   = &OPL->P_CH[slot/2];
  1401.     OPL_SLOT *SLOT = &CH->SLOT[slot&1];
  1402.  
  1403.     SLOT->mul     = mul_tab[v&0x0f];
  1404.     SLOT->KSR     = (v&0x10) ? 0 : 2;
  1405.     SLOT->eg_type = (v&0x20);
  1406.     SLOT->vib     = (v&0x40);
  1407.     SLOT->AMmask  = (v&0x80) ? ~0 : 0;
  1408.     CALC_FCSLOT(CH,SLOT);
  1409. }
  1410.  
  1411. /* set ksl & tl */
  1412. INLINE void set_ksl_tl(FM_OPL *OPL,int slot,int v)
  1413. {
  1414.     OPL_CH   *CH   = &OPL->P_CH[slot/2];
  1415.     OPL_SLOT *SLOT = &CH->SLOT[slot&1];
  1416.     int ksl = v>>6; /* 0 / 1.5 / 3.0 / 6.0 dB/OCT */
  1417.  
  1418.     SLOT->ksl = ksl ? 3-ksl : 31;
  1419.     SLOT->TL  = (v&0x3f)<<(ENV_BITS-1-7); /* 7 bits TL (bit 6 = always 0) */
  1420.  
  1421.     SLOT->TLL = SLOT->TL + (CH->ksl_base>>SLOT->ksl);
  1422. }
  1423.  
  1424. /* set attack rate & decay rate  */
  1425. INLINE void set_ar_dr(FM_OPL *OPL,int slot,int v)
  1426. {
  1427.     OPL_CH   *CH   = &OPL->P_CH[slot/2];
  1428.     OPL_SLOT *SLOT = &CH->SLOT[slot&1];
  1429.  
  1430.     SLOT->ar = (v>>4)  ? 16 + ((v>>4)  <<2) : 0;
  1431.  
  1432.     if ((SLOT->ar + SLOT->ksr) < 16+62)
  1433.     {
  1434.         SLOT->eg_sh_ar  = eg_rate_shift [SLOT->ar + SLOT->ksr ];
  1435.         SLOT->eg_sel_ar = eg_rate_select[SLOT->ar + SLOT->ksr ];
  1436.     }
  1437.     else
  1438.     {
  1439.         SLOT->eg_sh_ar  = 0;
  1440.         SLOT->eg_sel_ar = 13*RATE_STEPS;
  1441.     }
  1442.  
  1443.     SLOT->dr    = (v&0x0f)? 16 + ((v&0x0f)<<2) : 0;
  1444.     SLOT->eg_sh_dr  = eg_rate_shift [SLOT->dr + SLOT->ksr ];
  1445.     SLOT->eg_sel_dr = eg_rate_select[SLOT->dr + SLOT->ksr ];
  1446. }
  1447.  
  1448. /* set sustain level & release rate */
  1449. INLINE void set_sl_rr(FM_OPL *OPL,int slot,int v)
  1450. {
  1451.     OPL_CH   *CH   = &OPL->P_CH[slot/2];
  1452.     OPL_SLOT *SLOT = &CH->SLOT[slot&1];
  1453.  
  1454.     SLOT->sl  = sl_tab[ v>>4 ];
  1455.  
  1456.     SLOT->rr  = (v&0x0f)? 16 + ((v&0x0f)<<2) : 0;
  1457.     SLOT->eg_sh_rr  = eg_rate_shift [SLOT->rr + SLOT->ksr ];
  1458.     SLOT->eg_sel_rr = eg_rate_select[SLOT->rr + SLOT->ksr ];
  1459. }
  1460.  
  1461.  
  1462. /* write a value v to register r on OPL chip */
  1463. static void OPLWriteReg(FM_OPL *OPL, int r, int v)
  1464. {
  1465.     OPL_CH *CH;
  1466.     int slot;
  1467.     int block_fnum;
  1468.  
  1469.  
  1470.     /* adjust bus to 8 bits */
  1471.     r &= 0xff;
  1472.     v &= 0xff;
  1473.  
  1474. #ifdef LOG_CYM_FILE
  1475.     if ((cymfile) && (r!=0) )
  1476.     {
  1477.         fputc( (unsigned char)r, cymfile );
  1478.         fputc( (unsigned char)v, cymfile );
  1479.     }
  1480. #endif
  1481.  
  1482.  
  1483.     switch(r&0xe0)
  1484.     {
  1485.     case 0x00:  /* 00-1f:control */
  1486.         switch(r&0x1f)
  1487.         {
  1488.         case 0x01:  /* waveform select enable */
  1489.             if(OPL->type&OPL_TYPE_WAVESEL)
  1490.             {
  1491.                 OPL->wavesel = v&0x20;
  1492.                 /* do not change the waveform previously selected */
  1493.             }
  1494.             break;
  1495.         case 0x02:  /* Timer 1 */
  1496.             OPL->T[0] = (256-v)*4;
  1497.             break;
  1498.         case 0x03:  /* Timer 2 */
  1499.             OPL->T[1] = (256-v)*16;
  1500.             break;
  1501.         case 0x04:  /* IRQ clear / mask and Timer enable */
  1502.             if(v&0x80)
  1503.             {   /* IRQ flag clear */
  1504.                 OPL_STATUS_RESET(OPL,0x7f-0x08); /* don't reset BFRDY flag or we will have to call deltat module to set the flag */
  1505.             }
  1506.             else
  1507.             {   /* set IRQ mask ,timer enable*/
  1508.                 UINT8 st1 = v&1;
  1509.                 UINT8 st2 = (v>>1)&1;
  1510.  
  1511.                 /* IRQRST,T1MSK,t2MSK,EOSMSK,BRMSK,x,ST2,ST1 */
  1512.                 OPL_STATUS_RESET(OPL, v & (0x78-0x08) );
  1513.                 OPL_STATUSMASK_SET(OPL, (~v) & 0x78 );
  1514.  
  1515.                 /* timer 2 */
  1516.                 if(OPL->st[1] != st2)
  1517.                 {
  1518.                     double interval = st2 ? (double)OPL->T[1]*OPL->TimerBase : 0.0;
  1519.                     OPL->st[1] = st2;
  1520.                     if (OPL->TimerHandler) (OPL->TimerHandler)(OPL->TimerParam,1,interval);
  1521.                 }
  1522.                 /* timer 1 */
  1523.                 if(OPL->st[0] != st1)
  1524.                 {
  1525.                     double interval = st1 ? (double)OPL->T[0]*OPL->TimerBase : 0.0;
  1526.                     OPL->st[0] = st1;
  1527.                     if (OPL->TimerHandler) (OPL->TimerHandler)(OPL->TimerParam,0,interval);
  1528.                 }
  1529.             }
  1530.             break;
  1531. #if BUILD_Y8950
  1532.         case 0x06:      /* Key Board OUT */
  1533.             if(OPL->type&OPL_TYPE_KEYBOARD)
  1534.             {
  1535.                 if(OPL->keyboardhandler_w)
  1536.                     OPL->keyboardhandler_w(OPL->keyboard_param,v);
  1537.                 else
  1538.                     logerror("Y8950: write unmapped KEYBOARD port\n");
  1539.             }
  1540.             break;
  1541.         case 0x07:  /* DELTA-T control 1 : START,REC,MEMDATA,REPT,SPOFF,x,x,RST */
  1542.             if(OPL->type&OPL_TYPE_ADPCM)
  1543.                 YM_DELTAT_ADPCM_Write(OPL->deltat,r-0x07,v);
  1544.             break;
  1545. #endif
  1546.         case 0x08:  /* MODE,DELTA-T control 2 : CSM,NOTESEL,x,x,smpl,da/ad,64k,rom */
  1547.             OPL->mode = v;
  1548. #if BUILD_Y8950
  1549.             if(OPL->type&OPL_TYPE_ADPCM)
  1550.                 YM_DELTAT_ADPCM_Write(OPL->deltat,r-0x07,v&0x0f); /* mask 4 LSBs in register 08 for DELTA-T unit */
  1551. #endif
  1552.             break;
  1553.  
  1554. #if BUILD_Y8950
  1555.         case 0x09:      /* START ADD */
  1556.         case 0x0a:
  1557.         case 0x0b:      /* STOP ADD  */
  1558.         case 0x0c:
  1559.         case 0x0d:      /* PRESCALE   */
  1560.         case 0x0e:
  1561.         case 0x0f:      /* ADPCM data write */
  1562.         case 0x10:      /* DELTA-N    */
  1563.         case 0x11:      /* DELTA-N    */
  1564.         case 0x12:      /* ADPCM volume */
  1565.             if(OPL->type&OPL_TYPE_ADPCM)
  1566.                 YM_DELTAT_ADPCM_Write(OPL->deltat,r-0x07,v);
  1567.             break;
  1568.  
  1569.         case 0x15:      /* DAC data high 8 bits (F7,F6...F2) */
  1570.         case 0x16:      /* DAC data low 2 bits (F1, F0 in bits 7,6) */
  1571.         case 0x17:      /* DAC data shift (S2,S1,S0 in bits 2,1,0) */
  1572.             logerror("FMOPL.C: DAC data register written, but not implemented reg=%02x val=%02x\n",r,v);
  1573.             break;
  1574.  
  1575.         case 0x18:      /* I/O CTRL (Direction) */
  1576.             if(OPL->type&OPL_TYPE_IO)
  1577.                 OPL->portDirection = v&0x0f;
  1578.             break;
  1579.         case 0x19:      /* I/O DATA */
  1580.             if(OPL->type&OPL_TYPE_IO)
  1581.             {
  1582.                 OPL->portLatch = v;
  1583.                 if(OPL->porthandler_w)
  1584.                     OPL->porthandler_w(OPL->port_param,v&OPL->portDirection);
  1585.             }
  1586.             break;
  1587. #endif
  1588.         default:
  1589.           //            logerror("FMOPL.C: write to unknown register: %02x\n",r);
  1590.             break;
  1591.         }
  1592.         break;
  1593.     case 0x20:  /* am ON, vib ON, ksr, eg_type, mul */
  1594.         slot = slot_array[r&0x1f];
  1595.         if(slot < 0) return;
  1596.         set_mul(OPL,slot,v);
  1597.         break;
  1598.     case 0x40:
  1599.         slot = slot_array[r&0x1f];
  1600.         if(slot < 0) return;
  1601.         set_ksl_tl(OPL,slot,v);
  1602.         break;
  1603.     case 0x60:
  1604.         slot = slot_array[r&0x1f];
  1605.         if(slot < 0) return;
  1606.         set_ar_dr(OPL,slot,v);
  1607.         break;
  1608.     case 0x80:
  1609.         slot = slot_array[r&0x1f];
  1610.         if(slot < 0) return;
  1611.         set_sl_rr(OPL,slot,v);
  1612.         break;
  1613.     case 0xa0:
  1614.         if (r == 0xbd)          /* am depth, vibrato depth, r,bd,sd,tom,tc,hh */
  1615.         {
  1616.             OPL->lfo_am_depth = v & 0x80;
  1617.             OPL->lfo_pm_depth_range = (v&0x40) ? 8 : 0;
  1618.  
  1619.             OPL->rhythm  = v&0x3f;
  1620.  
  1621.             if(OPL->rhythm&0x20)
  1622.             {
  1623.                 /* BD key on/off */
  1624.                 if(v&0x10)
  1625.                 {
  1626.                     FM_KEYON (&OPL->P_CH[6].SLOT[SLOT1], 2);
  1627.                     FM_KEYON (&OPL->P_CH[6].SLOT[SLOT2], 2);
  1628.                 }
  1629.                 else
  1630.                 {
  1631.                     FM_KEYOFF(&OPL->P_CH[6].SLOT[SLOT1],~2);
  1632.                     FM_KEYOFF(&OPL->P_CH[6].SLOT[SLOT2],~2);
  1633.                 }
  1634.                 /* HH key on/off */
  1635.                 if(v&0x01) FM_KEYON (&OPL->P_CH[7].SLOT[SLOT1], 2);
  1636.                 else       FM_KEYOFF(&OPL->P_CH[7].SLOT[SLOT1],~2);
  1637.                 /* SD key on/off */
  1638.                 if(v&0x08) FM_KEYON (&OPL->P_CH[7].SLOT[SLOT2], 2);
  1639.                 else       FM_KEYOFF(&OPL->P_CH[7].SLOT[SLOT2],~2);
  1640.                 /* TOM key on/off */
  1641.                 if(v&0x04) FM_KEYON (&OPL->P_CH[8].SLOT[SLOT1], 2);
  1642.                 else       FM_KEYOFF(&OPL->P_CH[8].SLOT[SLOT1],~2);
  1643.                 /* TOP-CY key on/off */
  1644.                 if(v&0x02) FM_KEYON (&OPL->P_CH[8].SLOT[SLOT2], 2);
  1645.                 else       FM_KEYOFF(&OPL->P_CH[8].SLOT[SLOT2],~2);
  1646.             }
  1647.             else
  1648.             {
  1649.                 /* BD key off */
  1650.                 FM_KEYOFF(&OPL->P_CH[6].SLOT[SLOT1],~2);
  1651.                 FM_KEYOFF(&OPL->P_CH[6].SLOT[SLOT2],~2);
  1652.                 /* HH key off */
  1653.                 FM_KEYOFF(&OPL->P_CH[7].SLOT[SLOT1],~2);
  1654.                 /* SD key off */
  1655.                 FM_KEYOFF(&OPL->P_CH[7].SLOT[SLOT2],~2);
  1656.                 /* TOM key off */
  1657.                 FM_KEYOFF(&OPL->P_CH[8].SLOT[SLOT1],~2);
  1658.                 /* TOP-CY off */
  1659.                 FM_KEYOFF(&OPL->P_CH[8].SLOT[SLOT2],~2);
  1660.             }
  1661.             return;
  1662.         }
  1663.         /* keyon,block,fnum */
  1664.         if( (r&0x0f) > 8) return;
  1665.         CH = &OPL->P_CH[r&0x0f];
  1666.         if(!(r&0x10))
  1667.         {   /* a0-a8 */
  1668.             block_fnum  = (CH->block_fnum&0x1f00) | v;
  1669.         }
  1670.         else
  1671.         {   /* b0-b8 */
  1672.             block_fnum = ((v&0x1f)<<8) | (CH->block_fnum&0xff);
  1673.  
  1674.             if(v&0x20)
  1675.             {
  1676.                 FM_KEYON (&CH->SLOT[SLOT1], 1);
  1677.                 FM_KEYON (&CH->SLOT[SLOT2], 1);
  1678.             }
  1679.             else
  1680.             {
  1681.                 FM_KEYOFF(&CH->SLOT[SLOT1],~1);
  1682.                 FM_KEYOFF(&CH->SLOT[SLOT2],~1);
  1683.             }
  1684.         }
  1685.         /* update */
  1686.         if(CH->block_fnum != block_fnum)
  1687.         {
  1688.             UINT8 block  = block_fnum >> 10;
  1689.  
  1690.             CH->block_fnum = block_fnum;
  1691.  
  1692.             CH->ksl_base = ksl_tab[block_fnum>>6];
  1693.             CH->fc       = OPL->fn_tab[block_fnum&0x03ff] >> (7-block);
  1694.  
  1695.             /* BLK 2,1,0 bits -> bits 3,2,1 of kcode */
  1696.             CH->kcode    = (CH->block_fnum&0x1c00)>>9;
  1697.  
  1698.              /* the info below is actually opposite to what is stated in the Manuals (verifed on real YM3812) */
  1699.             /* if notesel == 0 -> lsb of kcode is bit 10 (MSB) of fnum  */
  1700.             /* if notesel == 1 -> lsb of kcode is bit 9 (MSB-1) of fnum */
  1701.             if (OPL->mode&0x40)
  1702.                 CH->kcode |= (CH->block_fnum&0x100)>>8; /* notesel == 1 */
  1703.             else
  1704.                 CH->kcode |= (CH->block_fnum&0x200)>>9; /* notesel == 0 */
  1705.  
  1706.             /* refresh Total Level in both SLOTs of this channel */
  1707.             CH->SLOT[SLOT1].TLL = CH->SLOT[SLOT1].TL + (CH->ksl_base>>CH->SLOT[SLOT1].ksl);
  1708.             CH->SLOT[SLOT2].TLL = CH->SLOT[SLOT2].TL + (CH->ksl_base>>CH->SLOT[SLOT2].ksl);
  1709.  
  1710.             /* refresh frequency counter in both SLOTs of this channel */
  1711.             CALC_FCSLOT(CH,&CH->SLOT[SLOT1]);
  1712.             CALC_FCSLOT(CH,&CH->SLOT[SLOT2]);
  1713.         }
  1714.         break;
  1715.     case 0xc0:
  1716.         /* FB,C */
  1717.         if( (r&0x0f) > 8) return;
  1718.         CH = &OPL->P_CH[r&0x0f];
  1719.         CH->SLOT[SLOT1].FB  = (v>>1)&7 ? ((v>>1)&7) + 7 : 0;
  1720.         CH->SLOT[SLOT1].CON = v&1;
  1721.         CH->SLOT[SLOT1].connect1 = CH->SLOT[SLOT1].CON ? &output[0] : &phase_modulation;
  1722.         break;
  1723.     case 0xe0: /* waveform select */
  1724.         /* simply ignore write to the waveform select register if selecting not enabled in test register */
  1725.         if(OPL->wavesel)
  1726.         {
  1727.             slot = slot_array[r&0x1f];
  1728.             if(slot < 0) return;
  1729.             CH = &OPL->P_CH[slot/2];
  1730.  
  1731.             CH->SLOT[slot&1].wavetable = (v&0x03)*SIN_LEN;
  1732.         }
  1733.         break;
  1734.     }
  1735. }
  1736.  
  1737. #ifdef LOG_CYM_FILE
  1738. static void cymfile_callback (int n)
  1739. {
  1740.     if (cymfile)
  1741.     {
  1742.         fputc( (unsigned char)0, cymfile );
  1743.     }
  1744. }
  1745. #endif
  1746.  
  1747. /* lock/unlock for common table */
  1748. static int OPL_LockTable(void)
  1749. {
  1750.     num_lock++;
  1751.     if(num_lock>1) return 0;
  1752.  
  1753.     /* first time */
  1754.  
  1755.     cur_chip = NULL;
  1756.     /* allocate total level table (128kb space) */
  1757.     if( !init_tables() )
  1758.     {
  1759.         num_lock--;
  1760.         return -1;
  1761.     }
  1762.  
  1763. #ifdef LOG_CYM_FILE
  1764.     cymfile = fopen("3812_.cym","wb");
  1765.     if (cymfile)
  1766.         timer_pulse ( TIME_IN_HZ(110), 0, cymfile_callback); /*110 Hz pulse timer*/
  1767.     else
  1768.         logerror("Could not create file 3812_.cym\n");
  1769. #endif
  1770.  
  1771.     return 0;
  1772. }
  1773.  
  1774. static void OPL_UnLockTable(void)
  1775. {
  1776.     if(num_lock) num_lock--;
  1777.     if(num_lock) return;
  1778.  
  1779.     /* last time */
  1780.  
  1781.     cur_chip = NULL;
  1782.     OPLCloseTable();
  1783.  
  1784. #ifdef LOG_CYM_FILE
  1785.     fclose (cymfile);
  1786.     cymfile = NULL;
  1787. #endif
  1788.  
  1789. }
  1790.  
  1791. static void OPLResetChip(FM_OPL *OPL)
  1792. {
  1793.     int c,s;
  1794.     int i;
  1795.  
  1796.     OPL->eg_timer = 0;
  1797.     OPL->eg_cnt   = 0;
  1798.  
  1799.     OPL->noise_rng = 1; /* noise shift register */
  1800.     OPL->mode   = 0;    /* normal mode */
  1801.     OPL_STATUS_RESET(OPL,0x7f);
  1802.  
  1803.     /* reset with register write */
  1804.     OPLWriteReg(OPL,0x01,0); /* wavesel disable */
  1805.     OPLWriteReg(OPL,0x02,0); /* Timer1 */
  1806.     OPLWriteReg(OPL,0x03,0); /* Timer2 */
  1807.     OPLWriteReg(OPL,0x04,0); /* IRQ mask clear */
  1808.     for(i = 0xff ; i >= 0x20 ; i-- ) OPLWriteReg(OPL,i,0);
  1809.  
  1810.     /* reset operator parameters */
  1811.     for( c = 0 ; c < 9 ; c++ )
  1812.     {
  1813.         OPL_CH *CH = &OPL->P_CH[c];
  1814.         for(s = 0 ; s < 2 ; s++ )
  1815.         {
  1816.             /* wave table */
  1817.             CH->SLOT[s].wavetable = 0;
  1818.             CH->SLOT[s].state     = EG_OFF;
  1819.             CH->SLOT[s].volume    = MAX_ATT_INDEX;
  1820.         }
  1821.     }
  1822. #if BUILD_Y8950
  1823.     if(OPL->type&OPL_TYPE_ADPCM)
  1824.     {
  1825.         YM_DELTAT *DELTAT = OPL->deltat;
  1826.  
  1827.         DELTAT->freqbase = OPL->freqbase;
  1828.         DELTAT->output_pointer = &output_deltat[0];
  1829.         DELTAT->portshift = 5;
  1830.         DELTAT->output_range = 1<<23;
  1831.         YM_DELTAT_ADPCM_Reset(DELTAT,0,YM_DELTAT_EMULATION_MODE_NORMAL);
  1832.     }
  1833. #endif
  1834. }
  1835.  
  1836. /* Create one of virtual YM3812/YM3526/Y8950 */
  1837. /* 'clock' is chip clock in Hz  */
  1838. /* 'rate'  is sampling rate  */
  1839. static FM_OPL *OPLCreate(int type, int clock, int rate)
  1840. {
  1841.     char *ptr;
  1842.     FM_OPL *OPL;
  1843.     int state_size;
  1844.  
  1845.     if (OPL_LockTable() ==-1) return NULL;
  1846.  
  1847.     /* calculate OPL state size */
  1848.     state_size  = sizeof(FM_OPL);
  1849.  
  1850. #if BUILD_Y8950
  1851.     if (type&OPL_TYPE_ADPCM) state_size+= sizeof(YM_DELTAT);
  1852. #endif
  1853.  
  1854.     /* allocate memory block */
  1855.     ptr = malloc(state_size);
  1856.  
  1857.     if (ptr==NULL)
  1858.         return NULL;
  1859.  
  1860.     /* clear */
  1861.     memset(ptr,0,state_size);
  1862.  
  1863.     OPL  = (FM_OPL *)ptr;
  1864.  
  1865.     ptr += sizeof(FM_OPL);
  1866.  
  1867. #if BUILD_Y8950
  1868.     if (type&OPL_TYPE_ADPCM)
  1869.     {
  1870.         OPL->deltat = (YM_DELTAT *)ptr;
  1871.     }
  1872.     ptr += sizeof(YM_DELTAT);
  1873. #endif
  1874.  
  1875.     OPL->type  = type;
  1876.     OPL->clock = clock;
  1877.     OPL->rate  = rate;
  1878.  
  1879.     /* init global tables */
  1880.     OPL_initalize(OPL);
  1881.  
  1882.     return OPL;
  1883. }
  1884.  
  1885. /* Destroy one of virtual YM3812 */
  1886. static void OPLDestroy(FM_OPL *OPL)
  1887. {
  1888.     OPL_UnLockTable();
  1889.     free(OPL);
  1890. }
  1891.  
  1892. /* Optional handlers */
  1893.  
  1894. static void OPLSetTimerHandler(FM_OPL *OPL,OPL_TIMERHANDLER TimerHandler,void *param)
  1895. {
  1896.     OPL->TimerHandler   = TimerHandler;
  1897.     OPL->TimerParam = param;
  1898. }
  1899. static void OPLSetIRQHandler(FM_OPL *OPL,OPL_IRQHANDLER IRQHandler,void *param)
  1900. {
  1901.     OPL->IRQHandler     = IRQHandler;
  1902.     OPL->IRQParam = param;
  1903. }
  1904. static void OPLSetUpdateHandler(FM_OPL *OPL,OPL_UPDATEHANDLER UpdateHandler,void *param)
  1905. {
  1906.     OPL->UpdateHandler = UpdateHandler;
  1907.     OPL->UpdateParam = param;
  1908. }
  1909.  
  1910. static int OPLWrite(FM_OPL *OPL,int a,int v)
  1911. {
  1912.     if( !(a&1) )
  1913.     {   /* address port */
  1914.         OPL->address = v & 0xff;
  1915.     }
  1916.     else
  1917.     {   /* data port */
  1918.         if(OPL->UpdateHandler) OPL->UpdateHandler(OPL->UpdateParam,0);
  1919.         OPLWriteReg(OPL,OPL->address,v);
  1920.     }
  1921.     return OPL->status>>7;
  1922. }
  1923.  
  1924. static unsigned char OPLRead(FM_OPL *OPL,int a)
  1925. {
  1926.     if( !(a&1) )
  1927.     {
  1928.         /* status port */
  1929.  
  1930.         #if BUILD_Y8950
  1931.  
  1932.         if(OPL->type&OPL_TYPE_ADPCM)    /* Y8950 */
  1933.         {
  1934.             return (OPL->status & (OPL->statusmask|0x80)) | (OPL->deltat->PCM_BSY&1);
  1935.         }
  1936.  
  1937.         #endif
  1938.  
  1939.         /* OPL and OPL2 */
  1940.         return OPL->status & (OPL->statusmask|0x80);
  1941.     }
  1942.  
  1943. #if BUILD_Y8950
  1944.     /* data port */
  1945.     switch(OPL->address)
  1946.     {
  1947.     case 0x05: /* KeyBoard IN */
  1948.         if(OPL->type&OPL_TYPE_KEYBOARD)
  1949.         {
  1950.             if(OPL->keyboardhandler_r)
  1951.                 return OPL->keyboardhandler_r(OPL->keyboard_param);
  1952.             else
  1953.                 logerror("Y8950: read unmapped KEYBOARD port\n");
  1954.         }
  1955.         return 0;
  1956.  
  1957.     case 0x0f: /* ADPCM-DATA  */
  1958.         if(OPL->type&OPL_TYPE_ADPCM)
  1959.         {
  1960.             UINT8 val;
  1961.  
  1962.             val = YM_DELTAT_ADPCM_Read(OPL->deltat);
  1963.             /*logerror("Y8950: read ADPCM value read=%02x\n",val);*/
  1964.             return val;
  1965.         }
  1966.         return 0;
  1967.  
  1968.     case 0x19: /* I/O DATA    */
  1969.         if(OPL->type&OPL_TYPE_IO)
  1970.         {
  1971.             if(OPL->porthandler_r)
  1972.                 return OPL->porthandler_r(OPL->port_param);
  1973.             else
  1974.                 logerror("Y8950:read unmapped I/O port\n");
  1975.         }
  1976.         return 0;
  1977.     case 0x1a: /* PCM-DATA    */
  1978.         if(OPL->type&OPL_TYPE_ADPCM)
  1979.         {
  1980.             logerror("Y8950 A/D convertion is accessed but not implemented !\n");
  1981.             return 0x80; /* 2's complement PCM data - result from A/D convertion */
  1982.         }
  1983.         return 0;
  1984.     }
  1985. #endif
  1986.  
  1987.     return 0xff;
  1988. }
  1989.  
  1990. /* CSM Key Controll */
  1991. INLINE void CSMKeyControll(OPL_CH *CH)
  1992. {
  1993.     FM_KEYON (&CH->SLOT[SLOT1], 4);
  1994.     FM_KEYON (&CH->SLOT[SLOT2], 4);
  1995.  
  1996.     /* The key off should happen exactly one sample later - not implemented correctly yet */
  1997.  
  1998.     FM_KEYOFF(&CH->SLOT[SLOT1], ~4);
  1999.     FM_KEYOFF(&CH->SLOT[SLOT2], ~4);
  2000. }
  2001.  
  2002.  
  2003. static int OPLTimerOver(FM_OPL *OPL,int c)
  2004. {
  2005.     if( c )
  2006.     {   /* Timer B */
  2007.         OPL_STATUS_SET(OPL,0x20);
  2008.     }
  2009.     else
  2010.     {   /* Timer A */
  2011.         OPL_STATUS_SET(OPL,0x40);
  2012.         /* CSM mode key,TL controll */
  2013.         if( OPL->mode & 0x80 )
  2014.         {   /* CSM mode total level latch and auto key on */
  2015.             int ch;
  2016.             if(OPL->UpdateHandler) OPL->UpdateHandler(OPL->UpdateParam,0);
  2017.             for(ch=0; ch<9; ch++)
  2018.                 CSMKeyControll( &OPL->P_CH[ch] );
  2019.         }
  2020.     }
  2021.     /* reload timer */
  2022.     if (OPL->TimerHandler) (OPL->TimerHandler)(OPL->TimerParam,c,(double)OPL->T[c]*OPL->TimerBase);
  2023.     return OPL->status>>7;
  2024. }
  2025.  
  2026.  
  2027. #define MAX_OPL_CHIPS 2
  2028.  
  2029.  
  2030. #if (BUILD_YM3812)
  2031.  
  2032. void * YM3812Init(int clock, int rate)
  2033. {
  2034.     /* emulator create */
  2035.     FM_OPL *YM3812 = OPLCreate(OPL_TYPE_YM3812,clock,rate);
  2036.     if (YM3812)
  2037.         YM3812ResetChip(YM3812);
  2038.     return YM3812;
  2039. }
  2040.  
  2041. void YM3812Shutdown(void *chip)
  2042. {
  2043.     FM_OPL *YM3812 = chip;
  2044.  
  2045.     /* emulator shutdown */
  2046.     OPLDestroy(YM3812);
  2047. }
  2048. void YM3812ResetChip(void *chip)
  2049. {
  2050.     FM_OPL *YM3812 = chip;
  2051.     OPLResetChip(YM3812);
  2052. }
  2053.  
  2054. int YM3812Write(void *chip, int a, int v)
  2055. {
  2056.     FM_OPL *YM3812 = chip;
  2057.     return OPLWrite(YM3812, a, v);
  2058. }
  2059.  
  2060. unsigned char YM3812Read(void *chip, int a)
  2061. {
  2062.     FM_OPL *YM3812 = chip;
  2063.     /* YM3812 always returns bit2 and bit1 in HIGH state */
  2064.     return OPLRead(YM3812, a) | 0x06 ;
  2065. }
  2066. int YM3812TimerOver(void *chip, int c)
  2067. {
  2068.     FM_OPL *YM3812 = chip;
  2069.     return OPLTimerOver(YM3812, c);
  2070. }
  2071.  
  2072. void YM3812SetTimerHandler(void *chip, OPL_TIMERHANDLER TimerHandler, void *param)
  2073. {
  2074.     FM_OPL *YM3812 = chip;
  2075.     OPLSetTimerHandler(YM3812, TimerHandler, param);
  2076. }
  2077. void YM3812SetIRQHandler(void *chip,OPL_IRQHANDLER IRQHandler,void *param)
  2078. {
  2079.     FM_OPL *YM3812 = chip;
  2080.     OPLSetIRQHandler(YM3812, IRQHandler, param);
  2081. }
  2082. void YM3812SetUpdateHandler(void *chip,OPL_UPDATEHANDLER UpdateHandler,void *param)
  2083. {
  2084.     FM_OPL *YM3812 = chip;
  2085.     OPLSetUpdateHandler(YM3812, UpdateHandler, param);
  2086. }
  2087.  
  2088.  
  2089. /*
  2090. ** Generate samples for one of the YM3812's
  2091. **
  2092. ** 'which' is the virtual YM3812 number
  2093. ** '*buffer' is the output buffer pointer
  2094. ** 'length' is the number of samples that should be generated
  2095. */
  2096. void YM3812UpdateOne(void *chip, OPLSAMPLE *buffer, int length)
  2097. {
  2098.     FM_OPL      *OPL = chip;
  2099.     UINT8       rhythm = OPL->rhythm&0x20;
  2100.     OPLSAMPLE   *buf = buffer;
  2101.     int i;
  2102.  
  2103.     if( (void *)OPL != cur_chip ){
  2104.         cur_chip = (void *)OPL;
  2105.         /* rhythm slots */
  2106.         SLOT7_1 = &OPL->P_CH[7].SLOT[SLOT1];
  2107.         SLOT7_2 = &OPL->P_CH[7].SLOT[SLOT2];
  2108.         SLOT8_1 = &OPL->P_CH[8].SLOT[SLOT1];
  2109.         SLOT8_2 = &OPL->P_CH[8].SLOT[SLOT2];
  2110.     }
  2111.     for( i=0; i < length ; i++ )
  2112.     {
  2113.         int lt;
  2114.  
  2115.         output[0] = 0;
  2116.  
  2117.         advance_lfo(OPL);
  2118.  
  2119.         /* FM part */
  2120.         OPL_CALC_CH(&OPL->P_CH[0]);
  2121.         OPL_CALC_CH(&OPL->P_CH[1]);
  2122.         OPL_CALC_CH(&OPL->P_CH[2]);
  2123.         OPL_CALC_CH(&OPL->P_CH[3]);
  2124.         OPL_CALC_CH(&OPL->P_CH[4]);
  2125.         OPL_CALC_CH(&OPL->P_CH[5]);
  2126.  
  2127.         if(!rhythm)
  2128.         {
  2129.             OPL_CALC_CH(&OPL->P_CH[6]);
  2130.             OPL_CALC_CH(&OPL->P_CH[7]);
  2131.             OPL_CALC_CH(&OPL->P_CH[8]);
  2132.         }
  2133.         else        /* Rhythm part */
  2134.         {
  2135.             OPL_CALC_RH(&OPL->P_CH[0], (OPL->noise_rng>>0)&1 );
  2136.         }
  2137.  
  2138.         lt = output[0];
  2139.  
  2140.         lt >>= FINAL_SH;
  2141.  
  2142.         /* limit check */
  2143.         lt = limit( lt , MAXOUT, MINOUT );
  2144.  
  2145.         #ifdef SAVE_SAMPLE
  2146.         if (which==0)
  2147.         {
  2148.             SAVE_ALL_CHANNELS
  2149.         }
  2150.         #endif
  2151.  
  2152.         /* store to sound buffer */
  2153.         buf[i] = lt;
  2154.  
  2155.         advance(OPL);
  2156.     }
  2157.  
  2158. }
  2159. #endif /* BUILD_YM3812 */
  2160.  
  2161.  
  2162.  
  2163. #if (BUILD_YM3526)
  2164.  
  2165. void *YM3526Init(int clock, int rate)
  2166. {
  2167.     /* emulator create */
  2168.     FM_OPL *YM3526 = OPLCreate(OPL_TYPE_YM3526,clock,rate);
  2169.     if (YM3526)
  2170.         YM3526ResetChip(YM3526);
  2171.     return YM3526;
  2172. }
  2173.  
  2174. void YM3526Shutdown(void *chip)
  2175. {
  2176.     FM_OPL *YM3526 = chip;
  2177.     /* emulator shutdown */
  2178.     OPLDestroy(YM3526);
  2179. }
  2180. void YM3526ResetChip(void *chip)
  2181. {
  2182.     FM_OPL *YM3526 = chip;
  2183.     OPLResetChip(YM3526);
  2184. }
  2185.  
  2186. int YM3526Write(void *chip, int a, int v)
  2187. {
  2188.     FM_OPL *YM3526 = chip;
  2189.     return OPLWrite(YM3526, a, v);
  2190. }
  2191.  
  2192. unsigned char YM3526Read(void *chip, int a)
  2193. {
  2194.     FM_OPL *YM3526 = chip;
  2195.     /* YM3526 always returns bit2 and bit1 in HIGH state */
  2196.     return OPLRead(YM3526, a) | 0x06 ;
  2197. }
  2198. int YM3526TimerOver(void *chip, int c)
  2199. {
  2200.     FM_OPL *YM3526 = chip;
  2201.     return OPLTimerOver(YM3526, c);
  2202. }
  2203.  
  2204. void YM3526SetTimerHandler(void *chip, OPL_TIMERHANDLER TimerHandler, void *param)
  2205. {
  2206.     FM_OPL *YM3526 = chip;
  2207.     OPLSetTimerHandler(YM3526, TimerHandler, param);
  2208. }
  2209. void YM3526SetIRQHandler(void *chip,OPL_IRQHANDLER IRQHandler,void *param)
  2210. {
  2211.     FM_OPL *YM3526 = chip;
  2212.     OPLSetIRQHandler(YM3526, IRQHandler, param);
  2213. }
  2214. void YM3526SetUpdateHandler(void *chip,OPL_UPDATEHANDLER UpdateHandler,void *param)
  2215. {
  2216.     FM_OPL *YM3526 = chip;
  2217.     OPLSetUpdateHandler(YM3526, UpdateHandler, param);
  2218. }
  2219.  
  2220.  
  2221. /*
  2222. ** Generate samples for one of the YM3526's
  2223. **
  2224. ** 'which' is the virtual YM3526 number
  2225. ** '*buffer' is the output buffer pointer
  2226. ** 'length' is the number of samples that should be generated
  2227. */
  2228. void YM3526UpdateOne(void *chip, OPLSAMPLE *buffer, int length)
  2229. {
  2230.     FM_OPL      *OPL = chip;
  2231.     UINT8       rhythm = OPL->rhythm&0x20;
  2232.     OPLSAMPLE   *buf = buffer;
  2233.     int i;
  2234.  
  2235.     if( (void *)OPL != cur_chip ){
  2236.         cur_chip = (void *)OPL;
  2237.         /* rhythm slots */
  2238.         SLOT7_1 = &OPL->P_CH[7].SLOT[SLOT1];
  2239.         SLOT7_2 = &OPL->P_CH[7].SLOT[SLOT2];
  2240.         SLOT8_1 = &OPL->P_CH[8].SLOT[SLOT1];
  2241.         SLOT8_2 = &OPL->P_CH[8].SLOT[SLOT2];
  2242.     }
  2243.     for( i=0; i < length ; i++ )
  2244.     {
  2245.         int lt;
  2246.  
  2247.         output[0] = 0;
  2248.  
  2249.         advance_lfo(OPL);
  2250.  
  2251.         /* FM part */
  2252.         OPL_CALC_CH(&OPL->P_CH[0]);
  2253.         OPL_CALC_CH(&OPL->P_CH[1]);
  2254.         OPL_CALC_CH(&OPL->P_CH[2]);
  2255.         OPL_CALC_CH(&OPL->P_CH[3]);
  2256.         OPL_CALC_CH(&OPL->P_CH[4]);
  2257.         OPL_CALC_CH(&OPL->P_CH[5]);
  2258.  
  2259.         if(!rhythm)
  2260.         {
  2261.             OPL_CALC_CH(&OPL->P_CH[6]);
  2262.             OPL_CALC_CH(&OPL->P_CH[7]);
  2263.             OPL_CALC_CH(&OPL->P_CH[8]);
  2264.         }
  2265.         else        /* Rhythm part */
  2266.         {
  2267.             OPL_CALC_RH(&OPL->P_CH[0], (OPL->noise_rng>>0)&1 );
  2268.         }
  2269.  
  2270.         lt = output[0];
  2271.  
  2272.         lt >>= FINAL_SH;
  2273.  
  2274.         /* limit check */
  2275.         lt = limit( lt , MAXOUT, MINOUT );
  2276.  
  2277.         #ifdef SAVE_SAMPLE
  2278.         if (which==0)
  2279.         {
  2280.             SAVE_ALL_CHANNELS
  2281.         }
  2282.         #endif
  2283.  
  2284.         /* store to sound buffer */
  2285.         buf[i] = lt;
  2286.  
  2287.         advance(OPL);
  2288.     }
  2289.  
  2290. }
  2291. #endif /* BUILD_YM3526 */
  2292.  
  2293.  
  2294.  
  2295.  
  2296. #if BUILD_Y8950
  2297.  
  2298. static void Y8950_deltat_status_set(void *chip, UINT8 changebits)
  2299. {
  2300.     FM_OPL *Y8950 = chip;
  2301.     OPL_STATUS_SET(Y8950, changebits);
  2302. }
  2303. static void Y8950_deltat_status_reset(void *chip, UINT8 changebits)
  2304. {
  2305.     FM_OPL *Y8950 = chip;
  2306.     OPL_STATUS_RESET(Y8950, changebits);
  2307. }
  2308.  
  2309. void *Y8950Init(int clock, int rate)
  2310. {
  2311.     /* emulator create */
  2312.     FM_OPL *Y8950 = OPLCreate(OPL_TYPE_Y8950,clock,rate);
  2313.     if (Y8950)
  2314.     {
  2315.         Y8950->deltat->status_set_handler = Y8950_deltat_status_set;
  2316.         Y8950->deltat->status_reset_handler = Y8950_deltat_status_reset;
  2317.         Y8950->deltat->status_change_which_chip = Y8950;
  2318.         Y8950->deltat->status_change_EOS_bit = 0x10;        /* status flag: set bit4 on End Of Sample */
  2319.         Y8950->deltat->status_change_BRDY_bit = 0x08;   /* status flag: set bit3 on BRDY (End Of: ADPCM analysis/synthesis, memory reading/writing) */
  2320.  
  2321.         /*Y8950->deltat->write_time = 10.0 / clock;*/       /* a single byte write takes 10 cycles of main clock */
  2322.         /*Y8950->deltat->read_time  = 8.0 / clock;*/        /* a single byte read takes 8 cycles of main clock */
  2323.         /* reset */
  2324.         Y8950ResetChip(Y8950);
  2325.     }
  2326.  
  2327.     return Y8950;
  2328. }
  2329.  
  2330. void Y8950Shutdown(void *chip)
  2331. {
  2332.     FM_OPL *Y8950 = chip;
  2333.     /* emulator shutdown */
  2334.     OPLDestroy(Y8950);
  2335. }
  2336. void Y8950ResetChip(void *chip)
  2337. {
  2338.     FM_OPL *Y8950 = chip;
  2339.     OPLResetChip(Y8950);
  2340. }
  2341.  
  2342. int Y8950Write(void *chip, int a, int v)
  2343. {
  2344.     FM_OPL *Y8950 = chip;
  2345.     return OPLWrite(Y8950, a, v);
  2346. }
  2347.  
  2348. unsigned char Y8950Read(void *chip, int a)
  2349. {
  2350.     FM_OPL *Y8950 = chip;
  2351.     return OPLRead(Y8950, a);
  2352. }
  2353. int Y8950TimerOver(void *chip, int c)
  2354. {
  2355.     FM_OPL *Y8950 = chip;
  2356.     return OPLTimerOver(Y8950, c);
  2357. }
  2358.  
  2359. void Y8950SetTimerHandler(void *chip, OPL_TIMERHANDLER TimerHandler, void *param)
  2360. {
  2361.     FM_OPL *Y8950 = chip;
  2362.     OPLSetTimerHandler(Y8950, TimerHandler, param);
  2363. }
  2364. void Y8950SetIRQHandler(void *chip,OPL_IRQHANDLER IRQHandler,void *param)
  2365. {
  2366.     FM_OPL *Y8950 = chip;
  2367.     OPLSetIRQHandler(Y8950, IRQHandler, param);
  2368. }
  2369. void Y8950SetUpdateHandler(void *chip,OPL_UPDATEHANDLER UpdateHandler,void *param)
  2370. {
  2371.     FM_OPL *Y8950 = chip;
  2372.     OPLSetUpdateHandler(Y8950, UpdateHandler, param);
  2373. }
  2374.  
  2375. void Y8950SetDeltaTMemory(void *chip, void * deltat_mem_ptr, int deltat_mem_size )
  2376. {
  2377.     FM_OPL      *OPL = chip;
  2378.     OPL->deltat->memory = (UINT8 *)(deltat_mem_ptr);
  2379.     OPL->deltat->memory_size = deltat_mem_size;
  2380. }
  2381.  
  2382. /*
  2383. ** Generate samples for one of the Y8950's
  2384. **
  2385. ** 'which' is the virtual Y8950 number
  2386. ** '*buffer' is the output buffer pointer
  2387. ** 'length' is the number of samples that should be generated
  2388. */
  2389. void Y8950UpdateOne(void *chip, OPLSAMPLE *buffer, int length)
  2390. {
  2391.     int i;
  2392.     FM_OPL      *OPL = chip;
  2393.     UINT8       rhythm  = OPL->rhythm&0x20;
  2394.     YM_DELTAT   *DELTAT = OPL->deltat;
  2395.     OPLSAMPLE   *buf    = buffer;
  2396.  
  2397.     if( (void *)OPL != cur_chip ){
  2398.         cur_chip = (void *)OPL;
  2399.         /* rhythm slots */
  2400.         SLOT7_1 = &OPL->P_CH[7].SLOT[SLOT1];
  2401.         SLOT7_2 = &OPL->P_CH[7].SLOT[SLOT2];
  2402.         SLOT8_1 = &OPL->P_CH[8].SLOT[SLOT1];
  2403.         SLOT8_2 = &OPL->P_CH[8].SLOT[SLOT2];
  2404.  
  2405.     }
  2406.     for( i=0; i < length ; i++ )
  2407.     {
  2408.         int lt;
  2409.  
  2410.         output[0] = 0;
  2411.         output_deltat[0] = 0;
  2412.  
  2413.         advance_lfo(OPL);
  2414.  
  2415.         /* deltaT ADPCM */
  2416.         if( DELTAT->portstate&0x80 )
  2417.             YM_DELTAT_ADPCM_CALC(DELTAT);
  2418.  
  2419.         /* FM part */
  2420.         OPL_CALC_CH(&OPL->P_CH[0]);
  2421.         OPL_CALC_CH(&OPL->P_CH[1]);
  2422.         OPL_CALC_CH(&OPL->P_CH[2]);
  2423.         OPL_CALC_CH(&OPL->P_CH[3]);
  2424.         OPL_CALC_CH(&OPL->P_CH[4]);
  2425.         OPL_CALC_CH(&OPL->P_CH[5]);
  2426.  
  2427.         if(!rhythm)
  2428.         {
  2429.             OPL_CALC_CH(&OPL->P_CH[6]);
  2430.             OPL_CALC_CH(&OPL->P_CH[7]);
  2431.             OPL_CALC_CH(&OPL->P_CH[8]);
  2432.         }
  2433.         else        /* Rhythm part */
  2434.         {
  2435.             OPL_CALC_RH(&OPL->P_CH[0], (OPL->noise_rng>>0)&1 );
  2436.         }
  2437.  
  2438.         lt = output[0] + (output_deltat[0]>>11);
  2439.  
  2440.         lt >>= FINAL_SH;
  2441.  
  2442.         /* limit check */
  2443.         lt = limit( lt , MAXOUT, MINOUT );
  2444.  
  2445.         #ifdef SAVE_SAMPLE
  2446.         if (which==0)
  2447.         {
  2448.             SAVE_ALL_CHANNELS
  2449.         }
  2450.         #endif
  2451.  
  2452.         /* store to sound buffer */
  2453.         buf[i] = lt;
  2454.  
  2455.         advance(OPL);
  2456.     }
  2457.  
  2458. }
  2459.  
  2460. void Y8950SetPortHandler(void *chip,OPL_PORTHANDLER_W PortHandler_w,OPL_PORTHANDLER_R PortHandler_r,void * param)
  2461. {
  2462.     FM_OPL      *OPL = chip;
  2463.     OPL->porthandler_w = PortHandler_w;
  2464.     OPL->porthandler_r = PortHandler_r;
  2465.     OPL->port_param = param;
  2466. }
  2467.  
  2468. void Y8950SetKeyboardHandler(void *chip,OPL_PORTHANDLER_W KeyboardHandler_w,OPL_PORTHANDLER_R KeyboardHandler_r,void * param)
  2469. {
  2470.     FM_OPL      *OPL = chip;
  2471.     OPL->keyboardhandler_w = KeyboardHandler_w;
  2472.     OPL->keyboardhandler_r = KeyboardHandler_r;
  2473.     OPL->keyboard_param = param;
  2474. }
  2475.  
  2476. #endif
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