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- `define GET_N 3'b000//0
- `define GET_R 3'b001//1
- `define READ_A 3'b010//2
- `define READ_X 3'b011//3
- `define READ_B 3'b100//4
- `define WRITE_Y 3'b101//5
- module DFF (clk, next_out, out);
- parameter n = 1;
- input clk;
- input [n-1:0] next_out;
- output reg [n-1:0] out;
- always@(posedge clk) begin
- out <= next_out;
- end
- endmodule
- module MO(clk, reset, in_data, i, j, opcode, out_data, fin);
- input clk, reset;
- input [9:0] in_data;
- output fin;
- output [2:0] opcode;
- output [9:0] i, j;
- output [19:0] out_data;
- wire [9:0] true_n;
- wire [9:0] next_n;
- reg [9:0] n;
- wire [9:0] next_r;
- wire [9:0] true_r;
- reg [9:0] r;
- reg [9:0] temp_r;
- reg [9:0] matA;
- reg [9:0] matA_n;
- wire [9:0] A_rnext;
- wire [9:0] A_r;
- wire [9:0] A_n;
- wire [9:0] A_nnext;
- reg [9:0] matA_r;
- reg [9:0] matX;
- reg [9:0] matX_n;
- reg [9:0] matX_r;
- wire [9:0] X_r;
- wire [9:0] X_rnext;
- wire [9:0] X_n;
- wire [9:0] X_nnext;
- reg [9:0] matB;
- wire [2:0] next_opcode;
- reg [2:0] next_opcode1;
- reg [2:0] temp_op;
- reg [9:0] next_i;
- reg [9:0] temp_i;
- wire [9:0] ti_next;
- wire [9:0] ti;
- reg [9:0] next_j;
- reg [9:0] temp_j;
- wire [9:0] tj;
- wire [9:0] tj_next;
- wire [19:0] next_out;
- reg [19:0] next_out1;
- reg [9:0] ttt1;
- reg [9:0] ttt2;
- reg [9:0] size;
- reg next_fin;
- DFF #(3) DFF1(clk, next_opcode, opcode);
- DFF #(10) DFF2(clk,A_rnext,A_r);
- DFF #(10) DFF3(clk,X_rnext,X_r);
- DFF #(20) DFF4(clk, next_out, out_data);
- DFF #(10) DFF5(clk,A_nnext,A_n);
- DFF #(10) DFF6(clk,X_nnext,X_n);
- DFF #(10) DFF7(clk,ti_next,ti);
- DFF #(10) DFF8(clk,tj_next,tj);
- DFF #(10) DFF9(clk,next_n,true_n);
- DFF #(10) DFF0(clk,next_r,true_r);
- always@(*) begin
- next_opcode1 = opcode;
- next_out1=out_data;
- matA_r = A_r;
- matA_n = A_n;
- matX_r = X_r;
- matX_n = X_n;
- temp_i = ti;
- temp_j = tj;
- n = true_n;
- r = true_r;
- case(opcode)
- `GET_N: begin//0
- next_opcode1 = `GET_R;
- n = in_data;
- matA_n = n;
- matX_n = n;
- next_fin = 1'b0;
- temp_i=10'd0;
- temp_j=10'd0;
- end
- `GET_R:begin//1
- next_opcode1 = `READ_A;
- r=in_data;
- temp_r = r;
- matA_r = r;
- matX_r = r;
- next_fin = 1'b0;
- end
- `READ_A:begin
- next_opcode1 = `READ_X;
- ttt1 = n - matA_n;
- ttt2 = r - matA_r;
- next_i = ttt1;
- next_j = ttt2;
- matA_r = matA_r - 1;
- matA = in_data;
- next_fin = 1'b0;
- end
- `READ_X:begin
- if(matX_r > 0) begin
- ttt1 = r - matX_r;
- ttt2 = n - matX_n;
- next_i = ttt1;
- next_j = ttt2;
- matX = in_data;
- next_out1 = next_out1 + matA * matX;
- matX_r = matX_r - 1;
- if(matX_r == 0)begin
- next_opcode1 = `READ_B;
- temp_op = `READ_B;
- matX_r = r;
- matA_r = r;
- matX_n = matX_n - 1;
- matA_n = (matX_n == 0)? matA_n - 1 : matA_n;
- matX_n = (matX_n == 0)? n : matX_n;
- end
- else begin
- next_opcode1 = `READ_A;
- temp_op = `READ_A;
- end
- end
- else begin end
- next_fin = 1'b0;
- end
- `READ_B:begin
- ttt1 = temp_i;
- ttt2 = temp_j;
- next_i = ttt1;
- next_j = ttt2;
- matB = in_data;
- next_out1 = next_out1 + matB;
- next_opcode1 = `WRITE_Y;
- next_fin = 1'b0;
- end
- `WRITE_Y:begin
- ttt1 = temp_i;
- ttt2 = temp_j;
- next_i = ttt1;
- next_j = ttt2;
- next_out1 = 10'd0;
- next_fin = (next_i==n)? 1'b1:1'b0;
- next_opcode1 = (next_i==n)? 10'd0:`READ_A;
- temp_i = (temp_j == n - 10'd1)? temp_i + 1 : temp_i;
- temp_j = (temp_j == n - 10'd1)? 10'd0 : temp_j + 1;
- end
- default begin end
- endcase
- end
- assign next_n = (reset == 0)? 10'd0 : n;
- assign next_r = (reset == 0)? 10'd0 : r;
- assign ti_next = (reset == 0)? 10'd0 : temp_i;
- assign tj_next = (reset == 0)? 10'd0 : temp_j;
- assign A_nnext = (reset == 0)? 10'd0 : matA_n;
- assign X_nnext = (reset == 0)? 10'd0 : matX_n;
- assign A_rnext = (reset == 0)? 10'd0 : matA_r;
- assign X_rnext = (reset == 0)? 10'd0 : matX_r;
- assign next_opcode = (reset==0)? `GET_N: next_opcode1;
- assign i = (reset==0)? 10'd0: next_i;
- assign j = (reset==0)? 10'd0: next_j;
- assign next_out = (reset==0)? 10'd0: next_out1;
- assign fin = (reset==0)? 10'd0: next_fin;
- endmodule
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