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- Architecture: x86_64
- CPU op-mode(s): 32-bit, 64-bit
- Address sizes: 39 bits physical, 48 bits virtual
- Byte Order: Little Endian
- CPU(s): 4
- On-line CPU(s) list: 0-3
- Vendor ID: GenuineIntel
- Model name: Intel(R) Core(TM) i5-6300U CPU @ 2.40GHz
- CPU family: 6
- Model: 78
- Thread(s) per core: 2
- Core(s) per socket: 2
- Socket(s): 1
- Stepping: 3
- CPU(s) scaling MHz: 17%
- CPU max MHz: 3000.0000
- CPU min MHz: 400.0000
- BogoMIPS: 5001.23
- Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse
- sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc art arch_perfmon pebs bts rep_good nopl
- xtopology nonstop_tsc cpuid aperfmperf pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 sdbg
- fma cx16 xtpr pdcm pcid sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave avx f16c rdra
- nd lahf_lm abm 3dnowprefetch cpuid_fault epb invpcid_single pti ssbd ibrs ibpb stibp tpr_shadow flexp
- riority ept vpid ept_ad fsgsbase tsc_adjust sgx bmi1 hle avx2 smep bmi2 erms invpcid rtm mpx rdseed a
- dx smap clflushopt intel_pt xsaveopt xsavec xgetbv1 xsaves dtherm ida arat pln pts hwp hwp_notify hwp
- _act_window hwp_epp vnmi md_clear flush_l1d
- Virtualization features:
- Virtualization: VT-x
- Caches (sum of all):
- L1d: 64 KiB (2 instances)
- L1i: 64 KiB (2 instances)
- L2: 512 KiB (2 instances)
- L3: 3 MiB (1 instance)
- NUMA:
- NUMA node(s): 1
- NUMA node0 CPU(s): 0-3
- Vulnerabilities:
- Gather data sampling: Vulnerable: No microcode
- Itlb multihit: KVM: Mitigation: VMX disabled
- L1tf: Mitigation; PTE Inversion; VMX conditional cache flushes, SMT vulnerable
- Mds: Mitigation; Clear CPU buffers; SMT vulnerable
- Meltdown: Mitigation; PTI
- Mmio stale data: Mitigation; Clear CPU buffers; SMT vulnerable
- Retbleed: Mitigation; IBRS
- Spec rstack overflow: Not affected
- Spec store bypass: Mitigation; Speculative Store Bypass disabled via prctl
- Spectre v1: Mitigation; usercopy/swapgs barriers and __user pointer sanitization
- Spectre v2: Mitigation; IBRS, IBPB conditional, STIBP conditional, RSB filling, PBRSB-eIBRS Not affected
- Srbds: Mitigation; Microcode
- Tsx async abort: Mitigation; Clear CPU buffers; SMT vulnerable
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