Advertisement
Guest User

Untitled

a guest
Jan 15th, 2020
92
0
Never
Not a member of Pastebin yet? Sign Up, it unlocks many cool features!
text 14.27 KB | None | 0 0
  1. #include "p18f25k40.inc"
  2.  
  3. ; CONFIG1L
  4. CONFIG FEXTOSC = ECH ; External Oscillator mode Selection bits (EC (external clock) above 8 MHz; PFM set to high power)
  5. CONFIG RSTOSC = HFINTOSC_64MHZ; Power-up default value for COSC bits (HFINTOSC with HFFRQ = 64 MHz and CDIV = 1:1)
  6.  
  7. ; CONFIG1H
  8. CONFIG CLKOUTEN = ON ; Clock Out Enable bit (CLKOUT function is disabled)
  9. CONFIG CSWEN = ON ; Clock Switch Enable bit (Writing to NOSC and NDIV is allowed)
  10. CONFIG FCMEN = ON ; Fail-Safe Clock Monitor Enable bit (Fail-Safe Clock Monitor enabled)
  11.  
  12. ; CONFIG2L
  13. CONFIG MCLRE = EXTMCLR ; Master Clear Enable bit (If LVP = 0, MCLR pin is MCLR; If LVP = 1, RE3 pin function is MCLR )
  14. CONFIG PWRTE = OFF ; Power-up Timer Enable bit (Power up timer disabled)
  15. CONFIG LPBOREN = OFF ; Low-power BOR enable bit (ULPBOR disabled)
  16. CONFIG BOREN = SBORDIS ; Brown-out Reset Enable bits (Brown-out Reset enabled , SBOREN bit is ignored)
  17.  
  18. ; CONFIG2H
  19. CONFIG BORV = VBOR_2P45 ; Brown Out Reset Voltage selection bits (Brown-out Reset Voltage (VBOR) set to 2.45V)
  20. CONFIG ZCD = OFF ; ZCD Disable bit (ZCD disabled. ZCD can be enabled by setting the ZCDSEN bit of ZCDCON)
  21. CONFIG PPS1WAY = ON ; PPSLOCK bit One-Way Set Enable bit (PPSLOCK bit can be cleared and set only once; PPS registers remain locked after one clear/set cycle)
  22. CONFIG STVREN = ON ; Stack Full/Underflow Reset Enable bit (Stack full/underflow will cause Reset)
  23. CONFIG DEBUG = OFF ; Debugger Enable bit (Background debugger disabled)
  24. CONFIG XINST = OFF ; Extended Instruction Set Enable bit (Extended Instruction Set and Indexed Addressing Mode disabled)
  25.  
  26. ; CONFIG3L
  27. CONFIG WDTCPS = WDTCPS_31 ; WDT Period Select bits (Divider ratio 1:65536; software control of WDTPS)
  28. CONFIG WDTE = OFF ; WDT operating mode (WDT enabled regardless of sleep)
  29.  
  30. ; CONFIG3H
  31. CONFIG WDTCWS = WDTCWS_7 ; WDT Window Select bits (window always open (100%); software control; keyed access not required)
  32. CONFIG WDTCCS = SC ; WDT input clock selector (Software Control)
  33.  
  34. ; CONFIG4L
  35. CONFIG WRT0 = OFF ; Write Protection Block 0 (Block 0 (000800-001FFFh) not write-protected)
  36. CONFIG WRT1 = OFF ; Write Protection Block 1 (Block 1 (002000-003FFFh) not write-protected)
  37. CONFIG WRT2 = OFF ; Write Protection Block 2 (Block 2 (004000-005FFFh) not write-protected)
  38. CONFIG WRT3 = OFF ; Write Protection Block 3 (Block 3 (006000-007FFFh) not write-protected)
  39.  
  40. ; CONFIG4H
  41. CONFIG WRTC = OFF ; Configuration Register Write Protection bit (Configuration registers (300000-30000Bh) not write-protected)
  42. CONFIG WRTB = OFF ; Boot Block Write Protection bit (Boot Block (000000-0007FFh) not write-protected)
  43. CONFIG WRTD = OFF ; Data EEPROM Write Protection bit (Data EEPROM not write-protected)
  44. CONFIG SCANE = ON ; Scanner Enable bit (Scanner module is available for use, SCANMD bit can control the module)
  45. CONFIG LVP = ON ; Low Voltage Programming Enable bit (Low voltage programming enabled. MCLR/VPP pin function is MCLR. MCLRE configuration bit is ignored)
  46.  
  47. ; CONFIG5L
  48. CONFIG CP = OFF ; UserNVM Program Memory Code Protection bit (UserNVM code protection disabled)
  49. CONFIG CPD = OFF ; DataNVM Memory Code Protection bit (DataNVM code protection disabled)
  50.  
  51. ; CONFIG5H
  52.  
  53. ; CONFIG6L
  54. CONFIG EBTR0 = OFF ; Table Read Protection Block 0 (Block 0 (000800-001FFFh) not protected from table reads executed in other blocks)
  55. CONFIG EBTR1 = OFF ; Table Read Protection Block 1 (Block 1 (002000-003FFFh) not protected from table reads executed in other blocks)
  56. CONFIG EBTR2 = OFF ; Table Read Protection Block 2 (Block 2 (004000-005FFFh) not protected from table reads executed in other blocks)
  57. CONFIG EBTR3 = OFF ; Table Read Protection Block 3 (Block 3 (006000-007FFFh) not protected from table reads executed in other blocks)
  58.  
  59. ; CONFIG6H
  60. CONFIG EBTRB = OFF ; Boot Block Table Read Protection bit (Boot Block (000000-0007FFh) not protected from table reads executed in other blocks)
  61.  
  62.  
  63.  
  64. ;*******************************************************************************
  65. ;
  66. ; TODO Step #3 - Variable Definitions
  67. ;
  68. ; Refer to datasheet for available data memory (RAM) organization assuming
  69. ; relocatible code organization (which is an option in project
  70. ; properties > mpasm (Global Options)). Absolute mode generally should
  71. ; be used sparingly.
  72. ;
  73. ; Example of using GPR Uninitialized Data
  74. ;
  75. ; GPR_VAR UDATA
  76. ; MYVAR1 RES 1 ; User variable linker places
  77. ; MYVAR2 RES 1 ; User variable linker places
  78. ; MYVAR3 RES 1 ; User variable linker places
  79. ;
  80. ; ; Example of using Access Uninitialized Data Section (when available)
  81. ; ; The variables for the context saving in the device datasheet may need
  82. ; ; memory reserved here.
  83. ; INT_VAR UDATA_ACS
  84. ; W_TEMP RES 1 ; w register for context saving (ACCESS)
  85. ; STATUS_TEMP RES 1 ; status used for context saving
  86. ; BSR_TEMP RES 1 ; bank select used for ISR context saving
  87. ;
  88. ;*******************************************************************************
  89.  
  90. ; TODO PLACE VARIABLE DEFINITIONS GO HERE
  91. INT_VAR UDATA_ACS
  92. set0 RES 1
  93. set1 RES 1
  94. bit RES 1
  95. bit0 RES 1
  96. bit1 RES 1
  97. bit2 RES 1
  98. bit3 RES 1
  99. temp8 RES 1
  100. jauge RES 1
  101. conversion_result RES 1
  102.  
  103. ;*******************************************************************************
  104. ; Reset Vector
  105. ;*******************************************************************************
  106.  
  107. RES_VECT CODE 0x0000 ; processor reset vector
  108. GOTO START2 ; go to beginning of program
  109.  
  110. ;*******************************************************************************
  111. ; TODO Step #4 - Interrupt Service Routines
  112. ;
  113. ; There are a few different ways to structure interrupt routines in the 8
  114. ; bit device families. On PIC18's the high priority and low priority
  115. ; interrupts are located at 0x0008 and 0x0018, respectively. On PIC16's and
  116. ; lower the interrupt is at 0x0004. Between device families there is subtle
  117. ; variation in the both the hardware supporting the ISR (for restoring
  118. ; interrupt context) as well as the software used to restore the context
  119. ; (without corrupting the STATUS bits).
  120. ;
  121. ; General formats are shown below in relocatible format.
  122. ;
  123. ;------------------------------PIC16's and below--------------------------------
  124. ;
  125. ; ISR CODE 0x0004 ; interrupt vector location
  126. ;
  127. ; <Search the device datasheet for 'context' and copy interrupt
  128. ; context saving code here. Older devices need context saving code,
  129. ; but newer devices like the 16F#### don't need context saving code.>
  130. ;
  131. ; RETFIE
  132. ;
  133. ;----------------------------------PIC18's--------------------------------------
  134. ;
  135. ; ISRHV CODE 0x0008
  136. ; GOTO HIGH_ISR
  137. ; ISRLV CODE 0x0018
  138. ; GOTO LOW_ISR
  139. ;
  140. ; ISRH CODE ; let linker place high ISR routine
  141. ; HIGH_ISR
  142. ; <Insert High Priority ISR Here - no SW context saving>
  143. ; RETFIE FAST
  144. ;
  145. ; ISRL CODE ; let linker place low ISR routine
  146. ; LOW_ISR
  147. ; <Search the device datasheet for 'context' and copy interrupt
  148. ; context saving code here>
  149. ; RETFIE
  150. ;
  151. ;*******************************************************************************
  152.  
  153. ; TODO INSERT ISR HERE
  154.  
  155. ;*******************************************************************************
  156. ; MAIN PROGRAM
  157. ;*******************************************************************************
  158.  
  159. MAIN_PROG CODE ; let linker place main program
  160.  
  161. check ;verification des bits pour une couleur d'une LED
  162.  
  163. CALL send0
  164. CALL send0
  165. CALL send0
  166. CALL send0
  167.  
  168. BTFSS bit, 3 ; on ne regarde que le bit 3 car on n'utilise que celui ci
  169. CALL send0 ;pour ne pas abuser de l'intensité des LED qui est donc fixé à 8
  170. BTFSC bit,3
  171. CALL send1
  172.  
  173. CALL send0
  174. CALL send0
  175. CALL send0
  176. RETURN
  177.  
  178.  
  179.  
  180.  
  181. send0
  182. MOVLW b'00100000' ; on fixe la sortie RB5 a 1
  183. MOVWF LATB
  184.  
  185. NOP
  186. NOP
  187. NOP
  188. MOVLW b'00000000' ; durant 0.32 u puis on remet a 0
  189. MOVWF LATB
  190.  
  191. NOP
  192. NOP ; puis on fini les 1.25 u de la commande
  193. NOP
  194. NOP
  195. NOP
  196. NOP
  197. NOP
  198. NOP
  199. NOP
  200. NOP
  201.  
  202. RETURN
  203.  
  204. send1
  205. MOVLW b'00100000' ; on fixe la sortie RB5 a 1
  206. MOVWF LATB
  207.  
  208. NOP
  209. NOP
  210. NOP
  211. NOP
  212. NOP
  213. NOP
  214. NOP
  215. NOP
  216. NOP
  217. NOP
  218. NOP
  219. MOVLW b'00000000' ; durant 0.82 u puis on remet a 0
  220. MOVWF LATB
  221. NOP
  222. NOP
  223.  
  224. RETURN
  225.  
  226.  
  227.  
  228.  
  229.  
  230.  
  231. sendlED
  232. MOVF bit3,0 ; on envoie une a une les commandes des couleurs de la LED
  233. MOVWF bit ; couleure verte
  234. CALL check
  235.  
  236. MOVF bit2,0 ; couleure rouge
  237. MOVWF bit
  238. CALL check
  239.  
  240. MOVF bit1,0 ;couleur bleu
  241. MOVWF bit
  242. CALL check
  243.  
  244. MOVF bit0,0 ;couleur blanche
  245. MOVWF bit
  246. CALL check
  247. RETURN
  248.  
  249.  
  250.  
  251.  
  252.  
  253.  
  254. null ; liste de bit pour éteidnre les LED
  255. MOVLW b'00000000'
  256. MOVWF bit0
  257. MOVLW b'00000000'
  258. MOVWF bit1
  259. MOVLW b'00000000'
  260. MOVWF bit2
  261. MOVLW b'00000000'
  262. MOVWF bit3
  263. CALL sendLED
  264. RETURN
  265.  
  266. red ; liste de bit pour afficher du rouge
  267. MOVLW b'00000000'
  268. MOVWF bit0
  269. MOVLW b'00000000'
  270. MOVWF bit1
  271. MOVLW b'00001000'
  272. MOVWF bit2
  273. MOVLW b'00000000'
  274. MOVWF bit3
  275. CALL sendLED
  276. RETURN
  277.  
  278. yellow ; liste de bit pour afficher du jaune
  279. MOVLW b'00000000'
  280. MOVWF bit0
  281. MOVLW b'00000000'
  282. MOVWF bit1
  283. MOVLW b'00001000'
  284. MOVWF bit2
  285. MOVLW b'00001000'
  286. MOVWF bit3
  287. CALL sendLED
  288. RETURN
  289.  
  290. green ;liste de bit pour afficher du vert
  291. MOVLW b'00000000'
  292. MOVWF bit0
  293. MOVLW b'00000000'
  294. MOVWF bit1
  295. MOVLW b'00000000'
  296. MOVWF bit2
  297. MOVLW b'00001000'
  298. MOVWF bit3
  299. CALL sendLED
  300. RETURN
  301.  
  302.  
  303. blue ;liste de bit pour afficher du bleu
  304. MOVLW b'00000000'
  305. MOVWF bit0
  306. MOVLW b'00001000'
  307. MOVWF bit1
  308. MOVLW b'00000000'
  309. MOVWF bit2
  310. MOVLW b'00000000'
  311. MOVWF bit3
  312. CALL sendLED
  313. RETURN
  314.  
  315. analyse ; analyse des bits de commande pour les 8 LED d'une colonne
  316.  
  317. BTFSS gauge, 0 ; commande pour la 1eme LED
  318. CALL null
  319. BTFSC gauge,0
  320. CALL blue
  321.  
  322. BTFSS gauge, 1 ; commande pour la 2eme LED
  323. CALL null
  324. BTFSC gauge,1
  325. CALL blue
  326.  
  327. BTFSS gauge, 2 ; commande pour la 3eme LED
  328. CALL null
  329. BTFSC gauge,2
  330. CALL green
  331.  
  332. BTFSS gauge, 3 ; commande pour la 4eme LED
  333. CALL null
  334. BTFSC gauge,3
  335. CALL green
  336.  
  337. BTFSS gauge, 4 ; commande pour la 5eme LED
  338. CALL null
  339. BTFSC gauge,4
  340. CALL yellow
  341.  
  342. BTFSS gauge, 5 ; commande pour la 6eme LED
  343. CALL null
  344. BTFSC gauge,5
  345. CALL yellow
  346.  
  347. BTFSS gauge, 6 ; commande pour la 7eme LED
  348. CALL null
  349. BTFSC gauge,6
  350. CALL red
  351.  
  352. BTFSS gauge, 7
  353. CALL null
  354. BTFSC gauge,7 ; commande pour la 8eme LED
  355. CALL red
  356. RETURN
  357.  
  358.  
  359. reading ;lecture du tableau de valeurs enregistré
  360. MOVLW 0x1
  361. MOVWF PCLATH
  362.  
  363. CLRF FSR0L
  364. MOVLW 0x01
  365. MOVWF FSR0H,0
  366.  
  367. MOVF INDF0, 0, 0
  368. RLNCF WREG,0 ;décalage bit de gauche = *2
  369.  
  370. CALL table
  371. MOVWF gauge ; recuperation de la valeur copié dans jauge
  372. CALL analyse
  373. RETURN
  374.  
  375.  
  376. loop_on_8_bit ; boucle pour les 8 colonnes de LED
  377. MOVLW 0x08
  378. MOVWF temp8
  379.  
  380. LOOP8
  381. CALL reading
  382. INCF FSR0L,1
  383. DECFSZ temp8 ,1
  384. GOTO LOOP8
  385. RETURN
  386.  
  387.  
  388.  
  389.  
  390. write ; Ecriture du resultat de la conversion dans le tableau
  391. MOVF conversion_result, 0
  392. MOVWF POSTINC0
  393. RETURN
  394.  
  395.  
  396. result_treatement ; On recupere les 3 bits qui nous interesse : 5 à 7
  397. RRCF conversion_result ; On decale à droite 4 fois
  398. RRCF conversion_result
  399. RRCF conversion_result
  400. RRCF conversion_result
  401. MOVLW b'00000111'
  402. ANDWF conversion_result, 1 ; On fait un "ET" arithmetique pour ne garder que les 3 LSB
  403. RETURN
  404.  
  405. ADC_launcher ; On lance le convertisseur analogique numerique
  406. MOVLW b'11000001'
  407. MOVWF ADCON0
  408. conversion_end ; On surveille le LSB de ADCON0 pour attendre la fin de la conversion
  409. BTFSC ADCON0, 0
  410. GOTO conversion_end
  411. MOVF ADRESH, 0 ; Le resultat est recupere dans ADRESH
  412. MOVWF conversion_result
  413. CALL result_treatement ; On traite le resultat pour obtenir 3 bits
  414. CLRF FSR0L,0 ; On initialise l'adresse du tableau
  415. MOVLW 0x01
  416. MOVWF FSR0H, 0
  417. CALL write ; On ecrit le resultat dans le tableau
  418.  
  419. RETURN
  420.  
  421.  
  422. ADC_init_high_pitch ; Initialisation du channel pour les aigues
  423. CLRF ADPCH
  424. RETURN
  425.  
  426. ADC_init_medium_high ; Initialisation du channel pour les medium hauts
  427. MOVLW b'00000001'
  428. MOVWF ADPCH
  429. RETURN
  430.  
  431. ADC_init_medium_bass ; Initialisation du channel pour les medium bas
  432. MOVLW b'00000010'
  433. MOVWF ADPCH
  434. RETURN
  435.  
  436. ADC_init_bass ; Initialisation du channel pour les basses
  437. MOVLW b'00000011'
  438. MOVWF ADPCH
  439. RETURN
  440.  
  441. lets_convert ; On convertit les 4 signaux un par un
  442. CALL ADC_init_high_pitch ; d'abord les aigue
  443. CALL ADC_launcher ; et on lance la conversion
  444. CALL ADC_init_medium_high ; idem pour medium haut
  445. CALL ADC_launcher
  446. CALL ADC_init_medium_bass ; puis medium bas
  447. CALL ADC_launcher
  448. CALL ADC_init_bass ; et basse
  449. CALL ADC_launcher
  450.  
  451. START2
  452.  
  453.  
  454.  
  455. MOVLW b'00000000'
  456. MOVWF TRISB ; Les leds sont en sorties
  457. MOVWF conversion_result ; On initialise le resultat de conversion a 0
  458. CALL lets_convert ; On lance les conversion pour recuperer les 4 signaux
  459. CALL lets_shine ; On allume les leds
  460.  
  461.  
  462. table ADDWF PCL ; Donne un jauge permettant de savoir a quelle hauteur on allume les leds
  463. RETLW 0x00
  464. RETLW 0x01
  465. RETLW 0x03
  466. RETLW 0x07
  467. RETLW 0x0F
  468. RETLW 0x1F
  469. RETLW 0x3F
  470. RETLW 0x7F
  471. RETLW 0xFF
  472.  
  473.  
  474.  
  475.  
  476. GOTO $ ; boucle infinie
  477.  
  478. END
Advertisement
Add Comment
Please, Sign In to add comment
Advertisement