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- #*****************************************************************************#
- # Makefile: Generic makefile for compiling .c files, leaving the generated #
- # objects under $(ROOT)/obj. This makefile imports default variables from #
- # $(ROOT)/Makefile.inc. #
- #-----------------------------------------------------------------------------#
- # Jesús Alonso Fernández @doragasu, 2012 # #*****************************************************************************#
- # Set root directory
- ROOT ?= ../../..
- # Import default variables
- include $(ROOT)/Makefile.inc
- # Set target object directory
- OBJDIR = $(ROOT)/obj
- # Compute a list of object files
- objects := $(patsubst %.c,$(OBJDIR)/%.o,$(wildcard *.c))
- # Main target: build all object files
- all: $(objects)
- # Target for building each object file
- $(OBJDIR)/%.o: %.c | $(OBJDIR)
- $(PREFIX)$(CC) $(CFLAGS) -c $< -o $@
- # Creates destination directory if it doesn't exist
- $(OBJDIR):
- mkdir -p $(OBJDIR)
- # Clean target
- .PHONY: clean
- clean:
- @$(RM) -f $(objects)
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