diff --git a/imx8mq-phanbell.dts.orig b/imx8mq-phanbell.dts
index a3b9d61..5b7da9b 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq-phanbell.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mq-phanbell.dts
@@ -478,4 +478,54 @@
 			MX8MQ_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0xc6
 		>;
 	};
+
+	pinctrl_csi1: csi1grp {
+		fsl,pins = <
+			MX8MQ_IOMUXC_NAND_DATA02_GPIO3_IO8		0x19 /* PWDN */
+			MX8MQ_IOMUXC_GPIO1_IO12_GPIO1_IO12		0x19 /* RESETB */
+			/* vsync pin mux? can't find in schematic */
+		>;
+	};
+};
+
+&i2c2 {
+	status = "okay";
+	ov5645_mipi: ov5645_mipi@3c {
+		compatible = "ovti,ov5645_mipi";
+		reg = <0x3c>;
+		status = "okay";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_csi1>;
+		clocks = <&clk IMX8MQ_CLK_DUMMY>;
+		clock-names = "csi_mclk";
+		csi_id = <0>;
+		pwn-gpios = <&gpio3 8 1>;
+		rst-gpios = <&gpio1 12 0>;
+		mclk = <20000000>;
+		mclk_source = <0>;
+		ae_target = <52>;
+		port {
+			ov5645_mipi1_ep: endpoint {
+				remote-endpoint = <&mipi1_sensor_ep>;
+			};
+		};
+	};
+};
+
+&csi1 {
+	fsl,mipi-mode;
+	fsl,two-8bit-sensor-mode;
+	status = "okay";
+};
+
+&mipi_csi1 {
+	#address-cells = <1>;
+	#size-cells = <0>;
+	status = "okay";
+	port {
+		mipi1_sensor_ep: endpoint1 {
+			remote-endpoint = <&ov5645_mipi1_ep>;
+			data-lanes = <1 2>;
+		};
+	};
 };