Advertisement
ademosh

Untitled

Oct 26th, 2019
152
0
Never
Not a member of Pastebin yet? Sign Up, it unlocks many cool features!
text 10.89 KB | None | 0 0
  1. Министерство образования и науки Российской Федерации
  2. Федеральное государственное бюджетное образовательное учреждение
  3. высшего профессионального образования
  4. «САРАТОВСКИЙ НАЦИОНАЛЬНЫЙ ИССЛЕДОВАТЕЛЬСКИЙ ГОСУДАРСТВЕННЫЙ УНИВЕРСИТЕТ ИМЕНИ Н.Г.ЧЕРНЫШЕВСКОГО»
  5.  
  6.  
  7.  
  8.  
  9.  
  10.  
  11.  
  12. Лабораторная работа №3
  13. по дисциплине
  14. «Системы реального времени»
  15.  
  16.  
  17.  
  18.  
  19.  
  20.  
  21.  
  22. Студентов 4 курса
  23. факультета КНиИТ
  24. 441 группы
  25. Луг Юрия Александровича
  26. Батыр Егора Валерьевича
  27. Исайкина Виктора Викторовича
  28.  
  29.  
  30.  
  31.  
  32.  
  33.  
  34.  
  35.  
  36.  
  37.  
  38. Саратов 2017
  39. Assembler code:
  40.  
  41.  
  42. Stack_Size EQU 0x00000400
  43.  
  44. AREA STACK, NOINIT, READWRITE, ALIGN=3
  45. Stack_Mem SPACE Stack_Size
  46. __initial_sp
  47.  
  48.  
  49. PRESERVE8
  50. THUMB
  51.  
  52.  
  53. ; Vector Table Mapped to Address 0 at Reset
  54. AREA RESET, DATA, READONLY
  55. EXPORT __Vectors
  56. EXPORT __Vectors_End
  57. EXPORT __Vectors_Size
  58.  
  59. __Vectors DCD __initial_sp ; Top of Stack
  60. DCD Reset_Handler ; Reset Handler
  61. SPACE 168
  62. DCD TIM2_Handler
  63. __Vectors_End
  64.  
  65. __Vectors_Size EQU __Vectors_End - __Vectors
  66.  
  67. AREA |.text|, CODE, READONLY
  68.  
  69. SaveContext PROC
  70. EXPORT SaveContext
  71. ; POINER TO CONTEXT IN R0 (argument)
  72.  
  73. LDR r1, [sp, #12] ; r0 from stack -> r1
  74. STR r1, [r0, #0x00] ; r1 (temp) -> context.gpr;
  75.  
  76. LDR r1, [sp, #12+4] ; r1 from stack -> r1
  77. STR r1, [r0, #0x04] ; r1 (temp) -> context.gpr;
  78.  
  79. LDR r1, [sp, #12+8] ; r2 from stack -> r1
  80. STR r1, [r0, #0x08] ; r1 (temp) -> context.gpr;
  81.  
  82. LDR r1, [sp, #12+12] ; r3 from stack -> r1
  83. STR r1, [r0, #0x0C] ; r1 (temp) -> context.gpr;
  84.  
  85. STR r4, [r0, #0x10] ; r4 (temp) -> context.gpr;
  86. STR r5, [r0, #0x14] ; r5 (temp) -> context.gpr;
  87. STR r6, [r0, #0x18] ; r6 (temp) -> context.gpr;
  88. STR r7, [r0, #0x1C] ; r7 (temp) -> context.gpr;
  89. STR r8, [r0, #0x20] ; r8 (temp) -> context.gpr;
  90. STR r9, [r0, #0x24] ; r9 (temp) -> context.gpr;
  91. STR r10, [r0, #0x28] ; r10 (temp) -> context.gpr;
  92. STR r11, [r0, #0x2C] ; r11 (temp) -> context.gpr;
  93.  
  94. LDR r1, [sp, #12+16] ; r12 from stack -> r1
  95. STR r1, [r0, #0x30] ; r1 (temp) -> context.gpr;
  96.  
  97. LDR r1, [sp, #12+24] ; PC (ReturnAdderss()) from stack -> r1
  98. STR r1, [r0, #0x34] ; r1 (temp) -> context.pc;
  99.  
  100. LDR r1, [sp, #12+20] ; LR from stack -> r1
  101. STR r1, [r0, #0x38] ; r1 (temp) -> context.lr;
  102.  
  103. MOV r1, sp ; sp -> r1 (temp)
  104. STR r1, [r0, #0x3c] ; r1 (temp) -> context.sp;
  105.  
  106. LDR r1, [sp, #12+28] ; xPSR from stack -> r1
  107. STR r1, [r0, #0x40] ; r1 (temp) -> context.psw;
  108.  
  109. BX LR
  110. ENDP
  111.  
  112. RestoreContext PROC
  113. EXPORT RestoreContext
  114. LDR R2,[sp, #0] ; pop system values
  115. LDR R3,[sp, #4]
  116. LDR R4,[sp, #8]
  117.  
  118. LDR R1,[r0, #0x3c] ; sp from struct -> r1
  119. mov SP,R1 ; r1 -> sp
  120.  
  121. STR R2,[sp, #0] ; return system values to stack
  122. STR R3,[sp, #4]
  123. STR R4,[sp, #8]
  124.  
  125.  
  126. LDR r1, [r0, #0x00] ; r0 from context.gpr -> r1
  127. STR r1, [sp, #12] ; r1 (temp) -> stack;
  128.  
  129. LDR r1, [r0, #0x04] ; r1 from context.gpr-> r1
  130. STR r1, [sp, #12+4] ; r1 (temp) ->stack
  131.  
  132. LDR r1, [r0, #0x08] ; r2 from context.gpr -> r1
  133. STR r1, [sp, #12+8] ; r1 (temp) -> stack
  134.  
  135. LDR r1, [r0, #0x0C] ; r3 from context.gpr -> r1
  136. STR r1, [sp, #12+12] ; r1 (temp) -> stack
  137.  
  138. LDR r1 ,[r0, #0x10] ; r4 from context.gpr ->r1 (temp)
  139. mov r4,r1; ; r1(temp) -> r4
  140.  
  141. LDR r1 ,[r0, #0x14] ; r5 from context.gpr ->r1 (temp)
  142. mov r5,r1; ; r1(temp) -> r5
  143.  
  144. LDR r1 ,[r0, #0x18] ; r6 from context.gpr ->r1 (temp)
  145. mov r6,r1; ; r1(temp) -> r6
  146.  
  147. LDR r1 ,[r0, #0x1C] ; r7 from context.gpr ->r1 (temp)
  148. mov r7,r1; ; r1(temp) -> r7
  149.  
  150. LDR r1 ,[r0, #0x20] ; r8 from context.gpr ->r1 (temp)
  151. mov r8,r1; ; r1(temp) -> r8
  152.  
  153. LDR r1 ,[r0, #0x24] ; r9 from context.gpr ->r1 (temp)
  154. mov r9,r1; ; r1(temp) -> r9
  155.  
  156. LDR r1 ,[r0, #0x28] ; r10 from context.gpr ->r1 (temp)
  157. mov r10,r1; ; r1(temp) -> r10
  158.  
  159. LDR r1 ,[r0, #0x2C] ; r11 from context.gpr ->r1 (temp)
  160. mov r11,r1; ; r1(temp) -> r11
  161.  
  162. LDR r1, [r0, #0x30] ; r12 from context.gpr -> r1
  163. STR r1, [sp, #12+16] ; r1 (temp) -> stack
  164.  
  165. LDR r1, [r0, #0x34] ; PC from context.pc -> r1
  166. STR r1, [sp, #12+24] ; r1 (temp) -> stack
  167.  
  168. LDR r1, [r0, #0x38] ; LR from context.lr -> r1
  169. STR r1, [sp, #12+20] ; r1 (temp) -> stack
  170.  
  171. LDR r1, [r0, #0x40] ; xPSR from context.psw -> r1
  172. STR r1,[sp, #12+28] ; r1 (temp) -> stack
  173.  
  174. BX LR
  175. ENDP
  176.  
  177. TIM2_Handler PROC
  178. IMPORT OSkernel
  179.  
  180. MOV R0, LR
  181. PUSH {R0}
  182.  
  183. BL OSkernel
  184.  
  185. POP {R0}
  186. MOV LR, R0
  187.  
  188. LDR R0, =0x40000000
  189. LDR R1, [R0, #0x10]
  190. LDR R2, =~0x00000001
  191. AND R1, R2
  192. STR R1, [R0, #0x10]
  193.  
  194. ;LDR R0, =0x48001000
  195. ;LDR R1, [R0, #0x14]
  196. ;LDR R2, =0x00000800
  197. ;EOR R1,R2
  198. ;STR R1,[R0,#0x14]
  199.  
  200. ISB
  201.  
  202. BX LR
  203. ENDP
  204.  
  205. ; Reset handler
  206. Reset_Handler PROC
  207.  
  208. EXPORT Reset_Handler [WEAK]
  209.  
  210. IMPORT OSinit
  211.  
  212.  
  213.  
  214.  
  215. ; init
  216. ; SystemInit()
  217.  
  218. ; rcc start
  219. ; mod led port
  220. LDR R0, =0x40021000
  221. LDR R1, [R0, #0x14]
  222. LDR R2, =0x00200000
  223. ORR R1,R2
  224. STR R1,[R0,#0x14]
  225.  
  226. ; mod timer port
  227. LDR R0, =0x40021000
  228. LDR R1, [R0, #0x1C]
  229. LDR R2, =0x00000001
  230. ORR R1,R2
  231. STR R1,[R0,#0x1C]
  232.  
  233. ; timer counter settings
  234. ; cnt reg
  235. LDR R0, =0x40000000
  236. LDR R2, =0x00000000
  237. STR R2, [R0, #0x24]
  238.  
  239. ; arr reg
  240. LDR R0, =0x40000000
  241. LDR R2, = 1000
  242. STR R2, [R0, #0x2C]
  243.  
  244. ; psc reg
  245. LDR R0, =0x40000000
  246. LDR R2, = 0 ;400
  247. STR R2, [R0, #0x28]
  248.  
  249. ; dier reg
  250. LDR R0, =0x40000000
  251. LDR R2, =0x00000001
  252. STR R2, [R0, #0x0C]
  253.  
  254. ; nvic_iser
  255. LDR R0, =0xE000E100
  256. LDR R2, =0x10000000
  257. STR R2, [R0, #0x00]
  258.  
  259. ; cr1 reg
  260. LDR R0, =0x40000000
  261. LDR R1, [R0, #0x00]
  262. LDR R2, =0x00000001
  263. ORR R1,R2
  264. STR R1,[R0,#0x00]
  265.  
  266.  
  267.  
  268. ; moder on
  269. LDR R0, =0x48001000
  270. LDR R1, [R0, #0x00]
  271. LDR R2, =0x40400000
  272. ORR R1,R2
  273. STR R1,[R0,#0x00]
  274.  
  275. ;include from main.c
  276.  
  277.  
  278.  
  279. BL OSinit
  280.  
  281. IMPORT main
  282. LDR R0,=main
  283. BLX R0
  284.  
  285. loop_off_true
  286. ; block
  287. CPSID I
  288.  
  289. ; loop start conditions
  290. LDR R11, =0x000F4240
  291. LDR R12, =0x000F4240
  292.  
  293. ; odr on
  294. LDR R1, [R0, #0x14]
  295. LDR R2, =0x00008000
  296.  
  297. ; waiting loop start consitions
  298. LDR R9, =0x00051615
  299.  
  300. loop_wait_false
  301. ; wait actions
  302. SUB R9, #0x00000001
  303. CMP R9, #0x00000000
  304. BNE loop_wait_false
  305.  
  306. ;continue odr on
  307. ORR R1,R2
  308. STR R1,[R0,#0x14]
  309.  
  310. ; unblock
  311. CPSIE I
  312.  
  313. loop_on_false
  314. ; wait off loop
  315. SUB R11, #0x00000001
  316. CMP R11, #0x00000000
  317. BEQ loop_on_true
  318. BNE loop_on_false
  319.  
  320. loop_on_true
  321. ; odr off
  322. LDR R1, [R0, #0x14]
  323. LDR R2, =~0x00008000
  324. AND R1,R2
  325. STR R1,[R0,#0x14]
  326.  
  327. loop_off_false ; wait off loop
  328. SUB R12, #0x00000001
  329. CMP R12, #0x00000000
  330. BEQ loop_off_true
  331. BNE loop_off_false
  332. B .
  333.  
  334. ENDP
  335.  
  336.  
  337. ALIGN
  338.  
  339.  
  340. END
  341.  
  342. ;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
  343.  
  344.  
  345. Main.c:
  346. #include "stm32f30x.h"
  347.  
  348. int wait(unsigned int ms);
  349. volatile int period;
  350.  
  351. extern unsigned long GlobalTime;
  352. #define MAXGLOBALTIME 0x10000000
  353.  
  354. #define MAXN 4
  355.  
  356. unsigned int store[MAXN];
  357. unsigned int data = 0;
  358. unsigned int isr = 0;
  359. unsigned int isEmptyStore = 0;
  360.  
  361. int main() {
  362. //unsigned int data = 0;
  363.  
  364. RCC->APB2ENR |= 0x00004000; // tacting running on
  365. USART1->BRR = 0x228; //0x8a; // velocity
  366. USART1->CR1 |= 0x0000000d; // turn on
  367.  
  368. RCC->AHBENR |= 0x00020000; // include clicking
  369. GPIOA->MODER |= 0x00280000; // alternative function for output
  370. GPIOA->AFR[1] = 0x00000770; // choise the function
  371. }
  372.  
  373. void input() { // task 1
  374. main();
  375.  
  376. while (1) {
  377.  
  378. __disable_irq(); //interruption stop
  379. isr = USART1->ISR;
  380.  
  381. if (isr & 0x00000008) {
  382. USART1->ICR |= 0x00000008;
  383. }
  384.  
  385. if ((isr & 0x00000020) && !isEmptyStore) { // if exists something for accept - accept it
  386. data = USART1->RDR;
  387. isEmptyStore = 1;
  388. }
  389.  
  390. __enable_irq();// interruption continue
  391. }
  392. }
  393.  
  394. void output() { // task 2
  395. while (1) {
  396.  
  397. __disable_irq(); //interruption stop
  398.  
  399. isr = USART1->ISR;
  400. if ((isr & 0x00000080) && isEmptyStore) { // // if exists something for send - send it
  401. USART1->TDR = data;
  402. isEmptyStore = 0;
  403. }
  404.  
  405. __enable_irq();// interruption continue
  406. }
  407. }
  408.  
  409. void greatWork() { //task 3
  410. // init
  411.  
  412. while (1) {
  413. //
  414. }
  415. }
  416.  
  417. void *const Tasks[] __attribute__((at(0x08001000)))= { // our tasks
  418. input,
  419. output,
  420. greatWork,
  421. greatWork,
  422. 0
  423. };
  424.  
  425.  
  426. EYOS.c (OS):
  427. #include "stm32f30x.h"
  428.  
  429. unsigned char Stacks[8][0x200];
  430.  
  431. unsigned long GlobalTime;
  432. #define MAXGLOBALTIME 0x10000000
  433.  
  434. struct {// struct of registers
  435. unsigned int GPR[13];
  436. void *PC;
  437. void *LR;
  438. void *SP;
  439. unsigned int PSW; // xPSR
  440. } contexts[8];
  441.  
  442. extern void *Tasks[];
  443. unsigned char tnum; // number of a task
  444. unsigned char tcur; // current task
  445. typedef void (*func)(void);
  446.  
  447. void SaveContext(void *conptr);
  448. void RestoreContext(void *conptr);
  449.  
  450. void OSkernel() { // task switch
  451. if (++GlobalTime >= MAXGLOBALTIME) {
  452. GlobalTime = 0;
  453. }
  454.  
  455. SaveContext(&contexts[tcur]); // save all parameters of the program
  456.  
  457. tcur = (tcur + 1) % (tnum+1);
  458. if(tcur == 0)
  459. {
  460. tcur = 1;
  461. }
  462.  
  463. RestoreContext(&contexts[tcur]); // restore all parameters of the program
  464. }
  465.  
  466. void OSinit() {
  467. int i;
  468.  
  469. // context init
  470. i = 0;
  471.  
  472. while (Tasks[i] != 0) {
  473. contexts[i + 1].PC = (void *)(((int) (Tasks[i])) | (1));
  474. contexts[i + 1].SP = &Stacks[i][0x200 - 4];
  475. contexts[i + 1].PSW = 0x01000000;
  476. i++;
  477. }
  478.  
  479. tnum = i;
  480. tcur = 0;
  481.  
  482. NVIC->ISER[0] |=0x00008000;
  483.  
  484. for (;;) {
  485. }
  486. }
Advertisement
Add Comment
Please, Sign In to add comment
Advertisement