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- open_project /home/lutrampal/cours/s5/implem_sle/light_wrapper_64_128_pcd_optr/light_wrapper_64_128_pcd_optr.xpr
- update_compile_order -fileset sources_1
- reset_run synth_1
- launch_runs synth_1 -jobs 4
- open_run synth_1 -name synth_1
- write_verilog /home/lutrampal/light_wrapper_64_128_pcd_optr.v
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