jintack

Host support for L2

Feb 19th, 2016
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  1. diff --git a/arch/arm64/kvm/handle_exit.c b/arch/arm64/kvm/handle_exit.c
  2. index 3e3b694..ced650a 100644
  3. --- a/arch/arm64/kvm/handle_exit.c
  4. +++ b/arch/arm64/kvm/handle_exit.c
  5. @@ -151,7 +151,9 @@ static void update_sp(struct kvm_vcpu *vcpu, u64 val)
  6.         if (!vcpu_shadow_reg(vcpu, SP_EL2))
  7.                 vcpu->arch.guest_sp = regs->sp_el1;
  8.         vcpu_shadow_reg(vcpu, SP_EL2) = val;
  9. +       printk("STACK: shadow SP_EL2 is now %llx\n", val);
  10.         regs->sp_el1 = vcpu_shadow_reg(vcpu, SP_EL2);
  11. +       printk("STACK: Set SP_EL1 too to SP_EL2\n");
  12.  }
  13.  
  14.  static void switch_sp(struct kvm_vcpu *vcpu, bool to_low) {
  15. @@ -159,10 +161,14 @@ static void switch_sp(struct kvm_vcpu *vcpu, bool to_low) {
  16.  
  17.         if (to_low) {
  18.                 vcpu->arch.guest_sp = regs->sp_el1;
  19. +               printk("STACK: Save SP_EL1 to guest's: %llx\n", regs->sp_el1);
  20.                 regs->sp_el1 = vcpu_shadow_reg(vcpu, SP_EL2);
  21. +               printk("STACK: Set SP_EL1 to shadow SP_EL2: %llx\n", regs->sp_el1);
  22.         } else {
  23.                 vcpu_shadow_reg(vcpu, SP_EL2) = regs->sp_el1;
  24. +               printk("STACK: Save SP_EL1 to shadow SP_EL2: %llx\n", regs->sp_el1);
  25.                 regs->sp_el1 = vcpu->arch.guest_sp;
  26. +               printk("STACK: Set SP_EL1 back to guest's: %llx\n", regs->sp_el1);
  27.         }
  28.  }
  29.  
  30. @@ -226,16 +232,32 @@ static int kvm_inject_nested(struct kvm_vcpu *vcpu)
  31.  
  32.  /* If L1 lowvisor changes EL2 registers, we need to change corresponding
  33.   * EL1 registers immediately */
  34. -static void emulate_msr(struct kvm_vcpu *vcpu, int sreg_num, u64 *sregp, u64 val)
  35. +static void emulate_msr(struct kvm_vcpu *vcpu, int sreg_num, bool is_el2, u64 *sregp, u64 val)
  36.  {
  37. -       if (sreg_num == SP_EL2)
  38. -               update_sp(vcpu, val);
  39. -       else if (sreg_num == TTBR0_EL2)
  40. -               update_ttbr(vcpu, val);
  41. -       else if (sreg_num == SCTLR_EL2)
  42. -               update_sctlr(vcpu, val);
  43. -       else
  44. -               *sregp = val;
  45. +       if (is_el2) {
  46. +               if (sreg_num == SP_EL2)
  47. +                       update_sp(vcpu, val);
  48. +               else if (sreg_num == TTBR0_EL2)
  49. +                       update_ttbr(vcpu, val);
  50. +               else if (sreg_num == SCTLR_EL2)
  51. +                       update_sctlr(vcpu, val);
  52. +               else
  53. +                       *sregp = val;
  54. +       } else {
  55. +               if (sreg_num == SP_EL1) {
  56. +                       printk("Change L2's stack pointer, not L1 low's: %llx\n", val);
  57. +                       vcpu->arch.guest_sp = val;
  58. +               } else if (sreg_num == TTBR0_EL1) {
  59. +                       vcpu->arch.guest_ttbr0 = val;
  60. +                       printk("Change L2's TTBR. %llx\n", val);
  61. +               }
  62. +               else if (sreg_num == SCTLR_EL1) {
  63. +                       vcpu->arch.guest_sctlr = val;
  64. +                       printk("Change L2's SCTLR. %llx\n", val);
  65. +               }
  66. +               else
  67. +                       *sregp = val;
  68. +       }
  69.  }
  70.  
  71.  static int emulate_mov_sysreg(struct kvm_vcpu *vcpu, u16 imm, bool is_msr)
  72. @@ -246,6 +268,7 @@ static int emulate_mov_sysreg(struct kvm_vcpu *vcpu, u16 imm, bool is_msr)
  73.         u32 sreg_num = (imm & HE_SYSREG_MASK)>>HE_SYSREG_SHIFT;
  74.         bool is_imm = imm & HE_IMM;
  75.  
  76. +       printk("%s\n", __func__);
  77.         gpregp = &vcpu->arch.ctxt.gp_regs.regs.regs[gpreg_num];
  78.         if (unlikely(is_imm))
  79.                 *gpregp = imm & HE_IMM_MASK;
  80. @@ -260,7 +283,7 @@ static int emulate_mov_sysreg(struct kvm_vcpu *vcpu, u16 imm, bool is_msr)
  81.  
  82.         print_encoding(vcpu, is_msr, is_imm, imm&HE_EL2, sreg_num, gpreg_num, *gpregp);
  83.         if (is_msr)
  84. -               emulate_msr(vcpu, sreg_num, sregp, *gpregp);
  85. +               emulate_msr(vcpu, sreg_num, imm&HE_EL2, sregp, *gpregp);
  86.         else
  87.                 *gpregp = *sregp;
  88.  
  89. @@ -452,6 +475,7 @@ static exit_handle_fn kvm_get_exit_handler(struct kvm_vcpu *vcpu)
  90.         u32 hsr = kvm_vcpu_get_hsr(vcpu);
  91.         u8 hsr_ec = hsr >> ESR_ELx_EC_SHIFT;
  92.  
  93. +       printk("TRAP! exit_handler: %x\n", hsr_ec);
  94.         if (hsr_ec >= ARRAY_SIZE(arm_exit_handlers) ||
  95.             !arm_exit_handlers[hsr_ec]) {
  96.                 kvm_err("Unknown exception class: hsr: %#08x -- %s\n",
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