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  1. /**
  2. ******************************************************************************
  3. * @file startup_stm32h743xx.s
  4. * @author MCD Application Team
  5. * @brief STM32H743xx Devices vector table for GCC based toolchain.
  6. * This module performs:
  7. * - Set the initial SP
  8. * - Set the initial PC == Reset_Handler,
  9. * - Set the vector table entries with the exceptions ISR address
  10. * - Branches to main in the C library (which eventually
  11. * calls main()).
  12. * After Reset the Cortex-M processor is in Thread mode,
  13. * priority is Privileged, and the Stack is set to Main.
  14. ******************************************************************************
  15. * @attention
  16. *
  17. * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
  18. * All rights reserved.</center></h2>
  19. *
  20. * This software component is licensed by ST under BSD 3-Clause license,
  21. * the "License"; You may not use this file except in compliance with the
  22. * License. You may obtain a copy of the License at:
  23. * opensource.org/licenses/BSD-3-Clause
  24. *
  25. ******************************************************************************
  26. */
  27.  
  28. .syntax unified
  29. .cpu cortex-m7
  30. .fpu softvfp
  31. .thumb
  32.  
  33. .global g_pfnVectors
  34. .global Default_Handler
  35.  
  36. /* start address for the initialization values of the .data section.
  37. defined in linker script */
  38. .word _sidata
  39. /* start address for the .data section. defined in linker script */
  40. .word _sdata
  41. /* end address for the .data section. defined in linker script */
  42. .word _edata
  43. /* start address for the .bss section. defined in linker script */
  44. .word _sbss
  45. /* end address for the .bss section. defined in linker script */
  46. .word _ebss
  47. /* stack used for SystemInit_ExtMemCtl; always internal RAM used */
  48.  
  49. /**
  50. * @brief This is the code that gets called when the processor first
  51. * starts execution following a reset event. Only the absolutely
  52. * necessary set is performed, after which the application
  53. * supplied main() routine is called.
  54. * @param None
  55. * @retval : None
  56. */
  57.  
  58. .section .text.Reset_Handler
  59. .weak Reset_Handler
  60. .type Reset_Handler, %function
  61. Reset_Handler:
  62. ldr sp, =_estack /* set stack pointer */
  63.  
  64. /* Call the clock system initialization function.*/
  65. bl SystemInit
  66.  
  67. /* Copy the data segment initializers from flash to SRAM */
  68. ldr r0, =_sdata
  69. ldr r1, =_edata
  70. ldr r2, =_sidata
  71. movs r3, #0
  72. b LoopCopyDataInit
  73.  
  74. CopyDataInit:
  75. ldr r4, [r2, r3]
  76. str r4, [r0, r3]
  77. adds r3, r3, #4
  78.  
  79. LoopCopyDataInit:
  80. adds r4, r0, r3
  81. cmp r4, r1
  82. bcc CopyDataInit
  83. /* Zero fill the bss segment. */
  84. ldr r2, =_sbss
  85. ldr r4, =_ebss
  86. movs r3, #0
  87. b LoopFillZerobss
  88.  
  89. FillZerobss:
  90. str r3, [r2]
  91. adds r2, r2, #4
  92.  
  93. LoopFillZerobss:
  94. cmp r2, r4
  95. bcc FillZerobss
  96.  
  97. /* Call static constructors */
  98. bl __libc_init_array
  99. /* Call the application's entry point.*/
  100. bl main
  101. bx lr
  102. .size Reset_Handler, .-Reset_Handler
  103.  
  104. /**
  105. * @brief This is the code that gets called when the processor receives an
  106. * unexpected interrupt. This simply enters an infinite loop, preserving
  107. * the system state for examination by a debugger.
  108. * @param None
  109. * @retval None
  110. */
  111. .section .text.Default_Handler,"ax",%progbits
  112. Default_Handler:
  113. Infinite_Loop:
  114. b Infinite_Loop
  115. .size Default_Handler, .-Default_Handler
  116. /******************************************************************************
  117. *
  118. * The minimal vector table for a Cortex M. Note that the proper constructs
  119. * must be placed on this to ensure that it ends up at physical address
  120. * 0x0000.0000.
  121. *
  122. *******************************************************************************/
  123. .section .isr_vector,"a",%progbits
  124. .type g_pfnVectors, %object
  125. .size g_pfnVectors, .-g_pfnVectors
  126.  
  127.  
  128. g_pfnVectors:
  129. .word _estack
  130. .word Reset_Handler
  131.  
  132. .word NMI_Handler
  133. .word HardFault_Handler
  134. .word MemManage_Handler
  135. .word BusFault_Handler
  136. .word UsageFault_Handler
  137. .word 0
  138. .word 0
  139. .word 0
  140. .word 0
  141. .word SVC_Handler
  142. .word DebugMon_Handler
  143. .word 0
  144. .word PendSV_Handler
  145. .word SysTick_Handler
  146.  
  147. /* External Interrupts */
  148. .word WWDG_IRQHandler /* Window WatchDog */
  149. .word PVD_AVD_IRQHandler /* PVD/AVD through EXTI Line detection */
  150. .word TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */
  151. .word RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */
  152. .word FLASH_IRQHandler /* FLASH */
  153. .word RCC_IRQHandler /* RCC */
  154. .word EXTI0_IRQHandler /* EXTI Line0 */
  155. .word EXTI1_IRQHandler /* EXTI Line1 */
  156. .word EXTI2_IRQHandler /* EXTI Line2 */
  157. .word EXTI3_IRQHandler /* EXTI Line3 */
  158. .word EXTI4_IRQHandler /* EXTI Line4 */
  159. .word DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */
  160. .word DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */
  161. .word DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */
  162. .word DMA1_Stream3_IRQHandler /* DMA1 Stream 3 */
  163. .word DMA1_Stream4_IRQHandler /* DMA1 Stream 4 */
  164. .word DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */
  165. .word DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */
  166. .word ADC_IRQHandler /* ADC1, ADC2 and ADC3s */
  167. .word FDCAN1_IT0_IRQHandler /* FDCAN1 interrupt line 0 */
  168. .word FDCAN2_IT0_IRQHandler /* FDCAN2 interrupt line 0 */
  169. .word FDCAN1_IT1_IRQHandler /* FDCAN1 interrupt line 1 */
  170. .word FDCAN2_IT1_IRQHandler /* FDCAN2 interrupt line 1 */
  171. .word EXTI9_5_IRQHandler /* External Line[9:5]s */
  172. .word TIM1_BRK_IRQHandler /* TIM1 Break interrupt */
  173. .word TIM1_UP_IRQHandler /* TIM1 Update interrupt */
  174. .word TIM1_TRG_COM_IRQHandler /* TIM1 Trigger and Commutation interrupt */
  175. .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */
  176. .word TIM2_IRQHandler /* TIM2 */
  177. .word TIM3_IRQHandler /* TIM3 */
  178. .word TIM4_IRQHandler /* TIM4 */
  179. .word I2C1_EV_IRQHandler /* I2C1 Event */
  180. .word I2C1_ER_IRQHandler /* I2C1 Error */
  181. .word I2C2_EV_IRQHandler /* I2C2 Event */
  182. .word I2C2_ER_IRQHandler /* I2C2 Error */
  183. .word SPI1_IRQHandler /* SPI1 */
  184. .word SPI2_IRQHandler /* SPI2 */
  185. .word USART1_IRQHandler /* USART1 */
  186. .word USART2_IRQHandler /* USART2 */
  187. .word USART3_IRQHandler /* USART3 */
  188. .word EXTI15_10_IRQHandler /* External Line[15:10]s */
  189. .word RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */
  190. .word 0 /* Reserved */
  191. .word TIM8_BRK_TIM12_IRQHandler /* TIM8 Break and TIM12 */
  192. .word TIM8_UP_TIM13_IRQHandler /* TIM8 Update and TIM13 */
  193. .word TIM8_TRG_COM_TIM14_IRQHandler /* TIM8 Trigger and Commutation and TIM14 */
  194. .word TIM8_CC_IRQHandler /* TIM8 Capture Compare */
  195. .word DMA1_Stream7_IRQHandler /* DMA1 Stream7 */
  196. .word FMC_IRQHandler /* FMC */
  197. .word SDMMC1_IRQHandler /* SDMMC1 */
  198. .word TIM5_IRQHandler /* TIM5 */
  199. .word SPI3_IRQHandler /* SPI3 */
  200. .word UART4_IRQHandler /* UART4 */
  201. .word UART5_IRQHandler /* UART5 */
  202. .word TIM6_DAC_IRQHandler /* TIM6 and DAC1&2 underrun errors */
  203. .word TIM7_IRQHandler /* TIM7 */
  204. .word DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */
  205. .word DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */
  206. .word DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */
  207. .word DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */
  208. .word DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */
  209. .word ETH_IRQHandler /* Ethernet */
  210. .word ETH_WKUP_IRQHandler /* Ethernet Wakeup through EXTI line */
  211. .word FDCAN_CAL_IRQHandler /* FDCAN calibration unit interrupt*/
  212. .word 0 /* Reserved */
  213. .word 0 /* Reserved */
  214. .word 0 /* Reserved */
  215. .word 0 /* Reserved */
  216. .word DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */
  217. .word DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */
  218. .word DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */
  219. .word USART6_IRQHandler /* USART6 */
  220. .word I2C3_EV_IRQHandler /* I2C3 event */
  221. .word I2C3_ER_IRQHandler /* I2C3 error */
  222. .word OTG_HS_EP1_OUT_IRQHandler /* USB OTG HS End Point 1 Out */
  223. .word OTG_HS_EP1_IN_IRQHandler /* USB OTG HS End Point 1 In */
  224. .word OTG_HS_WKUP_IRQHandler /* USB OTG HS Wakeup through EXTI */
  225. .word OTG_HS_IRQHandler /* USB OTG HS */
  226. .word DCMI_IRQHandler /* DCMI */
  227. .word 0 /* Reserved */
  228. .word RNG_IRQHandler /* Rng */
  229. .word FPU_IRQHandler /* FPU */
  230. .word UART7_IRQHandler /* UART7 */
  231. .word UART8_IRQHandler /* UART8 */
  232. .word SPI4_IRQHandler /* SPI4 */
  233. .word SPI5_IRQHandler /* SPI5 */
  234. .word SPI6_IRQHandler /* SPI6 */
  235. .word SAI1_IRQHandler /* SAI1 */
  236. .word LTDC_IRQHandler /* LTDC */
  237. .word LTDC_ER_IRQHandler /* LTDC error */
  238. .word DMA2D_IRQHandler /* DMA2D */
  239. .word SAI2_IRQHandler /* SAI2 */
  240. .word QUADSPI_IRQHandler /* QUADSPI */
  241. .word LPTIM1_IRQHandler /* LPTIM1 */
  242. .word CEC_IRQHandler /* HDMI_CEC */
  243. .word I2C4_EV_IRQHandler /* I2C4 Event */
  244. .word I2C4_ER_IRQHandler /* I2C4 Error */
  245. .word SPDIF_RX_IRQHandler /* SPDIF_RX */
  246. .word OTG_FS_EP1_OUT_IRQHandler /* USB OTG FS End Point 1 Out */
  247. .word OTG_FS_EP1_IN_IRQHandler /* USB OTG FS End Point 1 In */
  248. .word OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EXTI */
  249. .word OTG_FS_IRQHandler /* USB OTG FS */
  250. .word DMAMUX1_OVR_IRQHandler /* DMAMUX1 Overrun interrupt */
  251. .word HRTIM1_Master_IRQHandler /* HRTIM Master Timer global Interrupt */
  252. .word HRTIM1_TIMA_IRQHandler /* HRTIM Timer A global Interrupt */
  253. .word HRTIM1_TIMB_IRQHandler /* HRTIM Timer B global Interrupt */
  254. .word HRTIM1_TIMC_IRQHandler /* HRTIM Timer C global Interrupt */
  255. .word HRTIM1_TIMD_IRQHandler /* HRTIM Timer D global Interrupt */
  256. .word HRTIM1_TIME_IRQHandler /* HRTIM Timer E global Interrupt */
  257. .word HRTIM1_FLT_IRQHandler /* HRTIM Fault global Interrupt */
  258. .word DFSDM1_FLT0_IRQHandler /* DFSDM Filter0 Interrupt */
  259. .word DFSDM1_FLT1_IRQHandler /* DFSDM Filter1 Interrupt */
  260. .word DFSDM1_FLT2_IRQHandler /* DFSDM Filter2 Interrupt */
  261. .word DFSDM1_FLT3_IRQHandler /* DFSDM Filter3 Interrupt */
  262. .word SAI3_IRQHandler /* SAI3 global Interrupt */
  263. .word SWPMI1_IRQHandler /* Serial Wire Interface 1 global interrupt */
  264. .word TIM15_IRQHandler /* TIM15 global Interrupt */
  265. .word TIM16_IRQHandler /* TIM16 global Interrupt */
  266. .word TIM17_IRQHandler /* TIM17 global Interrupt */
  267. .word MDIOS_WKUP_IRQHandler /* MDIOS Wakeup Interrupt */
  268. .word MDIOS_IRQHandler /* MDIOS global Interrupt */
  269. .word JPEG_IRQHandler /* JPEG global Interrupt */
  270. .word MDMA_IRQHandler /* MDMA global Interrupt */
  271. .word 0 /* Reserved */
  272. .word SDMMC2_IRQHandler /* SDMMC2 global Interrupt */
  273. .word HSEM1_IRQHandler /* HSEM1 global Interrupt */
  274. .word 0 /* Reserved */
  275. .word ADC3_IRQHandler /* ADC3 global Interrupt */
  276. .word DMAMUX2_OVR_IRQHandler /* DMAMUX Overrun interrupt */
  277. .word BDMA_Channel0_IRQHandler /* BDMA Channel 0 global Interrupt */
  278. .word BDMA_Channel1_IRQHandler /* BDMA Channel 1 global Interrupt */
  279. .word BDMA_Channel2_IRQHandler /* BDMA Channel 2 global Interrupt */
  280. .word BDMA_Channel3_IRQHandler /* BDMA Channel 3 global Interrupt */
  281. .word BDMA_Channel4_IRQHandler /* BDMA Channel 4 global Interrupt */
  282. .word BDMA_Channel5_IRQHandler /* BDMA Channel 5 global Interrupt */
  283. .word BDMA_Channel6_IRQHandler /* BDMA Channel 6 global Interrupt */
  284. .word BDMA_Channel7_IRQHandler /* BDMA Channel 7 global Interrupt */
  285. .word COMP1_IRQHandler /* COMP1 global Interrupt */
  286. .word LPTIM2_IRQHandler /* LP TIM2 global interrupt */
  287. .word LPTIM3_IRQHandler /* LP TIM3 global interrupt */
  288. .word LPTIM4_IRQHandler /* LP TIM4 global interrupt */
  289. .word LPTIM5_IRQHandler /* LP TIM5 global interrupt */
  290. .word LPUART1_IRQHandler /* LP UART1 interrupt */
  291. .word 0 /* Reserved */
  292. .word CRS_IRQHandler /* Clock Recovery Global Interrupt */
  293. .word ECC_IRQHandler /* ECC diagnostic Global Interrupt */
  294. .word SAI4_IRQHandler /* SAI4 global interrupt */
  295. .word 0 /* Reserved */
  296. .word 0 /* Reserved */
  297. .word WAKEUP_PIN_IRQHandler /* Interrupt for all 6 wake-up pins */
  298.  
  299. /*******************************************************************************
  300. *
  301. * Provide weak aliases for each Exception handler to the Default_Handler.
  302. * As they are weak aliases, any function with the same name will override
  303. * this definition.
  304. *
  305. *******************************************************************************/
  306. .weak NMI_Handler
  307. .thumb_set NMI_Handler,Default_Handler
  308.  
  309. .weak HardFault_Handler
  310. .thumb_set HardFault_Handler,Default_Handler
  311.  
  312. .weak MemManage_Handler
  313. .thumb_set MemManage_Handler,Default_Handler
  314.  
  315. .weak BusFault_Handler
  316. .thumb_set BusFault_Handler,Default_Handler
  317.  
  318. .weak UsageFault_Handler
  319. .thumb_set UsageFault_Handler,Default_Handler
  320.  
  321. .weak SVC_Handler
  322. .thumb_set SVC_Handler,Default_Handler
  323.  
  324. .weak DebugMon_Handler
  325. .thumb_set DebugMon_Handler,Default_Handler
  326.  
  327. .weak PendSV_Handler
  328. .thumb_set PendSV_Handler,Default_Handler
  329.  
  330. .weak SysTick_Handler
  331. .thumb_set SysTick_Handler,Default_Handler
  332.  
  333. .weak WWDG_IRQHandler
  334. .thumb_set WWDG_IRQHandler,Default_Handler
  335.  
  336. .weak PVD_AVD_IRQHandler
  337. .thumb_set PVD_AVD_IRQHandler,Default_Handler
  338.  
  339. .weak TAMP_STAMP_IRQHandler
  340. .thumb_set TAMP_STAMP_IRQHandler,Default_Handler
  341.  
  342. .weak RTC_WKUP_IRQHandler
  343. .thumb_set RTC_WKUP_IRQHandler,Default_Handler
  344.  
  345. .weak FLASH_IRQHandler
  346. .thumb_set FLASH_IRQHandler,Default_Handler
  347.  
  348. .weak RCC_IRQHandler
  349. .thumb_set RCC_IRQHandler,Default_Handler
  350.  
  351. .weak EXTI0_IRQHandler
  352. .thumb_set EXTI0_IRQHandler,Default_Handler
  353.  
  354. .weak EXTI1_IRQHandler
  355. .thumb_set EXTI1_IRQHandler,Default_Handler
  356.  
  357. .weak EXTI2_IRQHandler
  358. .thumb_set EXTI2_IRQHandler,Default_Handler
  359.  
  360. .weak EXTI3_IRQHandler
  361. .thumb_set EXTI3_IRQHandler,Default_Handler
  362.  
  363. .weak EXTI4_IRQHandler
  364. .thumb_set EXTI4_IRQHandler,Default_Handler
  365.  
  366. .weak DMA1_Stream0_IRQHandler
  367. .thumb_set DMA1_Stream0_IRQHandler,Default_Handler
  368.  
  369. .weak DMA1_Stream1_IRQHandler
  370. .thumb_set DMA1_Stream1_IRQHandler,Default_Handler
  371.  
  372. .weak DMA1_Stream2_IRQHandler
  373. .thumb_set DMA1_Stream2_IRQHandler,Default_Handler
  374.  
  375. .weak DMA1_Stream3_IRQHandler
  376. .thumb_set DMA1_Stream3_IRQHandler,Default_Handler
  377.  
  378. .weak DMA1_Stream4_IRQHandler
  379. .thumb_set DMA1_Stream4_IRQHandler,Default_Handler
  380.  
  381. .weak DMA1_Stream5_IRQHandler
  382. .thumb_set DMA1_Stream5_IRQHandler,Default_Handler
  383.  
  384. .weak DMA1_Stream6_IRQHandler
  385. .thumb_set DMA1_Stream6_IRQHandler,Default_Handler
  386.  
  387. .weak ADC_IRQHandler
  388. .thumb_set ADC_IRQHandler,Default_Handler
  389.  
  390. .weak FDCAN1_IT0_IRQHandler
  391. .thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
  392.  
  393. .weak FDCAN2_IT0_IRQHandler
  394. .thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
  395.  
  396. .weak FDCAN1_IT1_IRQHandler
  397. .thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
  398.  
  399. .weak FDCAN2_IT1_IRQHandler
  400. .thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
  401.  
  402. .weak EXTI9_5_IRQHandler
  403. .thumb_set EXTI9_5_IRQHandler,Default_Handler
  404.  
  405. .weak TIM1_BRK_IRQHandler
  406. .thumb_set TIM1_BRK_IRQHandler,Default_Handler
  407.  
  408. .weak TIM1_UP_IRQHandler
  409. .thumb_set TIM1_UP_IRQHandler,Default_Handler
  410.  
  411. .weak TIM1_TRG_COM_IRQHandler
  412. .thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler
  413.  
  414. .weak TIM1_CC_IRQHandler
  415. .thumb_set TIM1_CC_IRQHandler,Default_Handler
  416.  
  417. .weak TIM2_IRQHandler
  418. .thumb_set TIM2_IRQHandler,Default_Handler
  419.  
  420. .weak TIM3_IRQHandler
  421. .thumb_set TIM3_IRQHandler,Default_Handler
  422.  
  423. .weak TIM4_IRQHandler
  424. .thumb_set TIM4_IRQHandler,Default_Handler
  425.  
  426. .weak I2C1_EV_IRQHandler
  427. .thumb_set I2C1_EV_IRQHandler,Default_Handler
  428.  
  429. .weak I2C1_ER_IRQHandler
  430. .thumb_set I2C1_ER_IRQHandler,Default_Handler
  431.  
  432. .weak I2C2_EV_IRQHandler
  433. .thumb_set I2C2_EV_IRQHandler,Default_Handler
  434.  
  435. .weak I2C2_ER_IRQHandler
  436. .thumb_set I2C2_ER_IRQHandler,Default_Handler
  437.  
  438. .weak SPI1_IRQHandler
  439. .thumb_set SPI1_IRQHandler,Default_Handler
  440.  
  441. .weak SPI2_IRQHandler
  442. .thumb_set SPI2_IRQHandler,Default_Handler
  443.  
  444. .weak USART1_IRQHandler
  445. .thumb_set USART1_IRQHandler,Default_Handler
  446.  
  447. .weak USART2_IRQHandler
  448. .thumb_set USART2_IRQHandler,Default_Handler
  449.  
  450. .weak USART3_IRQHandler
  451. .thumb_set USART3_IRQHandler,Default_Handler
  452.  
  453. .weak EXTI15_10_IRQHandler
  454. .thumb_set EXTI15_10_IRQHandler,Default_Handler
  455.  
  456. .weak RTC_Alarm_IRQHandler
  457. .thumb_set RTC_Alarm_IRQHandler,Default_Handler
  458.  
  459. .weak TIM8_BRK_TIM12_IRQHandler
  460. .thumb_set TIM8_BRK_TIM12_IRQHandler,Default_Handler
  461.  
  462. .weak TIM8_UP_TIM13_IRQHandler
  463. .thumb_set TIM8_UP_TIM13_IRQHandler,Default_Handler
  464.  
  465. .weak TIM8_TRG_COM_TIM14_IRQHandler
  466. .thumb_set TIM8_TRG_COM_TIM14_IRQHandler,Default_Handler
  467.  
  468. .weak TIM8_CC_IRQHandler
  469. .thumb_set TIM8_CC_IRQHandler,Default_Handler
  470.  
  471. .weak DMA1_Stream7_IRQHandler
  472. .thumb_set DMA1_Stream7_IRQHandler,Default_Handler
  473.  
  474. .weak FMC_IRQHandler
  475. .thumb_set FMC_IRQHandler,Default_Handler
  476.  
  477. .weak SDMMC1_IRQHandler
  478. .thumb_set SDMMC1_IRQHandler,Default_Handler
  479.  
  480. .weak TIM5_IRQHandler
  481. .thumb_set TIM5_IRQHandler,Default_Handler
  482.  
  483. .weak SPI3_IRQHandler
  484. .thumb_set SPI3_IRQHandler,Default_Handler
  485.  
  486. .weak UART4_IRQHandler
  487. .thumb_set UART4_IRQHandler,Default_Handler
  488.  
  489. .weak UART5_IRQHandler
  490. .thumb_set UART5_IRQHandler,Default_Handler
  491.  
  492. .weak TIM6_DAC_IRQHandler
  493. .thumb_set TIM6_DAC_IRQHandler,Default_Handler
  494.  
  495. .weak TIM7_IRQHandler
  496. .thumb_set TIM7_IRQHandler,Default_Handler
  497.  
  498. .weak DMA2_Stream0_IRQHandler
  499. .thumb_set DMA2_Stream0_IRQHandler,Default_Handler
  500.  
  501. .weak DMA2_Stream1_IRQHandler
  502. .thumb_set DMA2_Stream1_IRQHandler,Default_Handler
  503.  
  504. .weak DMA2_Stream2_IRQHandler
  505. .thumb_set DMA2_Stream2_IRQHandler,Default_Handler
  506.  
  507. .weak DMA2_Stream3_IRQHandler
  508. .thumb_set DMA2_Stream3_IRQHandler,Default_Handler
  509.  
  510. .weak DMA2_Stream4_IRQHandler
  511. .thumb_set DMA2_Stream4_IRQHandler,Default_Handler
  512.  
  513. .weak ETH_IRQHandler
  514. .thumb_set ETH_IRQHandler,Default_Handler
  515.  
  516. .weak ETH_WKUP_IRQHandler
  517. .thumb_set ETH_WKUP_IRQHandler,Default_Handler
  518.  
  519. .weak FDCAN_CAL_IRQHandler
  520. .thumb_set FDCAN_CAL_IRQHandler,Default_Handler
  521.  
  522. .weak DMA2_Stream5_IRQHandler
  523. .thumb_set DMA2_Stream5_IRQHandler,Default_Handler
  524.  
  525. .weak DMA2_Stream6_IRQHandler
  526. .thumb_set DMA2_Stream6_IRQHandler,Default_Handler
  527.  
  528. .weak DMA2_Stream7_IRQHandler
  529. .thumb_set DMA2_Stream7_IRQHandler,Default_Handler
  530.  
  531. .weak USART6_IRQHandler
  532. .thumb_set USART6_IRQHandler,Default_Handler
  533.  
  534. .weak I2C3_EV_IRQHandler
  535. .thumb_set I2C3_EV_IRQHandler,Default_Handler
  536.  
  537. .weak I2C3_ER_IRQHandler
  538. .thumb_set I2C3_ER_IRQHandler,Default_Handler
  539.  
  540. .weak OTG_HS_EP1_OUT_IRQHandler
  541. .thumb_set OTG_HS_EP1_OUT_IRQHandler,Default_Handler
  542.  
  543. .weak OTG_HS_EP1_IN_IRQHandler
  544. .thumb_set OTG_HS_EP1_IN_IRQHandler,Default_Handler
  545.  
  546. .weak OTG_HS_WKUP_IRQHandler
  547. .thumb_set OTG_HS_WKUP_IRQHandler,Default_Handler
  548.  
  549. .weak OTG_HS_IRQHandler
  550. .thumb_set OTG_HS_IRQHandler,Default_Handler
  551.  
  552. .weak DCMI_IRQHandler
  553. .thumb_set DCMI_IRQHandler,Default_Handler
  554.  
  555. .weak RNG_IRQHandler
  556. .thumb_set RNG_IRQHandler,Default_Handler
  557.  
  558. .weak FPU_IRQHandler
  559. .thumb_set FPU_IRQHandler,Default_Handler
  560.  
  561. .weak UART7_IRQHandler
  562. .thumb_set UART7_IRQHandler,Default_Handler
  563.  
  564. .weak UART8_IRQHandler
  565. .thumb_set UART8_IRQHandler,Default_Handler
  566.  
  567. .weak SPI4_IRQHandler
  568. .thumb_set SPI4_IRQHandler,Default_Handler
  569.  
  570. .weak SPI5_IRQHandler
  571. .thumb_set SPI5_IRQHandler,Default_Handler
  572.  
  573. .weak SPI6_IRQHandler
  574. .thumb_set SPI6_IRQHandler,Default_Handler
  575.  
  576. .weak SAI1_IRQHandler
  577. .thumb_set SAI1_IRQHandler,Default_Handler
  578.  
  579. .weak LTDC_IRQHandler
  580. .thumb_set LTDC_IRQHandler,Default_Handler
  581.  
  582. .weak LTDC_ER_IRQHandler
  583. .thumb_set LTDC_ER_IRQHandler,Default_Handler
  584.  
  585. .weak DMA2D_IRQHandler
  586. .thumb_set DMA2D_IRQHandler,Default_Handler
  587.  
  588. .weak SAI2_IRQHandler
  589. .thumb_set SAI2_IRQHandler,Default_Handler
  590.  
  591. .weak QUADSPI_IRQHandler
  592. .thumb_set QUADSPI_IRQHandler,Default_Handler
  593.  
  594. .weak LPTIM1_IRQHandler
  595. .thumb_set LPTIM1_IRQHandler,Default_Handler
  596.  
  597. .weak CEC_IRQHandler
  598. .thumb_set CEC_IRQHandler,Default_Handler
  599.  
  600. .weak I2C4_EV_IRQHandler
  601. .thumb_set I2C4_EV_IRQHandler,Default_Handler
  602.  
  603. .weak I2C4_ER_IRQHandler
  604. .thumb_set I2C4_ER_IRQHandler,Default_Handler
  605.  
  606. .weak SPDIF_RX_IRQHandler
  607. .thumb_set SPDIF_RX_IRQHandler,Default_Handler
  608.  
  609. .weak OTG_FS_EP1_OUT_IRQHandler
  610. .thumb_set OTG_FS_EP1_OUT_IRQHandler,Default_Handler
  611.  
  612. .weak OTG_FS_EP1_IN_IRQHandler
  613. .thumb_set OTG_FS_EP1_IN_IRQHandler,Default_Handler
  614.  
  615. .weak OTG_FS_WKUP_IRQHandler
  616. .thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler
  617.  
  618. .weak OTG_FS_IRQHandler
  619. .thumb_set OTG_FS_IRQHandler,Default_Handler
  620.  
  621. .weak DMAMUX1_OVR_IRQHandler
  622. .thumb_set DMAMUX1_OVR_IRQHandler,Default_Handler
  623.  
  624. .weak HRTIM1_Master_IRQHandler
  625. .thumb_set HRTIM1_Master_IRQHandler,Default_Handler
  626.  
  627. .weak HRTIM1_TIMA_IRQHandler
  628. .thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
  629.  
  630. .weak HRTIM1_TIMB_IRQHandler
  631. .thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
  632.  
  633. .weak HRTIM1_TIMC_IRQHandler
  634. .thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
  635.  
  636. .weak HRTIM1_TIMD_IRQHandler
  637. .thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
  638.  
  639. .weak HRTIM1_TIME_IRQHandler
  640. .thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
  641.  
  642. .weak HRTIM1_FLT_IRQHandler
  643. .thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
  644.  
  645. .weak DFSDM1_FLT0_IRQHandler
  646. .thumb_set DFSDM1_FLT0_IRQHandler,Default_Handler
  647.  
  648. .weak DFSDM1_FLT1_IRQHandler
  649. .thumb_set DFSDM1_FLT1_IRQHandler,Default_Handler
  650.  
  651. .weak DFSDM1_FLT2_IRQHandler
  652. .thumb_set DFSDM1_FLT2_IRQHandler,Default_Handler
  653.  
  654. .weak DFSDM1_FLT3_IRQHandler
  655. .thumb_set DFSDM1_FLT3_IRQHandler,Default_Handler
  656.  
  657. .weak SAI3_IRQHandler
  658. .thumb_set SAI3_IRQHandler,Default_Handler
  659.  
  660. .weak SWPMI1_IRQHandler
  661. .thumb_set SWPMI1_IRQHandler,Default_Handler
  662.  
  663. .weak TIM15_IRQHandler
  664. .thumb_set TIM15_IRQHandler,Default_Handler
  665.  
  666. .weak TIM16_IRQHandler
  667. .thumb_set TIM16_IRQHandler,Default_Handler
  668.  
  669. .weak TIM17_IRQHandler
  670. .thumb_set TIM17_IRQHandler,Default_Handler
  671.  
  672. .weak MDIOS_WKUP_IRQHandler
  673. .thumb_set MDIOS_WKUP_IRQHandler,Default_Handler
  674.  
  675. .weak MDIOS_IRQHandler
  676. .thumb_set MDIOS_IRQHandler,Default_Handler
  677.  
  678. .weak JPEG_IRQHandler
  679. .thumb_set JPEG_IRQHandler,Default_Handler
  680.  
  681. .weak MDMA_IRQHandler
  682. .thumb_set MDMA_IRQHandler,Default_Handler
  683.  
  684. .weak SDMMC2_IRQHandler
  685. .thumb_set SDMMC2_IRQHandler,Default_Handler
  686.  
  687. .weak HSEM1_IRQHandler
  688. .thumb_set HSEM1_IRQHandler,Default_Handler
  689.  
  690. .weak ADC3_IRQHandler
  691. .thumb_set ADC3_IRQHandler,Default_Handler
  692.  
  693. .weak DMAMUX2_OVR_IRQHandler
  694. .thumb_set DMAMUX2_OVR_IRQHandler,Default_Handler
  695.  
  696. .weak BDMA_Channel0_IRQHandler
  697. .thumb_set BDMA_Channel0_IRQHandler,Default_Handler
  698.  
  699. .weak BDMA_Channel1_IRQHandler
  700. .thumb_set BDMA_Channel1_IRQHandler,Default_Handler
  701.  
  702. .weak BDMA_Channel2_IRQHandler
  703. .thumb_set BDMA_Channel2_IRQHandler,Default_Handler
  704.  
  705. .weak BDMA_Channel3_IRQHandler
  706. .thumb_set BDMA_Channel3_IRQHandler,Default_Handler
  707.  
  708. .weak BDMA_Channel4_IRQHandler
  709. .thumb_set BDMA_Channel4_IRQHandler,Default_Handler
  710.  
  711. .weak BDMA_Channel5_IRQHandler
  712. .thumb_set BDMA_Channel5_IRQHandler,Default_Handler
  713.  
  714. .weak BDMA_Channel6_IRQHandler
  715. .thumb_set BDMA_Channel6_IRQHandler,Default_Handler
  716.  
  717. .weak BDMA_Channel7_IRQHandler
  718. .thumb_set BDMA_Channel7_IRQHandler,Default_Handler
  719.  
  720. .weak COMP1_IRQHandler
  721. .thumb_set COMP1_IRQHandler,Default_Handler
  722.  
  723. .weak LPTIM2_IRQHandler
  724. .thumb_set LPTIM2_IRQHandler,Default_Handler
  725.  
  726. .weak LPTIM3_IRQHandler
  727. .thumb_set LPTIM3_IRQHandler,Default_Handler
  728.  
  729. .weak LPTIM4_IRQHandler
  730. .thumb_set LPTIM4_IRQHandler,Default_Handler
  731.  
  732. .weak LPTIM5_IRQHandler
  733. .thumb_set LPTIM5_IRQHandler,Default_Handler
  734.  
  735. .weak LPUART1_IRQHandler
  736. .thumb_set LPUART1_IRQHandler,Default_Handler
  737.  
  738. .weak CRS_IRQHandler
  739. .thumb_set CRS_IRQHandler,Default_Handler
  740.  
  741. .weak ECC_IRQHandler
  742. .thumb_set ECC_IRQHandler,Default_Handler
  743.  
  744. .weak SAI4_IRQHandler
  745. .thumb_set SAI4_IRQHandler,Default_Handler
  746.  
  747. .weak WAKEUP_PIN_IRQHandler
  748. .thumb_set WAKEUP_PIN_IRQHandler,Default_Handler
  749.  
  750. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
  751.  
  752.  
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