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  1. From e91bd291d7af5568e291c39f49d145fee6eaad90 Mon Sep 17 00:00:00 2001
  2. From: Fabio Estevam <festevam@gmail.com>
  3. Date: Fri, 13 Oct 2017 15:46:49 -0300
  4. Subject: [PATCH v5] wandboard: Add support for the MX6QP variant
  5.  
  6. Add support for the latest MX6QP wandboard variant.
  7.  
  8. Based on Richard Hu's work from Technexion's U-Boot tree.
  9.  
  10. Signed-off-by: Fabio Estevam <festevam@gmail.com>
  11. ---
  12. Changes since v4:
  13. - Use the existing DDR config functions (Stefano)
  14.  
  15. arch/arm/include/asm/arch-mx6/imx-regs.h | 3 +
  16. board/wandboard/spl.c | 94 +++++++++++++++++++++++++++++++-
  17. board/wandboard/wandboard.c | 6 +-
  18. include/configs/wandboard.h | 2 +
  19. 4 files changed, 101 insertions(+), 4 deletions(-)
  20.  
  21. diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h b/arch/arm/include/asm/arch-mx6/imx-regs.h
  22. index 86e2670..624ccec 100644
  23. --- a/arch/arm/include/asm/arch-mx6/imx-regs.h
  24. +++ b/arch/arm/include/asm/arch-mx6/imx-regs.h
  25. @@ -346,6 +346,9 @@
  26. #define IOMUXC_SNVS_BASE_ADDR (AIPS3_ARB_BASE_ADDR + 0x90000)
  27. #define SNVS_GPR_BASE_ADDR (AIPS3_ARB_BASE_ADDR + 0x94000)
  28. #endif
  29. +
  30. +#define NOC_DDR_BASE_ADDR (GPV0_BASE_ADDR + 0xB0000)
  31. +
  32. /* Only for i.MX6SX */
  33. #define LCDIF2_BASE_ADDR (AIPS3_ARB_BASE_ADDR + 0x24000)
  34. #define MX6SX_LCDIF1_BASE_ADDR (AIPS3_ARB_BASE_ADDR + 0x20000)
  35. diff --git a/board/wandboard/spl.c b/board/wandboard/spl.c
  36. index 00c75d0..1ad8380 100644
  37. --- a/board/wandboard/spl.c
  38. +++ b/board/wandboard/spl.c
  39. @@ -32,6 +32,7 @@ DECLARE_GLOBAL_DATA_PTR;
  40.  
  41. #define IMX6DQ_DRIVE_STRENGTH 0x30
  42. #define IMX6SDL_DRIVE_STRENGTH 0x28
  43. +#define IMX6QP_DRIVE_STRENGTH 0x28
  44.  
  45. /* configure MX6Q/DUAL mmdc DDR io registers */
  46. static struct mx6dq_iomux_ddr_regs mx6dq_ddr_ioregs = {
  47. @@ -63,6 +64,36 @@ static struct mx6dq_iomux_ddr_regs mx6dq_ddr_ioregs = {
  48. .dram_dqm7 = IMX6DQ_DRIVE_STRENGTH,
  49. };
  50.  
  51. +/* configure MX6QP mmdc DDR io registers */
  52. +static struct mx6dq_iomux_ddr_regs mx6qp_ddr_ioregs = {
  53. + .dram_sdclk_0 = IMX6QP_DRIVE_STRENGTH,
  54. + .dram_sdclk_1 = IMX6QP_DRIVE_STRENGTH,
  55. + .dram_cas = IMX6QP_DRIVE_STRENGTH,
  56. + .dram_ras = IMX6QP_DRIVE_STRENGTH,
  57. + .dram_reset = IMX6QP_DRIVE_STRENGTH,
  58. + .dram_sdcke0 = IMX6QP_DRIVE_STRENGTH,
  59. + .dram_sdcke1 = IMX6QP_DRIVE_STRENGTH,
  60. + .dram_sdba2 = 0x00000000,
  61. + .dram_sdodt0 = IMX6QP_DRIVE_STRENGTH,
  62. + .dram_sdodt1 = IMX6QP_DRIVE_STRENGTH,
  63. + .dram_sdqs0 = IMX6QP_DRIVE_STRENGTH,
  64. + .dram_sdqs1 = IMX6QP_DRIVE_STRENGTH,
  65. + .dram_sdqs2 = IMX6QP_DRIVE_STRENGTH,
  66. + .dram_sdqs3 = IMX6QP_DRIVE_STRENGTH,
  67. + .dram_sdqs4 = IMX6QP_DRIVE_STRENGTH,
  68. + .dram_sdqs5 = IMX6QP_DRIVE_STRENGTH,
  69. + .dram_sdqs6 = IMX6QP_DRIVE_STRENGTH,
  70. + .dram_sdqs7 = IMX6QP_DRIVE_STRENGTH,
  71. + .dram_dqm0 = IMX6QP_DRIVE_STRENGTH,
  72. + .dram_dqm1 = IMX6QP_DRIVE_STRENGTH,
  73. + .dram_dqm2 = IMX6QP_DRIVE_STRENGTH,
  74. + .dram_dqm3 = IMX6QP_DRIVE_STRENGTH,
  75. + .dram_dqm4 = IMX6QP_DRIVE_STRENGTH,
  76. + .dram_dqm5 = IMX6QP_DRIVE_STRENGTH,
  77. + .dram_dqm6 = IMX6QP_DRIVE_STRENGTH,
  78. + .dram_dqm7 = IMX6QP_DRIVE_STRENGTH,
  79. +};
  80. +
  81. /* configure MX6Q/DUAL mmdc GRP io registers */
  82. static struct mx6dq_iomux_grp_regs mx6dq_grp_ioregs = {
  83. .grp_ddr_type = 0x000c0000,
  84. @@ -81,6 +112,24 @@ static struct mx6dq_iomux_grp_regs mx6dq_grp_ioregs = {
  85. .grp_b7ds = IMX6DQ_DRIVE_STRENGTH,
  86. };
  87.  
  88. +/* configure MX6QP mmdc GRP io registers */
  89. +static struct mx6dq_iomux_grp_regs mx6qp_grp_ioregs = {
  90. + .grp_ddr_type = 0x000c0000,
  91. + .grp_ddrmode_ctl = 0x00020000,
  92. + .grp_ddrpke = 0x00000000,
  93. + .grp_addds = IMX6QP_DRIVE_STRENGTH,
  94. + .grp_ctlds = IMX6QP_DRIVE_STRENGTH,
  95. + .grp_ddrmode = 0x00020000,
  96. + .grp_b0ds = IMX6QP_DRIVE_STRENGTH,
  97. + .grp_b1ds = IMX6QP_DRIVE_STRENGTH,
  98. + .grp_b2ds = IMX6QP_DRIVE_STRENGTH,
  99. + .grp_b3ds = IMX6QP_DRIVE_STRENGTH,
  100. + .grp_b4ds = IMX6QP_DRIVE_STRENGTH,
  101. + .grp_b5ds = IMX6QP_DRIVE_STRENGTH,
  102. + .grp_b6ds = IMX6QP_DRIVE_STRENGTH,
  103. + .grp_b7ds = IMX6QP_DRIVE_STRENGTH,
  104. +};
  105. +
  106. /* configure MX6SOLO/DUALLITE mmdc DDR io registers */
  107. struct mx6sdl_iomux_ddr_regs mx6sdl_ddr_ioregs = {
  108. .dram_sdclk_0 = IMX6SDL_DRIVE_STRENGTH,
  109. @@ -172,6 +221,21 @@ static struct mx6_mmdc_calibration mx6q_2g_mmdc_calib = {
  110. .p1_mpwrdlctl = 0x462f453f,
  111. };
  112.  
  113. +static struct mx6_mmdc_calibration mx6qp_2g_mmdc_calib = {
  114. + .p0_mpwldectrl0 = 0x00060004,
  115. + .p0_mpwldectrl1 = 0x000B0004,
  116. + .p1_mpwldectrl0 = 0x00000004,
  117. + .p1_mpwldectrl1 = 0x00000000,
  118. + .p0_mpdgctrl0 = 0x03040314,
  119. + .p0_mpdgctrl1 = 0x03080300,
  120. + .p1_mpdgctrl0 = 0x03000310,
  121. + .p1_mpdgctrl1 = 0x0268023C,
  122. + .p0_mprddlctl = 0x4034363A,
  123. + .p1_mprddlctl = 0x36302C3C,
  124. + .p0_mpwrdlctl = 0x3E3E4046,
  125. + .p1_mpwrdlctl = 0x483A4844,
  126. +};
  127. +
  128. /* DDR 64bit 2GB */
  129. static struct mx6_ddr_sysinfo mem_q = {
  130. .dsize = 2,
  131. @@ -260,15 +324,41 @@ static void ccgr_init(void)
  132. writel(0x00C03F3F, &ccm->CCGR0);
  133. writel(0x0030FC03, &ccm->CCGR1);
  134. writel(0x0FFFC000, &ccm->CCGR2);
  135. - writel(0x3FF00000, &ccm->CCGR3);
  136. + writel(0x3FF03000, &ccm->CCGR3);
  137. writel(0x00FFF300, &ccm->CCGR4);
  138. writel(0x0F0000C3, &ccm->CCGR5);
  139. writel(0x000003FF, &ccm->CCGR6);
  140. }
  141.  
  142. +static void mx6qp_noc_config(void)
  143. +{
  144. + /* add NOC DDR configuration */
  145. + writel(0x00000000, NOC_DDR_BASE_ADDR + 0x008);
  146. + writel(0x2871C39B, NOC_DDR_BASE_ADDR + 0x00c);
  147. + writel(0x000005B4, NOC_DDR_BASE_ADDR + 0x038);
  148. + writel(0x00000040, NOC_DDR_BASE_ADDR + 0x014);
  149. + writel(0x00000020, NOC_DDR_BASE_ADDR + 0x028);
  150. + writel(0x00000020, NOC_DDR_BASE_ADDR + 0x02c);
  151. + writel(0x02088032, MMDC_P0_BASE_ADDR + 0x01c);
  152. + writel(0x00008033, MMDC_P0_BASE_ADDR + 0x01c);
  153. + writel(0x00048031, MMDC_P0_BASE_ADDR + 0x01c);
  154. + writel(0x19308030, MMDC_P0_BASE_ADDR + 0x01c);
  155. + writel(0x04008040, MMDC_P0_BASE_ADDR + 0x01c);
  156. + writel(0x00007800, MMDC_P0_BASE_ADDR + 0x020);
  157. + writel(0x00022227, MMDC_P0_BASE_ADDR + 0x818);
  158. + writel(0x00022227, MMDC_P1_BASE_ADDR + 0x818);
  159. + writel(0x00025576, MMDC_P0_BASE_ADDR + 0x004);
  160. + writel(0x00011006, MMDC_P0_BASE_ADDR + 0x404);
  161. + writel(0x00000000, MMDC_P0_BASE_ADDR + 0x01c);
  162. +}
  163. +
  164. static void spl_dram_init(void)
  165. {
  166. - if (is_cpu_type(MXC_CPU_MX6SOLO)) {
  167. + if (is_mx6dqp()) {
  168. + mx6qp_noc_config();
  169. + mx6dq_dram_iocfg(64, &mx6qp_ddr_ioregs, &mx6qp_grp_ioregs);
  170. + mx6_dram_cfg(&mem_q, &mx6qp_2g_mmdc_calib, &h5t04g63afr);
  171. + } else if (is_cpu_type(MXC_CPU_MX6SOLO)) {
  172. mx6sdl_dram_iocfg(32, &mx6sdl_ddr_ioregs, &mx6sdl_grp_ioregs);
  173. mx6_dram_cfg(&mem_s, &mx6s_512m_mmdc_calib, &h5tq2g63dfr);
  174. } else if (is_cpu_type(MXC_CPU_MX6DL)) {
  175. diff --git a/board/wandboard/wandboard.c b/board/wandboard/wandboard.c
  176. index 6d2609c..051560f 100644
  177. --- a/board/wandboard/wandboard.c
  178. +++ b/board/wandboard/wandboard.c
  179. @@ -512,7 +512,9 @@ int board_late_init(void)
  180. #endif
  181.  
  182. #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
  183. - if (is_mx6dq())
  184. + if (is_mx6dqp())
  185. + env_set("board_rev", "MX6QP");
  186. + else if (is_mx6dq())
  187. env_set("board_rev", "MX6Q");
  188. else
  189. env_set("board_rev", "MX6DL");
  190. @@ -534,7 +536,7 @@ int board_init(void)
  191.  
  192. #if defined(CONFIG_VIDEO_IPUV3)
  193. setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &mx6dl_i2c2_pad_info);
  194. - if (is_mx6dq()) {
  195. + if (is_mx6dq() || is_mx6dqp()) {
  196. setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &mx6q_i2c2_pad_info);
  197. setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &mx6q_i2c3_pad_info);
  198. } else {
  199. diff --git a/include/configs/wandboard.h b/include/configs/wandboard.h
  200. index ba88d02..8fdfc02 100644
  201. --- a/include/configs/wandboard.h
  202. +++ b/include/configs/wandboard.h
  203. @@ -109,6 +109,8 @@
  204. "fi; " \
  205. "fi\0" \
  206. "findfdt="\
  207. + "if test $board_name = D1 && test $board_rev = MX6QP ; then " \
  208. + "setenv fdtfile imx6qp-wandboard-revd1.dtb; fi; " \
  209. "if test $board_name = D1 && test $board_rev = MX6Q ; then " \
  210. "setenv fdtfile imx6q-wandboard-revd1.dtb; fi; " \
  211. "if test $board_name = D1 && test $board_rev = MX6DL ; then " \
  212. --
  213. 2.7.4
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