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sun5i-a13-dreamcatcher.dts (unofficial)

zefie
Apr 9th, 2019
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  1. /dts-v1/;
  2.  
  3. / {
  4. #address-cells = <0x1>;
  5. #size-cells = <0x1>;
  6. compatible = "othernet,a13-dreamcatcher", "allwinner,sun5i-a13";
  7. interrupt-parent = <0x1>;
  8. model = "Othernet A13-Dreamcatcher";
  9.  
  10. __symbols__ {
  11. spi0_cs0_pins_a = "/soc@01c00000/pinctrl@01c20800/spi0-cs0@0";
  12. spi0_pins_a = "/soc@01c00000/pinctrl@01c20800/spi0@0";
  13. spi1_cs0_pins_a = "/soc@01c00000/pinctrl@01c20800/spi1-cs0@0";
  14. spi1_pins_a = "/soc@01c00000/pinctrl@01c20800/spi1@0";
  15. spi2_cs0_pins_a = "/soc@01c00000/pinctrl@01c20800/spi2-cs0@0";
  16. spi2_pins_a = "/soc@01c00000/pinctrl@01c20800/spi2@0";
  17. };
  18.  
  19. ahci-5v {
  20. compatible = "regulator-fixed";
  21. enable-active-high;
  22. gpio = <0x1e 0x1 0x8 0x0>;
  23. pinctrl-0 = <0x3c>;
  24. pinctrl-names = "default";
  25. regulator-boot-on;
  26. regulator-max-microvolt = <0x4c4b40>;
  27. regulator-min-microvolt = <0x4c4b40>;
  28. regulator-name = "ahci-5v";
  29. status = "disabled";
  30. };
  31.  
  32. aliases {
  33. serial0 = "/soc@01c00000/serial@01c28400";
  34. };
  35.  
  36. backlight: backlight {
  37. compatible = "gpio-backlight";
  38. gpios = <0x1e 0x3 0x17 0x0>;
  39. };
  40.  
  41. bridge {
  42. #address-cells = <0x1>;
  43. #size-cells = <0x0>;
  44. compatible = "dumb-vga-dac";
  45.  
  46. ports {
  47. #address-cells = <0x1>;
  48. #size-cells = <0x0>;
  49.  
  50. port@1 {
  51. reg = <0x1>;
  52.  
  53. endpoint {
  54. linux,phandle = <0x42>;
  55. phandle = <0x42>;
  56. remote-endpoint = <0x41>;
  57. };
  58. };
  59. };
  60. };
  61.  
  62. chosen {
  63. #address-cells = <0x1>;
  64. #size-cells = <0x1>;
  65. ranges;
  66. stdout-path = "serial0:115200n8";
  67.  
  68. framebuffer@0 {
  69. allwinner,pipeline = "de_be0-lcd0";
  70. clocks = <0x2 0x24 0x2 0x2c 0x3 0x4 0x5 0x1a>;
  71. compatible = "allwinner,simple-framebuffer", "simple-framebuffer";
  72. // status = "disabled";
  73. };
  74. };
  75.  
  76. clocks {
  77. #address-cells = <0x1>;
  78. #size-cells = <0x1>;
  79. ranges;
  80.  
  81. ahb@01c20054 {
  82. #clock-cells = <0x0>;
  83. assigned-clock-parents = <0xf 0x1>;
  84. assigned-clocks = <0x10>;
  85. clock-output-names = "ahb";
  86. clocks = <0xe 0x6 0xf 0x1>;
  87. compatible = "allwinner,sun5i-a13-ahb-clk";
  88. linux,phandle = <0x10>;
  89. phandle = <0x10>;
  90. reg = <0x1c20054 0x4>;
  91. };
  92.  
  93. apb0@01c20054 {
  94. #clock-cells = <0x0>;
  95. clock-output-names = "apb0";
  96. clocks = <0x10>;
  97. compatible = "allwinner,sun4i-a10-apb0-clk";
  98. linux,phandle = <0x13>;
  99. phandle = <0x13>;
  100. reg = <0x1c20054 0x4>;
  101. };
  102.  
  103. axi@01c20054 {
  104. #clock-cells = <0x0>;
  105. clock-output-names = "axi";
  106. clocks = <0x6>;
  107. compatible = "allwinner,sun4i-a10-axi-clk";
  108. linux,phandle = <0xe>;
  109. phandle = <0xe>;
  110. reg = <0x1c20054 0x4>;
  111. };
  112.  
  113. clk@0 {
  114. #clock-cells = <0x0>;
  115. clock-frequency = <0x8000>;
  116. clock-output-names = "osc32k";
  117. compatible = "fixed-clock";
  118. linux,phandle = <0xb>;
  119. phandle = <0xb>;
  120. };
  121.  
  122. clk@01c20000 {
  123. #clock-cells = <0x0>;
  124. clock-output-names = "pll1";
  125. clocks = <0x7>;
  126. compatible = "allwinner,sun4i-a10-pll1-clk";
  127. linux,phandle = <0xc>;
  128. phandle = <0xc>;
  129. reg = <0x1c20000 0x4>;
  130. };
  131.  
  132. clk@01c20008 {
  133. #clock-cells = <0x1>;
  134. clock-output-names = "pll2-1x", "pll2-2x", "pll2-4x", "pll2-8x";
  135. clocks = <0x7>;
  136. compatible = "allwinner,sun5i-a13-pll2-clk";
  137. linux,phandle = <0x12>;
  138. phandle = <0x12>;
  139. reg = <0x1c20008 0x8>;
  140. };
  141.  
  142. clk@01c20010 {
  143. #clock-cells = <0x0>;
  144. clock-output-names = "pll3";
  145. clocks = <0x8>;
  146. compatible = "allwinner,sun4i-a10-pll3-clk";
  147. linux,phandle = <0x9>;
  148. phandle = <0x9>;
  149. reg = <0x1c20010 0x4>;
  150. };
  151.  
  152. clk@01c20018 {
  153. #clock-cells = <0x0>;
  154. clock-output-names = "pll4";
  155. clocks = <0x7>;
  156. compatible = "allwinner,sun4i-a10-pll1-clk";
  157. reg = <0x1c20018 0x4>;
  158. };
  159.  
  160. clk@01c20020 {
  161. #clock-cells = <0x1>;
  162. clock-output-names = "pll5_ddr", "pll5_other";
  163. clocks = <0x7>;
  164. compatible = "allwinner,sun4i-a10-pll5-clk";
  165. linux,phandle = <0x11>;
  166. phandle = <0x11>;
  167. reg = <0x1c20020 0x4>;
  168. };
  169.  
  170. clk@01c20028 {
  171. #clock-cells = <0x1>;
  172. clock-output-names = "pll6_sata", "pll6_other", "pll6";
  173. clocks = <0x7>;
  174. compatible = "allwinner,sun4i-a10-pll6-clk";
  175. linux,phandle = <0xf>;
  176. phandle = <0xf>;
  177. reg = <0x1c20028 0x4>;
  178. };
  179.  
  180. clk@01c20030 {
  181. #clock-cells = <0x0>;
  182. clock-output-names = "pll7";
  183. clocks = <0x8>;
  184. compatible = "allwinner,sun4i-a10-pll3-clk";
  185. linux,phandle = <0xa>;
  186. phandle = <0xa>;
  187. reg = <0x1c20030 0x4>;
  188. };
  189.  
  190. clk@01c20050 {
  191. #clock-cells = <0x0>;
  192. clock-frequency = <0x16e3600>;
  193. clock-output-names = "osc24M";
  194. compatible = "allwinner,sun4i-a10-osc-clk";
  195. linux,phandle = <0x7>;
  196. phandle = <0x7>;
  197. reg = <0x1c20050 0x4>;
  198. };
  199.  
  200. clk@01c20058 {
  201. #clock-cells = <0x0>;
  202. clock-output-names = "apb1";
  203. clocks = <0x7 0xf 0x1 0xb>;
  204. compatible = "allwinner,sun4i-a10-apb1-clk";
  205. linux,phandle = <0x14>;
  206. phandle = <0x14>;
  207. reg = <0x1c20058 0x4>;
  208. };
  209.  
  210. clk@01c2005c {
  211. #clock-cells = <0x1>;
  212. clock-indices = <0x0>;
  213. clock-output-names = "axi_dram";
  214. clocks = <0xe>;
  215. compatible = "allwinner,sun4i-a10-axi-gates-clk";
  216. reg = <0x1c2005c 0x4>;
  217. };
  218.  
  219. clk@01c20060 {
  220. #clock-cells = <0x1>;
  221. clock-indices = <0x0 0x1 0x2 0x5 0x6 0x7 0x8 0x9 0xa 0xd 0xe 0x14 0x15 0x16 0x1c 0x20 0x22 0x24 0x28 0x2c 0x2e 0x33 0x34>;
  222. clock-output-names = "ahb_usbotg", "ahb_ehci", "ahb_ohci", "ahb_ss", "ahb_dma", "ahb_bist", "ahb_mmc0", "ahb_mmc1", "ahb_mmc2", "ahb_nand", "ahb_sdram", "ahb_spi0", "ahb_spi1", "ahb_spi2", "ahb_stimer", "ahb_ve", "ahb_tve", "ahb_lcd", "ahb_csi", "ahb_de_be", "ahb_de_fe", "ahb_iep", "ahb_mali400";
  223. clocks = <0x10>;
  224. compatible = "allwinner,sun5i-a13-ahb-gates-clk";
  225. linux,phandle = <0x2>;
  226. phandle = <0x2>;
  227. reg = <0x1c20060 0x8>;
  228. };
  229.  
  230. clk@01c20068 {
  231. #clock-cells = <0x1>;
  232. clock-indices = <0x0 0x5 0x6>;
  233. clock-output-names = "apb0_codec", "apb0_pio", "apb0_ir";
  234. clocks = <0x13>;
  235. compatible = "allwinner,sun5i-a13-apb0-gates-clk";
  236. linux,phandle = <0x2b>;
  237. phandle = <0x2b>;
  238. reg = <0x1c20068 0x4>;
  239. };
  240.  
  241. clk@01c2006c {
  242. #clock-cells = <0x1>;
  243. clock-indices = <0x0 0x1 0x2 0x11 0x13>;
  244. clock-output-names = "apb1_i2c0", "apb1_i2c1", "apb1_i2c2", "apb1_uart1", "apb1_uart3";
  245. clocks = <0x14>;
  246. compatible = "allwinner,sun5i-a13-apb1-gates-clk";
  247. linux,phandle = <0x2d>;
  248. phandle = <0x2d>;
  249. reg = <0x1c2006c 0x4>;
  250. };
  251.  
  252. clk@01c20080 {
  253. #clock-cells = <0x0>;
  254. clock-output-names = "nand";
  255. clocks = <0x7 0xf 0x1 0x11 0x1>;
  256. compatible = "allwinner,sun4i-a10-mod0-clk";
  257. reg = <0x1c20080 0x4>;
  258. };
  259.  
  260. clk@01c20084 {
  261. #clock-cells = <0x0>;
  262. clock-output-names = "ms";
  263. clocks = <0x7 0xf 0x1 0x11 0x1>;
  264. compatible = "allwinner,sun4i-a10-mod0-clk";
  265. reg = <0x1c20084 0x4>;
  266. };
  267.  
  268. clk@01c20088 {
  269. #clock-cells = <0x1>;
  270. clock-output-names = "mmc0", "mmc0_output", "mmc0_sample";
  271. clocks = <0x7 0xf 0x1 0x11 0x1>;
  272. compatible = "allwinner,sun4i-a10-mmc-clk";
  273. linux,phandle = <0x1a>;
  274. phandle = <0x1a>;
  275. reg = <0x1c20088 0x4>;
  276. };
  277.  
  278. clk@01c2008c {
  279. #clock-cells = <0x1>;
  280. clock-output-names = "mmc1", "mmc1_output", "mmc1_sample";
  281. clocks = <0x7 0xf 0x1 0x11 0x1>;
  282. compatible = "allwinner,sun4i-a10-mmc-clk";
  283. linux,phandle = <0x1f>;
  284. phandle = <0x1f>;
  285. reg = <0x1c2008c 0x4>;
  286. };
  287.  
  288. clk@01c20090 {
  289. #clock-cells = <0x1>;
  290. clock-output-names = "mmc2", "mmc2_output", "mmc2_sample";
  291. clocks = <0x7 0xf 0x1 0x11 0x1>;
  292. compatible = "allwinner,sun4i-a10-mmc-clk";
  293. linux,phandle = <0x20>;
  294. phandle = <0x20>;
  295. reg = <0x1c20090 0x4>;
  296. };
  297.  
  298. clk@01c20098 {
  299. #clock-cells = <0x0>;
  300. clock-output-names = "ts";
  301. clocks = <0x7 0xf 0x1 0x11 0x1>;
  302. compatible = "allwinner,sun4i-a10-mod0-clk";
  303. reg = <0x1c20098 0x4>;
  304. };
  305.  
  306. clk@01c2009c {
  307. #clock-cells = <0x0>;
  308. clock-output-names = "ss";
  309. clocks = <0x7 0xf 0x1 0x11 0x1>;
  310. compatible = "allwinner,sun4i-a10-mod0-clk";
  311. reg = <0x1c2009c 0x4>;
  312. };
  313.  
  314. clk@01c200a0 {
  315. #clock-cells = <0x0>;
  316. clock-output-names = "spi0";
  317. clocks = <0x7 0xf 0x1 0x11 0x1>;
  318. compatible = "allwinner,sun4i-a10-mod0-clk";
  319. linux,phandle = <0x17>;
  320. phandle = <0x17>;
  321. reg = <0x1c200a0 0x4>;
  322. };
  323.  
  324. clk@01c200a4 {
  325. #clock-cells = <0x0>;
  326. clock-output-names = "spi1";
  327. clocks = <0x7 0xf 0x1 0x11 0x1>;
  328. compatible = "allwinner,sun4i-a10-mod0-clk";
  329. linux,phandle = <0x19>;
  330. phandle = <0x19>;
  331. reg = <0x1c200a4 0x4>;
  332. };
  333.  
  334. clk@01c200a8 {
  335. #clock-cells = <0x0>;
  336. clock-output-names = "spi2";
  337. clocks = <0x7 0xf 0x1 0x11 0x1>;
  338. compatible = "allwinner,sun4i-a10-mod0-clk";
  339. linux,phandle = <0x2a>;
  340. phandle = <0x2a>;
  341. reg = <0x1c200a8 0x4>;
  342. };
  343.  
  344. clk@01c200b0 {
  345. #clock-cells = <0x0>;
  346. clock-output-names = "ir0";
  347. clocks = <0x7 0xf 0x1 0x11 0x1>;
  348. compatible = "allwinner,sun4i-a10-mod0-clk";
  349. reg = <0x1c200b0 0x4>;
  350. };
  351.  
  352. clk@01c200cc {
  353. #clock-cells = <0x1>;
  354. #reset-cells = <0x1>;
  355. clock-output-names = "usb_ohci0", "usb_phy";
  356. clocks = <0xf 0x1>;
  357. compatible = "allwinner,sun5i-a13-usb-clk";
  358. linux,phandle = <0x25>;
  359. phandle = <0x25>;
  360. reg = <0x1c200cc 0x4>;
  361. };
  362.  
  363. clk@01c20100 {
  364. #clock-cells = <0x1>;
  365. clock-indices = <0x0 0x1 0x19 0x1a 0x1d 0x1f>;
  366. clock-output-names = "dram_ve", "dram_csi", "dram_de_fe", "dram_de_be", "dram_ace", "dram_iep";
  367. clocks = <0x11 0x0>;
  368. compatible = "allwinner,sun5i-a13-dram-gates-clk", "allwinner,sun4i-a10-gates-clk";
  369. linux,phandle = <0x5>;
  370. phandle = <0x5>;
  371. reg = <0x1c20100 0x4>;
  372. };
  373.  
  374. clk@01c20104 {
  375. #clock-cells = <0x0>;
  376. #reset-cells = <0x0>;
  377. clock-output-names = "de-be";
  378. clocks = <0x9 0xa 0x11 0x1>;
  379. compatible = "allwinner,sun4i-a10-display-clk";
  380. linux,phandle = <0x3>;
  381. phandle = <0x3>;
  382. reg = <0x1c20104 0x4>;
  383. };
  384.  
  385. clk@01c2010c {
  386. #clock-cells = <0x0>;
  387. #reset-cells = <0x0>;
  388. clock-output-names = "de-fe";
  389. clocks = <0x9 0xa 0x11 0x1>;
  390. compatible = "allwinner,sun4i-a10-display-clk";
  391. linux,phandle = <0x34>;
  392. phandle = <0x34>;
  393. reg = <0x1c2010c 0x4>;
  394. };
  395.  
  396. clk@01c20118 {
  397. #clock-cells = <0x0>;
  398. #reset-cells = <0x1>;
  399. clock-output-names = "tcon-ch0-sclk";
  400. clocks = <0x9 0xa 0x15 0x16>;
  401. compatible = "allwinner,sun4i-a10-tcon-ch0-clk";
  402. linux,phandle = <0x4>;
  403. phandle = <0x4>;
  404. reg = <0x1c20118 0x4>;
  405. };
  406.  
  407. clk@01c2012c {
  408. #clock-cells = <0x0>;
  409. clock-output-names = "tcon-ch1-sclk";
  410. clocks = <0x9 0xa 0x15 0x16>;
  411. compatible = "allwinner,sun4i-a10-tcon-ch1-clk";
  412. linux,phandle = <0x32>;
  413. phandle = <0x32>;
  414. reg = <0x1c2012c 0x4>;
  415. };
  416.  
  417. clk@01c20140 {
  418. #clock-cells = <0x0>;
  419. clock-output-names = "codec";
  420. clocks = <0x12 0x0>;
  421. compatible = "allwinner,sun4i-a10-codec-clk";
  422. linux,phandle = <0x2c>;
  423. phandle = <0x2c>;
  424. reg = <0x1c20140 0x4>;
  425. };
  426.  
  427. clk@01c2015c {
  428. #clock-cells = <0x0>;
  429. clock-output-names = "mbus";
  430. clocks = <0x7 0xf 0x1 0x11 0x1>;
  431. compatible = "allwinner,sun5i-a13-mbus-clk";
  432. reg = <0x1c2015c 0x4>;
  433. };
  434.  
  435. cpu@01c20054 {
  436. #clock-cells = <0x0>;
  437. clock-output-names = "cpu";
  438. clocks = <0xb 0x7 0xc 0xd>;
  439. compatible = "allwinner,sun4i-a10-cpu-clk";
  440. linux,phandle = <0x6>;
  441. phandle = <0x6>;
  442. reg = <0x1c20054 0x4>;
  443. };
  444.  
  445. dummy {
  446. #clock-cells = <0x0>;
  447. clock-frequency = <0x0>;
  448. compatible = "fixed-clock";
  449. linux,phandle = <0xd>;
  450. phandle = <0xd>;
  451. };
  452.  
  453. osc3M_clk {
  454. #clock-cells = <0x0>;
  455. clock-div = <0x8>;
  456. clock-mult = <0x1>;
  457. clock-output-names = "osc3M";
  458. clocks = <0x7>;
  459. compatible = "fixed-factor-clock";
  460. linux,phandle = <0x8>;
  461. phandle = <0x8>;
  462. };
  463.  
  464. pll3x2_clk {
  465. #clock-cells = <0x0>;
  466. clock-div = <0x1>;
  467. clock-mult = <0x2>;
  468. clock-output-names = "pll3-2x";
  469. clocks = <0x9>;
  470. compatible = "allwinner,sun4i-a10-pll3-2x-clk", "fixed-factor-clock";
  471. linux,phandle = <0x15>;
  472. phandle = <0x15>;
  473. };
  474.  
  475. pll7x2_clk {
  476. #clock-cells = <0x0>;
  477. clock-div = <0x1>;
  478. clock-mult = <0x2>;
  479. clock-output-names = "pll7-2x";
  480. clocks = <0xa>;
  481. compatible = "fixed-factor-clock";
  482. linux,phandle = <0x16>;
  483. phandle = <0x16>;
  484. };
  485. };
  486.  
  487. cpus {
  488. #address-cells = <0x1>;
  489. #size-cells = <0x0>;
  490.  
  491. cpu@0 {
  492. #cooling-cells = <0x2>;
  493. clock-latency = <0x3b9b0>;
  494. clocks = <0x6>;
  495. compatible = "arm,cortex-a8";
  496. cooling-max-level = <0x5>;
  497. cooling-min-level = <0x0>;
  498. device_type = "cpu";
  499. linux,phandle = <0x3a>;
  500. operating-points = <0x10d880 0x155cc0 0xf6180 0x155cc0 0x8b2900 0x149970 0xd2f00 0x13d620 0x98580 0x124f80 0x8ca00 0x124f80 0x69780 0x124f80>;
  501. phandle = <0x3a>;
  502. reg = <0x0>;
  503. };
  504. };
  505.  
  506. display-engine {
  507. allwinner,pipelines = <&fe0>;
  508. compatible = "allwinner,sun5i-a13-display-engine";
  509. };
  510.  
  511. leds {
  512. compatible = "gpio-leds";
  513. pinctrl-0 = <0x40>;
  514. pinctrl-names = "default";
  515.  
  516. heartbeat {
  517. gpios = <0x1e 0x3 0xc 0x0>;
  518. linux,default-trigger = "heartbeat";
  519. };
  520.  
  521. storage {
  522. gpios = <0x1e 0x3 0xd 0x0>;
  523. linux,default-trigger = "mmc0";
  524. };
  525. };
  526.  
  527. memory {
  528. device_type = "memory";
  529. reg = <0x0 0x0>;
  530. };
  531.  
  532. soc@01c00000 {
  533. #address-cells = <0x1>;
  534. #size-cells = <0x1>;
  535. compatible = "simple-bus";
  536. ranges;
  537.  
  538. codec@01c22c00 {
  539. #sound-dai-cells = <0x0>;
  540. clock-names = "apb", "codec";
  541. clocks = <0x2b 0x0 0x2c>;
  542. compatible = "allwinner,sun4i-a10-codec";
  543. dma-names = "rx", "tx";
  544. dmas = <0x18 0x0 0x13 0x18 0x0 0x13>;
  545. interrupts = <0x1e>;
  546. reg = <0x1c22c00 0x40>;
  547. status = "okay";
  548. };
  549.  
  550. be0: display-backend@01e60000 {
  551. assigned-clock-rates = <0x11e1a300>;
  552. assigned-clocks = <0x3>;
  553. clock-names = "ahb", "mod", "ram";
  554. clocks = <0x2 0x2c 0x3 0x5 0x1a>;
  555. compatible = "allwinner,sun5i-a13-display-backend";
  556. reg = <0x1e60000 0x10000>;
  557. resets = <0x3>;
  558. status = "okay";
  559.  
  560. ports {
  561. #address-cells = <0x1>;
  562. #size-cells = <0x0>;
  563.  
  564. be0_in: port@0 {
  565. #address-cells = <0x1>;
  566. #size-cells = <0x0>;
  567. reg = <0x0>;
  568.  
  569. be0_in_fe0: endpoint@0 {
  570. linux,phandle = <0x35>;
  571. phandle = <0x35>;
  572. reg = <0x0>;
  573. remote-endpoint = <&fe0_out_be0>;
  574. };
  575. };
  576.  
  577. be0_out: port@1 {
  578. #address-cells = <0x1>;
  579. #size-cells = <0x0>;
  580. reg = <0x1>;
  581.  
  582. be0_out_tcon0: endpoint@0 {
  583. linux,phandle = <0x33>;
  584. phandle = <0x33>;
  585. reg = <0x0>;
  586. remote-endpoint = <&tcon0_in_be0>;
  587. };
  588. };
  589. };
  590. };
  591.  
  592. fe0: display-frontend@01e00000 {
  593. clock-names = "ahb", "mod", "ram";
  594. clocks = <0x2 0x2e 0x34 0x5 0x19>;
  595. compatible = "allwinner,sun5i-a13-display-frontend";
  596. interrupts = <0x2f>;
  597. linux,phandle = <0x3b>;
  598. phandle = <0x3b>;
  599. reg = <0x1e00000 0x20000>;
  600. resets = <0x34>;
  601.  
  602. ports {
  603. #address-cells = <0x1>;
  604. #size-cells = <0x0>;
  605.  
  606. fe0_out: port@1 {
  607. #address-cells = <0x1>;
  608. #size-cells = <0x0>;
  609. reg = <0x1>;
  610.  
  611. fe0_out_be0: endpoint@0 {
  612. linux,phandle = <0x36>;
  613. phandle = <0x36>;
  614. reg = <0x0>;
  615. remote-endpoint = <&be0_in_fe0>;
  616. };
  617. };
  618. };
  619. };
  620.  
  621. dma-controller@01c02000 {
  622. #dma-cells = <0x2>;
  623. clocks = <0x2 0x6>;
  624. compatible = "allwinner,sun4i-a10-dma";
  625. interrupts = <0x1b>;
  626. linux,phandle = <0x18>;
  627. phandle = <0x18>;
  628. reg = <0x1c02000 0x1000>;
  629. };
  630.  
  631. eeprom@01c23800 {
  632. compatible = "allwinner,sun4i-a10-sid";
  633. reg = <0x1c23800 0x10>;
  634. };
  635.  
  636. i2c@01c2ac00 {
  637. #address-cells = <0x1>;
  638. #size-cells = <0x0>;
  639. clocks = <0x2d 0x0>;
  640. compatible = "allwinner,sun4i-a10-i2c";
  641. interrupts = <0x7>;
  642. pinctrl-0 = <0x2f>;
  643. pinctrl-names = "default";
  644. reg = <0x1c2ac00 0x400>;
  645. status = "okay";
  646.  
  647. pmic@34 {
  648. #interrupt-cells = <0x1>;
  649. compatible = "x-powers,axp209";
  650. interrupt-controller;
  651. interrupts = <0x0>;
  652. reg = <0x34>;
  653. };
  654. };
  655.  
  656. i2c@01c2b000 {
  657. #address-cells = <0x1>;
  658. #size-cells = <0x0>;
  659. clocks = <0x2d 0x1>;
  660. compatible = "allwinner,sun4i-a10-i2c";
  661. interrupts = <0x8>;
  662. pinctrl-0 = <0x30>;
  663. pinctrl-names = "default";
  664. reg = <0x1c2b000 0x400>;
  665. status = "okay";
  666. };
  667.  
  668. i2c@01c2b400 {
  669. #address-cells = <0x1>;
  670. #size-cells = <0x0>;
  671. clocks = <0x2d 0x2>;
  672. compatible = "allwinner,sun4i-a10-i2c";
  673. interrupts = <0x9>;
  674. pinctrl-0 = <0x31>;
  675. pinctrl-names = "default";
  676. reg = <0x1c2b400 0x400>;
  677. status = "okay";
  678. };
  679.  
  680. interrupt-controller@01c20400 {
  681. #interrupt-cells = <0x1>;
  682. compatible = "allwinner,sun4i-a10-ic";
  683. interrupt-controller;
  684. linux,phandle = <0x1>;
  685. phandle = <0x1>;
  686. reg = <0x1c20400 0x400>;
  687. };
  688.  
  689. lcd-controller@01c0c000 {
  690. clock-names = "ahb", "tcon-ch0", "tcon-ch1";
  691. clock-output-names = "tcon-pixel-clock";
  692. clocks = <0x2 0x24 0x4 0x32>;
  693. compatible = "allwinner,sun5i-a13-tcon";
  694. interrupts = <0x2c>;
  695. reg = <0x1c0c000 0x1000>;
  696. reset-names = "lcd";
  697. resets = <0x4 0x1>;
  698.  
  699. ports {
  700. #address-cells = <0x1>;
  701. #size-cells = <0x0>;
  702.  
  703. tcon0_in: port@0 {
  704. #address-cells = <0x1>;
  705. #size-cells = <0x0>;
  706. reg = <0x0>;
  707.  
  708. tcon0_in_be0: endpoint@0 {
  709. linux,phandle = <0x37>;
  710. phandle = <0x37>;
  711. reg = <0x0>;
  712. remote-endpoint = <0x33>;
  713. };
  714. };
  715.  
  716. tcon0_out: port@1 {
  717. #address-cells = <0x1>;
  718. #size-cells = <0x0>;
  719. reg = <0x1>;
  720. tcon0_out_panel: endpoint@0 {
  721. reg = <0>;
  722. remote-endpoint = <&panel_input>;
  723. };
  724. };
  725. };
  726. };
  727.  
  728. lradc@01c22800 {
  729. compatible = "allwinner,sun4i-a10-lradc-keys";
  730. interrupts = <0x1f>;
  731. reg = <0x1c22800 0x100>;
  732. status = "disabled";
  733. };
  734.  
  735. mmc@01c0f000 {
  736. #address-cells = <0x1>;
  737. #size-cells = <0x0>;
  738. bus-width = <0x4>;
  739. cd-gpios = <0x1e 0x6 0x0 0x0>;
  740. cd-inverted;
  741. clock-names = "ahb", "mmc", "output", "sample";
  742. clocks = <0x2 0x8 0x1a 0x0 0x1a 0x1 0x1a 0x2>;
  743. compatible = "allwinner,sun5i-a13-mmc";
  744. interrupts = <0x20>;
  745. pinctrl-0 = <0x1b 0x1c>;
  746. pinctrl-names = "default";
  747. reg = <0x1c0f000 0x1000>;
  748. status = "okay";
  749. vmmc-supply = <0x1d>;
  750. };
  751.  
  752. mmc@01c10000 {
  753. #address-cells = <0x1>;
  754. #size-cells = <0x0>;
  755. clock-names = "ahb", "mmc", "output", "sample";
  756. clocks = <0x2 0x9 0x1f 0x0 0x1f 0x1 0x1f 0x2>;
  757. compatible = "allwinner,sun5i-a13-mmc";
  758. interrupts = <0x21>;
  759. reg = <0x1c10000 0x1000>;
  760. status = "disabled";
  761. };
  762.  
  763. mmc@01c11000 {
  764. #address-cells = <0x1>;
  765. #size-cells = <0x0>;
  766. bus-width = <0x4>;
  767. cd-gpios = <0x1e 0x2 0xc 0x0>;
  768. cd-inverted;
  769. clock-names = "ahb", "mmc", "output", "sample";
  770. clocks = <0x2 0xa 0x20 0x0 0x20 0x1 0x20 0x2>;
  771. compatible = "allwinner,sun5i-a13-mmc";
  772. interrupts = <0x22>;
  773. pinctrl-0 = <0x21 0x22>;
  774. pinctrl-names = "default";
  775. reg = <0x1c11000 0x1000>;
  776. status = "okay";
  777. vmmc-supply = <0x1d>;
  778.  
  779. mmccard@0 {
  780. broken-hpi;
  781. compatible = "mmc-card";
  782. reg = <0x0>;
  783. };
  784. };
  785.  
  786. phy@01c13400 {
  787. #phy-cells = <0x1>;
  788. clock-names = "usb_phy";
  789. clocks = <0x25 0x8>;
  790. compatible = "allwinner,sun5i-a13-usb-phy";
  791. linux,phandle = <0x23>;
  792. phandle = <0x23>;
  793. pinctrl-0 = <0x26 0x27>;
  794. pinctrl-names = "default";
  795. reg = <0x1c13400 0x10 0x1c14800 0x4>;
  796. reg-names = "phy_ctrl", "pmu1";
  797. reset-names = "usb0_reset", "usb1_reset";
  798. resets = <0x25 0x0 0x25 0x1>;
  799. status = "okay";
  800. usb0_id_det-gpio = <0x1e 0x6 0x2 0x0>;
  801. usb0_vbus-supply = <0x28>;
  802. usb0_vbus_det-gpio = <0x1e 0x6 0x1 0x0>;
  803. usb1_vbus-supply = <0x29>;
  804. };
  805.  
  806. pinctrl@01c20800 {
  807. #gpio-cells = <0x3>;
  808. #interrupt-cells = <0x3>;
  809. clock-names = "apb", "hosc", "losc";
  810. clocks = <0x2b 0x5 0x7 0xb>;
  811. compatible = "allwinner,sun5i-a13-pinctrl";
  812. gpio-controller;
  813. interrupt-controller;
  814. interrupts = <0x1c>;
  815. linux,phandle = <0x1e>;
  816. phandle = <0x1e>;
  817. reg = <0x1c20800 0x400>;
  818.  
  819. ahci_pwr_pin@0 {
  820. allwinner,drive = <0x0>;
  821. allwinner,function = "gpio_out";
  822. allwinner,pins = "PB8";
  823. allwinner,pull = <0x0>;
  824. linux,phandle = <0x3c>;
  825. phandle = <0x3c>;
  826. };
  827.  
  828. i2c0@0 {
  829. allwinner,drive = <0x0>;
  830. allwinner,function = "i2c0";
  831. allwinner,pins = "PB0", "PB1";
  832. allwinner,pull = <0x0>;
  833. linux,phandle = <0x2f>;
  834. phandle = <0x2f>;
  835. };
  836.  
  837. i2c1@0 {
  838. allwinner,drive = <0x0>;
  839. allwinner,function = "i2c1";
  840. allwinner,pins = "PB15", "PB16";
  841. allwinner,pull = <0x0>;
  842. linux,phandle = <0x30>;
  843. phandle = <0x30>;
  844. };
  845.  
  846. i2c2@0 {
  847. allwinner,drive = <0x0>;
  848. allwinner,function = "i2c2";
  849. allwinner,pins = "PB17", "PB18";
  850. allwinner,pull = <0x0>;
  851. linux,phandle = <0x31>;
  852. phandle = <0x31>;
  853. };
  854.  
  855. lcd_rgb565@0 {
  856. allwinner,drive = <0x0>;
  857. allwinner,function = "lcd0";
  858. allwinner,pins = "PD3", "PD4", "PD5", "PD6", "PD7", "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD19", "PD20", "PD21", "PD22", "PD23", "PD24", "PD25", "PD26", "PD27";
  859. allwinner,pull = <0x0>;
  860. };
  861.  
  862. lcd_rgb666@0 {
  863. allwinner,drive = <0x0>;
  864. allwinner,function = "lcd0";
  865. allwinner,pins = "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD18", "PD19", "PD20", "PD21", "PD22", "PD23", "PD24", "PD25", "PD26", "PD27";
  866. allwinner,pull = <0x0>;
  867. };
  868.  
  869. led_pins@0 {
  870. allwinner,drive = <0x1>;
  871. allwinner,function = "gpio_out";
  872. allwinner,pins = "PD4", "PD5", "PD6", "PD7", "PD10", "PD11", "PD12", "PD13", "PD14", "PD21", "PD22";
  873. allwinner,pull = <0x0>;
  874. linux,phandle = <0x40>;
  875. phandle = <0x40>;
  876. };
  877.  
  878. mmc0@0 {
  879. allwinner,drive = <0x2>;
  880. allwinner,function = "mmc0";
  881. allwinner,pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5";
  882. allwinner,pull = <0x0>;
  883. linux,phandle = <0x1b>;
  884. phandle = <0x1b>;
  885. };
  886.  
  887. mmc0_cd_pin@0 {
  888. allwinner,drive = <0x0>;
  889. allwinner,function = "gpio_in";
  890. allwinner,pins = "PG0";
  891. allwinner,pull = <0x1>;
  892. linux,phandle = <0x1c>;
  893. phandle = <0x1c>;
  894. };
  895.  
  896. mmc2@0 {
  897. allwinner,drive = <0x2>;
  898. allwinner,function = "mmc2";
  899. allwinner,pins = "PC6", "PC7", "PC8", "PC9", "PC10", "PC11";
  900. allwinner,pull = <0x0>;
  901. linux,phandle = <0x21>;
  902. phandle = <0x21>;
  903. };
  904.  
  905. mmc2_cd_pin@0 {
  906. allwinner,drive = <0x0>;
  907. allwinner,function = "gpio_in";
  908. allwinner,pins = "PC12";
  909. allwinner,pull = <0x1>;
  910. linux,phandle = <0x22>;
  911. phandle = <0x22>;
  912. };
  913.  
  914. backlight_pwm: pwm0 {
  915. allwinner,drive = <0x0>;
  916. allwinner,function = "pwm";
  917. allwinner,pins = "PB2";
  918. allwinner,pull = <0x0>;
  919. };
  920.  
  921. spi0-cs0@0 {
  922. allwinner,drive = <0x0>;
  923. allwinner,function = "spi0";
  924. allwinner,pins = "PC3";
  925. allwinner,pull = <0x0>;
  926. linux,phandle = <0x44>;
  927. phandle = <0x44>;
  928. };
  929.  
  930. spi0@0 {
  931. allwinner,drive = <0x0>;
  932. allwinner,function = "spi0";
  933. allwinner,pins = "PC2", "PC0", "PC1";
  934. allwinner,pull = <0x0>;
  935. linux,phandle = <0x43>;
  936. phandle = <0x43>;
  937. };
  938.  
  939. spi1-cs0@0 {
  940. allwinner,drive = <0x0>;
  941. allwinner,function = "spi1";
  942. allwinner,pins = "PG9";
  943. allwinner,pull = <0x0>;
  944. linux,phandle = <0x46>;
  945. phandle = <0x46>;
  946. };
  947.  
  948. spi1@0 {
  949. allwinner,drive = <0x0>;
  950. allwinner,function = "spi1";
  951. allwinner,pins = "PG10", "PG11", "PG12";
  952. allwinner,pull = <0x0>;
  953. linux,phandle = <0x45>;
  954. phandle = <0x45>;
  955. };
  956.  
  957. spi2-cs0@0 {
  958. allwinner,drive = <0x0>;
  959. allwinner,function = "spi2";
  960. allwinner,pins = "PE0";
  961. allwinner,pull = <0x0>;
  962. linux,phandle = <0x48>;
  963. phandle = <0x48>;
  964. };
  965.  
  966. spi2@0 {
  967. allwinner,drive = <0x0>;
  968. allwinner,function = "spi2";
  969. allwinner,pins = "PE1", "PE2", "PE3";
  970. allwinner,pull = <0x0>;
  971. linux,phandle = <0x47>;
  972. phandle = <0x47>;
  973. };
  974.  
  975. uart1@0 {
  976. allwinner,drive = <0x0>;
  977. allwinner,function = "uart1";
  978. allwinner,pins = "PE10", "PE11";
  979. allwinner,pull = <0x0>;
  980. };
  981.  
  982. uart1@1 {
  983. allwinner,drive = <0x0>;
  984. allwinner,function = "uart1";
  985. allwinner,pins = "PG3", "PG4";
  986. allwinner,pull = <0x0>;
  987. linux,phandle = <0x2e>;
  988. phandle = <0x2e>;
  989. };
  990.  
  991. usb0_id_detect_pin@0 {
  992. allwinner,drive = <0x0>;
  993. allwinner,function = "gpio_in";
  994. allwinner,pins = "PG2";
  995. allwinner,pull = <0x1>;
  996. linux,phandle = <0x26>;
  997. phandle = <0x26>;
  998. };
  999.  
  1000. usb0_vbus_detect_pin@0 {
  1001. allwinner,drive = <0x0>;
  1002. allwinner,function = "gpio_in";
  1003. allwinner,pins = "PG1";
  1004. allwinner,pull = <0x2>;
  1005. linux,phandle = <0x27>;
  1006. phandle = <0x27>;
  1007. };
  1008.  
  1009. usb0_vbus_pin@0 {
  1010. allwinner,drive = <0x0>;
  1011. allwinner,function = "gpio_out";
  1012. allwinner,pins = "PD15";
  1013. allwinner,pull = <0x0>;
  1014. linux,phandle = <0x3d>;
  1015. phandle = <0x3d>;
  1016. };
  1017.  
  1018. usb1_vbus_pin@0 {
  1019. allwinner,drive = <0x0>;
  1020. allwinner,function = "gpio_out";
  1021. allwinner,pins = "PD26";
  1022. allwinner,pull = <0x0>;
  1023. linux,phandle = <0x3e>;
  1024. phandle = <0x3e>;
  1025. };
  1026.  
  1027. usb2_vbus_pin@0 {
  1028. allwinner,drive = <0x0>;
  1029. allwinner,function = "gpio_out";
  1030. allwinner,pins = "PH3";
  1031. allwinner,pull = <0x0>;
  1032. linux,phandle = <0x3f>;
  1033. phandle = <0x3f>;
  1034. };
  1035. };
  1036.  
  1037. pwm: pwm@01c20e00 {
  1038. #pwm-cells = <0x3>;
  1039. clocks = <0x7>;
  1040. compatible = "allwinner,sun5i-a13-pwm";
  1041. reg = <0x1c20e00 0xc>;
  1042. status = "disabled";
  1043. };
  1044.  
  1045. rtp@01c25000 {
  1046. #thermal-sensor-cells = <0x0>;
  1047. compatible = "allwinner,sun5i-a13-ts";
  1048. interrupts = <0x1d>;
  1049. linux,phandle = <0x38>;
  1050. phandle = <0x38>;
  1051. reg = <0x1c25000 0x100>;
  1052. };
  1053.  
  1054. serial@01c28400 {
  1055. clocks = <0x2d 0x11>;
  1056. compatible = "snps,dw-apb-uart";
  1057. interrupts = <0x2>;
  1058. pinctrl-0 = <0x2e>;
  1059. pinctrl-names = "default";
  1060. reg = <0x1c28400 0x400>;
  1061. reg-io-width = <0x4>;
  1062. reg-shift = <0x2>;
  1063. status = "okay";
  1064. };
  1065.  
  1066. serial@01c28c00 {
  1067. clocks = <0x2d 0x13>;
  1068. compatible = "snps,dw-apb-uart";
  1069. interrupts = <0x4>;
  1070. reg = <0x1c28c00 0x400>;
  1071. reg-io-width = <0x4>;
  1072. reg-shift = <0x2>;
  1073. status = "disabled";
  1074. };
  1075.  
  1076. spi0: spi@01c05000 {
  1077. #address-cells = <0x1>;
  1078. #size-cells = <0x0>;
  1079. clock-names = "ahb", "mod";
  1080. clocks = <0x2 0x14 0x17>;
  1081. compatible = "allwinner,sun4i-a10-spi";
  1082. dma-names = "rx", "tx";
  1083. dmas = <0x18 0x1 0x1b 0x18 0x1 0x1a>;
  1084. interrupts = <0xa>;
  1085. pinctrl-0 = <0x43 0x44>;
  1086. pinctrl-names = "default";
  1087. reg = <0x1c05000 0x1000>;
  1088. status = "okay";
  1089.  
  1090. touchscreen@0 {
  1091. compatible = "ti,ads7846";
  1092. reg = <0>;
  1093.  
  1094. spi-max-frequency = <2000000>;
  1095. pendown-gpio = <0x1e 0x1 0xd 0x0>;
  1096. ti,x-plate-ohms = /bits/ 16 <100>;
  1097. ti,pressure-max = /bits/ 16 <255>;
  1098. };
  1099. };
  1100.  
  1101. spi1: spi@01c06000 {
  1102. #address-cells = <0x1>;
  1103. #size-cells = <0x0>;
  1104. clock-names = "ahb", "mod";
  1105. clocks = <0x2 0x15 0x19>;
  1106. compatible = "allwinner,sun4i-a10-spi";
  1107. dma-names = "rx", "tx";
  1108. dmas = <0x18 0x1 0x9 0x18 0x1 0x8>;
  1109. interrupts = <0xb>;
  1110. pinctrl-0 = <0x45 0x46>;
  1111. pinctrl-names = "default";
  1112. reg = <0x1c06000 0x1000>;
  1113. status = "okay";
  1114. /*
  1115. // tinydrm mode
  1116.  
  1117. mi0283qt@0{
  1118. compatible = "mi,mi0283qt";
  1119.  
  1120. reg = <0>;
  1121. spi-max-frequency = <32000000>;
  1122. rotation = <180>;
  1123. bgr;
  1124. buswidth = <8>;
  1125. reset-gpios = <0x1e 0x3 0x15 0x0>;
  1126. dc-gpios = <0x1e 0x3 0x7 0x0>;
  1127. backlight = <&backlight>;
  1128. debug = <3>;
  1129. };
  1130. */
  1131. // fbtft mode
  1132.  
  1133. ili9341@0{
  1134. compatible = "ilitek,ili9341";
  1135.  
  1136. reg = <0>;
  1137. spi-max-frequency = <32000000>;
  1138. rotate = <270>;
  1139. fps = <30>;
  1140. bgr;
  1141. buswidth = <8>;
  1142. backlight = <&backlight>;
  1143. // reset-gpios = <0x1e 0x1 0x2 0x0>; // testing because this driver returns gpio# on err
  1144. reset-gpios = <0x1e 0x3 0x15 0x1>;
  1145. dc-gpios = <0x1e 0x3 0x7 0x1>;
  1146. debug = <3>;
  1147. };
  1148.  
  1149. };
  1150.  
  1151. spi2: spi@01c17000 {
  1152. #address-cells = <0x1>;
  1153. #size-cells = <0x0>;
  1154. clock-names = "ahb", "mod";
  1155. clocks = <0x2 0x16 0x2a>;
  1156. compatible = "allwinner,sun4i-a10-spi";
  1157. dma-names = "rx", "tx";
  1158. dmas = <0x18 0x1 0x1d 0x18 0x1 0x1c>;
  1159. interrupts = <0xc>;
  1160. pinctrl-0 = <0x47 0x48>;
  1161. pinctrl-names = "default";
  1162. reg = <0x1c17000 0x1000>;
  1163. status = "okay";
  1164.  
  1165. spidev@0 {
  1166. compatible = "rohm,dh2228fv";
  1167. reg = <0x0>;
  1168. spi-max-frequency = <0x989680>;
  1169. };
  1170. };
  1171.  
  1172. sram-controller@01c00000 {
  1173. #address-cells = <0x1>;
  1174. #size-cells = <0x1>;
  1175. compatible = "allwinner,sun4i-a10-sram-controller";
  1176. ranges;
  1177. reg = <0x1c00000 0x30>;
  1178.  
  1179. sram@00000000 {
  1180. #address-cells = <0x1>;
  1181. #size-cells = <0x1>;
  1182. compatible = "mmio-sram";
  1183. ranges = <0x0 0x0 0xc000>;
  1184. reg = <0x0 0xc000>;
  1185. };
  1186.  
  1187. sram@00010000 {
  1188. #address-cells = <0x1>;
  1189. #size-cells = <0x1>;
  1190. compatible = "mmio-sram";
  1191. ranges = <0x0 0x10000 0x1000>;
  1192. reg = <0x10000 0x1000>;
  1193.  
  1194. sram-section@0000 {
  1195. compatible = "allwinner,sun4i-a10-sram-d";
  1196. linux,phandle = <0x24>;
  1197. phandle = <0x24>;
  1198. reg = <0x0 0x1000>;
  1199. status = "okay";
  1200. };
  1201. };
  1202. };
  1203.  
  1204. timer@01c20c00 {
  1205. clocks = <0x7>;
  1206. compatible = "allwinner,sun4i-a10-timer";
  1207. interrupts = <0x16>;
  1208. reg = <0x1c20c00 0x90>;
  1209. };
  1210.  
  1211. timer@01c60000 {
  1212. clocks = <0x2 0x1c>;
  1213. compatible = "allwinner,sun5i-a13-hstimer";
  1214. interrupts = <0x52 0x53>;
  1215. reg = <0x1c60000 0x1000>;
  1216. };
  1217.  
  1218. usb@01c13000 {
  1219. allwinner,sram = <0x24 0x1>;
  1220. clocks = <0x2 0x0>;
  1221. compatible = "allwinner,sun4i-a10-musb";
  1222. dr_mode = "otg";
  1223. extcon = <0x23 0x0>;
  1224. interrupt-names = "mc";
  1225. interrupts = <0x26>;
  1226. phy-names = "usb";
  1227. phys = <0x23 0x0>;
  1228. reg = <0x1c13000 0x400>;
  1229. status = "okay";
  1230. };
  1231.  
  1232. usb@01c14000 {
  1233. clocks = <0x2 0x1>;
  1234. compatible = "allwinner,sun5i-a13-ehci", "generic-ehci";
  1235. interrupts = <0x27>;
  1236. phy-names = "usb";
  1237. phys = <0x23 0x1>;
  1238. reg = <0x1c14000 0x100>;
  1239. status = "okay";
  1240. };
  1241.  
  1242. usb@01c14400 {
  1243. clocks = <0x25 0x6 0x2 0x2>;
  1244. compatible = "allwinner,sun5i-a13-ohci", "generic-ohci";
  1245. interrupts = <0x28>;
  1246. phy-names = "usb";
  1247. phys = <0x23 0x1>;
  1248. reg = <0x1c14400 0x100>;
  1249. status = "okay";
  1250. };
  1251.  
  1252. watchdog@01c20c90 {
  1253. compatible = "allwinner,sun4i-a10-wdt";
  1254. reg = <0x1c20c90 0x10>;
  1255. };
  1256. };
  1257.  
  1258. thermal-zones {
  1259.  
  1260. cpu_thermal {
  1261. polling-delay = <0x3e8>;
  1262. polling-delay-passive = <0xfa>;
  1263. thermal-sensors = <0x38>;
  1264.  
  1265. cooling-maps {
  1266.  
  1267. map0 {
  1268. cooling-device = <0x3a 0xffffffff 0xffffffff>;
  1269. trip = <0x39>;
  1270. };
  1271. };
  1272.  
  1273. trips {
  1274.  
  1275. cpu_alert0 {
  1276. hysteresis = <0x7d0>;
  1277. linux,phandle = <0x39>;
  1278. phandle = <0x39>;
  1279. temperature = <0x14c08>;
  1280. type = "passive";
  1281. };
  1282.  
  1283. cpu_crit {
  1284. hysteresis = <0x7d0>;
  1285. temperature = <0x186a0>;
  1286. type = "critical";
  1287. };
  1288. };
  1289. };
  1290. };
  1291.  
  1292. usb0-vbus {
  1293. compatible = "regulator-fixed";
  1294. enable-active-high;
  1295. gpio = <0x1e 0x3 0xf 0x0>;
  1296. linux,phandle = <0x28>;
  1297. phandle = <0x28>;
  1298. pinctrl-0 = <0x3d>;
  1299. pinctrl-names = "default";
  1300. regulator-max-microvolt = <0x4c4b40>;
  1301. regulator-min-microvolt = <0x4c4b40>;
  1302. regulator-name = "usb0-vbus";
  1303. status = "okay";
  1304. };
  1305.  
  1306. usb1-vbus {
  1307. compatible = "regulator-fixed";
  1308. enable-active-high;
  1309. gpio = <0x1e 0x3 0x1a 0x0>;
  1310. linux,phandle = <0x29>;
  1311. phandle = <0x29>;
  1312. pinctrl-0 = <0x3e>;
  1313. pinctrl-names = "default";
  1314. regulator-boot-on;
  1315. regulator-max-microvolt = <0x4c4b40>;
  1316. regulator-min-microvolt = <0x4c4b40>;
  1317. regulator-name = "usb1-vbus";
  1318. status = "okay";
  1319. };
  1320.  
  1321. usb2-vbus {
  1322. compatible = "regulator-fixed";
  1323. enable-active-high;
  1324. gpio = <0x1e 0x7 0x3 0x0>;
  1325. pinctrl-0 = <0x3f>;
  1326. pinctrl-names = "default";
  1327. regulator-boot-on;
  1328. regulator-max-microvolt = <0x4c4b40>;
  1329. regulator-min-microvolt = <0x4c4b40>;
  1330. regulator-name = "usb2-vbus";
  1331. status = "disabled";
  1332. };
  1333.  
  1334. vcc3v0 {
  1335. compatible = "regulator-fixed";
  1336. regulator-max-microvolt = <0x2dc6c0>;
  1337. regulator-min-microvolt = <0x2dc6c0>;
  1338. regulator-name = "vcc3v0";
  1339. };
  1340.  
  1341. vcc3v3 {
  1342. compatible = "regulator-fixed";
  1343. linux,phandle = <0x1d>;
  1344. phandle = <0x1d>;
  1345. regulator-max-microvolt = <0x325aa0>;
  1346. regulator-min-microvolt = <0x325aa0>;
  1347. regulator-name = "vcc3v3";
  1348. };
  1349.  
  1350. vcc5v0 {
  1351. compatible = "regulator-fixed";
  1352. regulator-max-microvolt = <0x4c4b40>;
  1353. regulator-min-microvolt = <0x4c4b40>;
  1354. regulator-name = "vcc5v0";
  1355. };
  1356.  
  1357. panel: panel {
  1358. compatible = "mi,mi0283qt";
  1359.  
  1360. port {
  1361. panel_input: endpoint {
  1362. linux,phandle = <0x41>;
  1363. phandle = <0x41>;
  1364. remote-endpoint = <&tcon0_out_panel>;
  1365. };
  1366. };
  1367. };
  1368. };
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