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  1. [piotro@builder-armv8 rockchip]$ cat rk3568-rock-3a.dts
  2. // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  3.  
  4. /dts-v1/;
  5. #include <dt-bindings/gpio/gpio.h>
  6. #include <dt-bindings/leds/common.h>
  7. #include <dt-bindings/pinctrl/rockchip.h>
  8. #include <dt-bindings/soc/rockchip,vop2.h>
  9. #include "rk3568.dtsi"
  10.  
  11. / {
  12. model = "Radxa ROCK3 Model A";
  13. compatible = "radxa,rock3a", "rockchip,rk3568";
  14.  
  15. aliases {
  16. ethernet0 = &gmac1;
  17. mmc0 = &sdmmc0;
  18. mmc1 = &sdhci;
  19. };
  20.  
  21. chosen: chosen {
  22. stdout-path = "serial2:1500000n8";
  23. };
  24.  
  25. hdmi-con {
  26. compatible = "hdmi-connector";
  27. type = "a";
  28.  
  29. port {
  30. hdmi_con_in: endpoint {
  31. remote-endpoint = <&hdmi_out_con>;
  32. };
  33. };
  34. };
  35.  
  36. leds {
  37. compatible = "gpio-leds";
  38.  
  39. led_user: led-0 {
  40. gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
  41. function = LED_FUNCTION_HEARTBEAT;
  42. color = <LED_COLOR_ID_BLUE>;
  43. linux,default-trigger = "heartbeat";
  44. pinctrl-names = "default";
  45. pinctrl-0 = <&led_user_en>;
  46. };
  47. };
  48.  
  49. rk809-sound {
  50. compatible = "simple-audio-card";
  51. simple-audio-card,format = "i2s";
  52. simple-audio-card,name = "Analog RK809";
  53. simple-audio-card,mclk-fs = <256>;
  54.  
  55. simple-audio-card,cpu {
  56. sound-dai = <&i2s1_8ch>;
  57. };
  58. simple-audio-card,codec {
  59. sound-dai = <&rk809>;
  60. };
  61. };
  62.  
  63. vcc12v_dcin: vcc12v-dcin {
  64. compatible = "regulator-fixed";
  65. regulator-name = "vcc12v_dcin";
  66. regulator-always-on;
  67. regulator-boot-on;
  68. };
  69.  
  70. vcc3v3_sys: vcc3v3-sys {
  71. compatible = "regulator-fixed";
  72. regulator-name = "vcc3v3_sys";
  73. regulator-always-on;
  74. regulator-boot-on;
  75. regulator-min-microvolt = <3300000>;
  76. regulator-max-microvolt = <3300000>;
  77. vin-supply = <&vcc12v_dcin>;
  78. };
  79.  
  80. vcc5v0_sys: vcc5v0-sys {
  81. compatible = "regulator-fixed";
  82. regulator-name = "vcc5v0_sys";
  83. regulator-always-on;
  84. regulator-boot-on;
  85. regulator-min-microvolt = <5000000>;
  86. regulator-max-microvolt = <5000000>;
  87. vin-supply = <&vcc12v_dcin>;
  88. };
  89.  
  90. vcc5v0_usb: vcc5v0-usb {
  91. compatible = "regulator-fixed";
  92. regulator-name = "vcc5v0_usb";
  93. regulator-always-on;
  94. regulator-boot-on;
  95. regulator-min-microvolt = <5000000>;
  96. regulator-max-microvolt = <5000000>;
  97. vin-supply = <&vcc12v_dcin>;
  98. };
  99.  
  100. vcc5v0_usb_host: vcc5v0-usb-host {
  101. compatible = "regulator-fixed";
  102. enable-active-high;
  103. gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
  104. pinctrl-names = "default";
  105. pinctrl-0 = <&vcc5v0_usb_host_en>;
  106. regulator-name = "vcc5v0_usb_host";
  107. regulator-min-microvolt = <5000000>;
  108. regulator-max-microvolt = <5000000>;
  109. vin-supply = <&vcc5v0_usb>;
  110. };
  111.  
  112. vcc5v0_usb_otg: vcc5v0-otg-regulator {
  113. compatible = "regulator-fixed";
  114. enable-active-high;
  115. gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
  116. pinctrl-names = "default";
  117. pinctrl-0 = <&vcc5v0_otg_en>;
  118. regulator-name = "vcc5v0_otg";
  119. regulator-always-on;
  120. regulator-boot-on;
  121. };
  122.  
  123. vcc5v0_usb_usbhub: vcc5v0-usbhub-regulator {
  124. compatible = "regulator-fixed";
  125. enable-active-high;
  126. gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>;
  127. pinctrl-names = "default";
  128. pinctrl-0 = <&vcc5v0_hub_en>;
  129. regulator-name = "vcc5v0_hub";
  130. regulator-always-on;
  131. };
  132.  
  133. pcie30_avdd0v9: pcie30-avdd0v9 {
  134. compatible = "regulator-fixed";
  135. regulator-name = "pcie30_avdd0v9";
  136. regulator-always-on;
  137. regulator-boot-on;
  138. regulator-min-microvolt = <900000>;
  139. regulator-max-microvolt = <900000>;
  140. vin-supply = <&vcc3v3_sys>;
  141. };
  142.  
  143. pcie30_avdd1v8: pcie30-avdd1v8 {
  144. compatible = "regulator-fixed";
  145. regulator-name = "pcie30_avdd1v8";
  146. regulator-always-on;
  147. regulator-boot-on;
  148. regulator-min-microvolt = <1800000>;
  149. regulator-max-microvolt = <1800000>;
  150. vin-supply = <&vcc3v3_sys>;
  151. };
  152.  
  153. pcie30_3v3: gpio-regulator {
  154. compatible = "regulator-gpio";
  155. regulator-name = "pcie30_3v3";
  156. regulator-min-microvolt = <100000>;
  157. regulator-max-microvolt = <3300000>;
  158. gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
  159. gpios-states = <0x1>;
  160. states = <100000 0x0
  161. 3300000 0x1>;
  162. };
  163.  
  164. vcc3v3_bu: vcc3v3-bu {
  165. compatible = "regulator-fixed";
  166. regulator-name = "vcc3v3_bu";
  167. regulator-always-on;
  168. regulator-boot-on;
  169. regulator-min-microvolt = <3300000>;
  170. regulator-max-microvolt = <3300000>;
  171. vin-supply = <&vcc5v0_sys>;
  172. };
  173. };
  174.  
  175. &cpu0 {
  176. cpu-supply = <&vdd_cpu>;
  177. };
  178.  
  179. &cpu1 {
  180. cpu-supply = <&vdd_cpu>;
  181. };
  182.  
  183. &cpu2 {
  184. cpu-supply = <&vdd_cpu>;
  185. };
  186.  
  187. &cpu3 {
  188. cpu-supply = <&vdd_cpu>;
  189. };
  190.  
  191. &gmac1 {
  192. phy-mode = "rgmii";
  193. clock_in_out = "output";
  194.  
  195. snps,reset-gpio = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>;
  196. snps,reset-active-low;
  197. /* Reset time is 20ms, 100ms for rtl8211f */
  198. snps,reset-delays-us = <0 20000 100000>;
  199.  
  200. assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
  201. assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>;
  202. assigned-clock-rates = <0>, <125000000>;
  203.  
  204. pinctrl-names = "default";
  205. pinctrl-0 = <&gmac1m1_miim
  206. &gmac1m1_tx_bus2
  207. &gmac1m1_rx_bus2
  208. &gmac1m1_rgmii_clk
  209. &gmac1m1_rgmii_bus>;
  210.  
  211. tx_delay = <0x42>;
  212. rx_delay = <0x28>;
  213.  
  214. phy-handle = <&rgmii_phy1>;
  215. status = "okay";
  216. };
  217.  
  218. &mdio1 {
  219. rgmii_phy1: phy@0 {
  220. compatible = "ethernet-phy-ieee802.3-c22";
  221. reg = <0x0>;
  222. };
  223. };
  224.  
  225. &gpu {
  226. mali-supply = <&vdd_gpu>;
  227. status = "okay";
  228. };
  229.  
  230. &hdmi {
  231. assigned-clocks = <&cru CLK_HDMI_CEC>;
  232. assigned-clock-rates = <32768>;
  233. avdd-0v9-supply = <&vdda0v9_image>;
  234. avdd-1v8-supply = <&vcca1v8_image>;
  235. pinctrl-0 = <&hdmitx_scl &hdmitx_sda &hdmitxm1_cec>;
  236. status = "okay";
  237. };
  238.  
  239. &hdmi_in {
  240. hdmi_in_vp0: endpoint {
  241. remote-endpoint = <&vp0_out_hdmi>;
  242. };
  243. };
  244.  
  245. &hdmi_out {
  246. hdmi_out_con: endpoint {
  247. remote-endpoint = <&hdmi_con_in>;
  248. };
  249. };
  250.  
  251. &i2s0_8ch {
  252. status = "okay";
  253. };
  254.  
  255. &hdmi_sound {
  256. status = "okay";
  257. };
  258.  
  259. &i2c0 {
  260. status = "okay";
  261.  
  262. vdd_cpu: regulator@1c {
  263. compatible = "tcs,tcs4525";
  264. reg = <0x1c>;
  265. fcs,suspend-voltage-selector = <1>;
  266. regulator-name = "vdd_cpu";
  267. regulator-always-on;
  268. regulator-boot-on;
  269. regulator-min-microvolt = <800000>;
  270. regulator-max-microvolt = <1150000>;
  271. regulator-ramp-delay = <2300>;
  272. vin-supply = <&vcc5v0_sys>;
  273.  
  274. regulator-state-mem {
  275. regulator-off-in-suspend;
  276. };
  277. };
  278.  
  279. rk809: pmic@20 {
  280. compatible = "rockchip,rk809";
  281. reg = <0x20>;
  282. interrupt-parent = <&gpio0>;
  283. interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
  284. assigned-clocks = <&cru I2S1_MCLKOUT_TX>;
  285. assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>;
  286. #clock-cells = <1>;
  287. clock-names = "mclk";
  288. clocks = <&cru I2S1_MCLKOUT_TX>;
  289. pinctrl-names = "default";
  290. pinctrl-0 = <&pmic_int>, <&i2s1m0_mclk>;
  291. rockchip,system-power-controller;
  292. #sound-dai-cells = <0>;
  293. vcc1-supply = <&vcc3v3_sys>;
  294. vcc2-supply = <&vcc3v3_sys>;
  295. vcc3-supply = <&vcc3v3_sys>;
  296. vcc4-supply = <&vcc3v3_sys>;
  297. vcc5-supply = <&vcc3v3_sys>;
  298. vcc6-supply = <&vcc3v3_sys>;
  299. vcc7-supply = <&vcc3v3_sys>;
  300. vcc8-supply = <&vcc3v3_sys>;
  301. vcc9-supply = <&vcc3v3_sys>;
  302. wakeup-source;
  303.  
  304. regulators {
  305. vdd_logic: DCDC_REG1 {
  306. regulator-name = "vdd_logic";
  307. regulator-always-on;
  308. regulator-boot-on;
  309. regulator-init-microvolt = <900000>;
  310. regulator-initial-mode = <0x2>;
  311. regulator-min-microvolt = <500000>;
  312. regulator-max-microvolt = <1350000>;
  313. regulator-ramp-delay = <6001>;
  314.  
  315. regulator-state-mem {
  316. regulator-off-in-suspend;
  317. };
  318. };
  319.  
  320. vdd_gpu: DCDC_REG2 {
  321. regulator-name = "vdd_gpu";
  322. regulator-always-on;
  323. regulator-init-microvolt = <900000>;
  324. regulator-initial-mode = <0x2>;
  325. regulator-min-microvolt = <500000>;
  326. regulator-max-microvolt = <1350000>;
  327. regulator-ramp-delay = <6001>;
  328.  
  329. regulator-state-mem {
  330. regulator-off-in-suspend;
  331. };
  332. };
  333.  
  334. vcc_ddr: DCDC_REG3 {
  335. regulator-name = "vcc_ddr";
  336. regulator-always-on;
  337. regulator-boot-on;
  338. regulator-initial-mode = <0x2>;
  339.  
  340. regulator-state-mem {
  341. regulator-on-in-suspend;
  342. };
  343. };
  344.  
  345. vdd_npu: DCDC_REG4 {
  346. regulator-name = "vdd_npu";
  347. regulator-init-microvolt = <900000>;
  348. regulator-initial-mode = <0x2>;
  349. regulator-min-microvolt = <500000>;
  350. regulator-max-microvolt = <1350000>;
  351. regulator-ramp-delay = <6001>;
  352.  
  353. regulator-state-mem {
  354. regulator-off-in-suspend;
  355. };
  356. };
  357.  
  358. vcc_1v8: DCDC_REG5 {
  359. regulator-name = "vcc_1v8";
  360. regulator-always-on;
  361. regulator-boot-on;
  362. regulator-min-microvolt = <1800000>;
  363. regulator-max-microvolt = <1800000>;
  364.  
  365. regulator-state-mem {
  366. regulator-off-in-suspend;
  367. };
  368. };
  369.  
  370. vdda0v9_image: LDO_REG1 {
  371. regulator-name = "vdda0v9_image";
  372. regulator-min-microvolt = <900000>;
  373. regulator-max-microvolt = <900000>;
  374.  
  375. regulator-state-mem {
  376. regulator-off-in-suspend;
  377. };
  378. };
  379.  
  380. vdda_0v9: LDO_REG2 {
  381. regulator-name = "vdda_0v9";
  382. regulator-always-on;
  383. regulator-boot-on;
  384. regulator-min-microvolt = <900000>;
  385. regulator-max-microvolt = <900000>;
  386.  
  387. regulator-state-mem {
  388. regulator-off-in-suspend;
  389. };
  390. };
  391.  
  392. vdda0v9_pmu: LDO_REG3 {
  393. regulator-name = "vdda0v9_pmu";
  394. regulator-always-on;
  395. regulator-boot-on;
  396. regulator-min-microvolt = <900000>;
  397. regulator-max-microvolt = <900000>;
  398.  
  399. regulator-state-mem {
  400. regulator-on-in-suspend;
  401. regulator-suspend-microvolt = <900000>;
  402. };
  403. };
  404.  
  405. vccio_acodec: LDO_REG4 {
  406. regulator-name = "vccio_acodec";
  407. regulator-always-on;
  408. regulator-min-microvolt = <3300000>;
  409. regulator-max-microvolt = <3300000>;
  410.  
  411. regulator-state-mem {
  412. regulator-off-in-suspend;
  413. };
  414. };
  415.  
  416. vccio_sd: LDO_REG5 {
  417. regulator-name = "vccio_sd";
  418. regulator-min-microvolt = <1800000>;
  419. regulator-max-microvolt = <3300000>;
  420.  
  421. regulator-state-mem {
  422. regulator-off-in-suspend;
  423. };
  424. };
  425.  
  426. vcc3v3_pmu: LDO_REG6 {
  427. regulator-name = "vcc3v3_pmu";
  428. regulator-always-on;
  429. regulator-boot-on;
  430. regulator-min-microvolt = <3300000>;
  431. regulator-max-microvolt = <3300000>;
  432.  
  433. regulator-state-mem {
  434. regulator-on-in-suspend;
  435. regulator-suspend-microvolt = <3300000>;
  436. };
  437. };
  438.  
  439. vcca_1v8: LDO_REG7 {
  440. regulator-name = "vcca_1v8";
  441. regulator-always-on;
  442. regulator-boot-on;
  443. regulator-min-microvolt = <1800000>;
  444. regulator-max-microvolt = <1800000>;
  445.  
  446. regulator-state-mem {
  447. regulator-off-in-suspend;
  448. };
  449. };
  450.  
  451. vcca1v8_pmu: LDO_REG8 {
  452. regulator-name = "vcca1v8_pmu";
  453. regulator-always-on;
  454. regulator-boot-on;
  455. regulator-min-microvolt = <1800000>;
  456. regulator-max-microvolt = <1800000>;
  457.  
  458. regulator-state-mem {
  459. regulator-on-in-suspend;
  460. regulator-suspend-microvolt = <1800000>;
  461. };
  462. };
  463.  
  464. vcca1v8_image: LDO_REG9 {
  465. regulator-name = "vcca1v8_image";
  466. regulator-min-microvolt = <1800000>;
  467. regulator-max-microvolt = <1800000>;
  468.  
  469. regulator-state-mem {
  470. regulator-off-in-suspend;
  471. };
  472. };
  473.  
  474. vcc_3v3: SWITCH_REG1 {
  475. regulator-name = "vcc_3v3";
  476. regulator-always-on;
  477. regulator-boot-on;
  478.  
  479. regulator-state-mem {
  480. regulator-off-in-suspend;
  481. };
  482. };
  483.  
  484. vcc3v3_sd: SWITCH_REG2 {
  485. regulator-name = "vcc3v3_sd";
  486.  
  487. regulator-state-mem {
  488. regulator-off-in-suspend;
  489. };
  490. };
  491. };
  492.  
  493. codec {
  494. mic-in-differential;
  495. };
  496. };
  497. };
  498.  
  499. &pmu {
  500. compatible = "rockchip,rk3568-pmu", "syscon", "simple-mfd";
  501. reg = <0x0 0xfdd90000 0x0 0x1000>;
  502.  
  503. power: power-controller {
  504. compatible = "rockchip,rk3568-power-controller";
  505. #power-domain-cells = <1>;
  506. #address-cells = <1>;
  507. #size-cells = <0>;
  508.  
  509. /* These power domains are grouped by VD_GPU */
  510. power-domain@RK3568_PD_GPU {
  511. reg = <RK3568_PD_GPU>;
  512. clocks = <&cru ACLK_GPU_PRE>,
  513. <&cru PCLK_GPU_PRE>;
  514. pm_qos = <&qos_gpu>;
  515. #power-domain-cells = <0>;
  516. };
  517.  
  518. /* These power domains are grouped by VD_LOGIC */
  519. power-domain@RK3568_PD_VI {
  520. reg = <RK3568_PD_VI>;
  521. clocks = <&cru HCLK_VI>,
  522. <&cru PCLK_VI>;
  523. pm_qos = <&qos_isp>,
  524. <&qos_vicap0>,
  525. <&qos_vicap1>;
  526. #power-domain-cells = <0>;
  527. };
  528.  
  529. power-domain@RK3568_PD_VO {
  530. reg = <RK3568_PD_VO>;
  531. clocks = <&cru HCLK_VO>,
  532. <&cru PCLK_VO>,
  533. <&cru ACLK_VOP_PRE>,
  534. <&rk809 1>;
  535. pm_qos = <&qos_hdcp>,
  536. <&qos_vop_m0>,
  537. <&qos_vop_m1>;
  538. #power-domain-cells = <0>;
  539. };
  540.  
  541. power-domain@RK3568_PD_RGA {
  542. reg = <RK3568_PD_RGA>;
  543. clocks = <&cru HCLK_RGA_PRE>,
  544. <&cru PCLK_RGA_PRE>;
  545. pm_qos = <&qos_ebc>,
  546. <&qos_iep>,
  547. <&qos_jpeg_dec>,
  548. <&qos_jpeg_enc>,
  549. <&qos_rga_rd>,
  550. <&qos_rga_wr>;
  551. #power-domain-cells = <0>;
  552. };
  553.  
  554. power-domain@RK3568_PD_VPU {
  555. reg = <RK3568_PD_VPU>;
  556. clocks = <&cru HCLK_VPU_PRE>;
  557. pm_qos = <&qos_vpu>;
  558. #power-domain-cells = <0>;
  559. };
  560.  
  561. power-domain@RK3568_PD_RKVDEC {
  562. clocks = <&cru HCLK_RKVDEC_PRE>;
  563. reg = <RK3568_PD_RKVDEC>;
  564. pm_qos = <&qos_rkvdec>;
  565. #power-domain-cells = <0>;
  566. };
  567.  
  568. power-domain@RK3568_PD_RKVENC {
  569. reg = <RK3568_PD_RKVENC>;
  570. clocks = <&cru HCLK_RKVENC_PRE>;
  571. pm_qos = <&qos_rkvenc_rd_m0>,
  572. <&qos_rkvenc_rd_m1>,
  573. <&qos_rkvenc_wr_m0>;
  574. #power-domain-cells = <0>;
  575. };
  576. };
  577. };
  578.  
  579. &i2s1_8ch {
  580. pinctrl-names = "default";
  581. pinctrl-0 = <&i2s1m0_sclktx
  582. &i2s1m0_lrcktx
  583. &i2s1m0_sdi0
  584. &i2s1m0_sdo0>;
  585. rockchip,trcm-sync-tx-only;
  586. status = "okay";
  587. };
  588.  
  589. &pinctrl {
  590. ethernet {
  591. eth_phy_rst: eth_phy_rst {
  592. rockchip,pins = <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
  593. };
  594. };
  595.  
  596. leds {
  597. led_user_en: led_user_en {
  598. rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
  599. };
  600. };
  601.  
  602. pmic {
  603. pmic_int: pmic_int {
  604. rockchip,pins =
  605. <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
  606. };
  607. };
  608.  
  609. usb {
  610. vcc5v0_usb_host_en: vcc5v0_usb_host_en {
  611. rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
  612. };
  613.  
  614. vcc5v0_otg_en: vcc5v0-otg-en {
  615. rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
  616. };
  617.  
  618. vcc5v0_hub_en: vcc5v0-hub-en {
  619. rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
  620. };
  621. };
  622. };
  623.  
  624. &pmu_io_domains {
  625. pmuio1-supply = <&vcc3v3_pmu>;
  626. pmuio2-supply = <&vcc3v3_pmu>;
  627. vccio1-supply = <&vccio_acodec>;
  628. vccio2-supply = <&vcc_1v8>;
  629. vccio3-supply = <&vccio_sd>;
  630. vccio4-supply = <&vcc_1v8>;
  631. vccio5-supply = <&vcc_3v3>;
  632. vccio6-supply = <&vcc_1v8>;
  633. vccio7-supply = <&vcc_3v3>;
  634. status = "okay";
  635. };
  636.  
  637. &saradc {
  638. vref-supply = <&vcca_1v8>;
  639. status = "okay";
  640. };
  641.  
  642. &sdhci {
  643. bus-width = <8>;
  644. max-frequency = <200000000>;
  645. non-removable;
  646. pinctrl-names = "default";
  647. pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>;
  648. vmmc-supply = <&vcc_3v3>;
  649. vqmmc-supply = <&vcc_1v8>;
  650. status = "okay";
  651. };
  652.  
  653. &sdmmc0 {
  654. bus-width = <4>;
  655. cap-sd-highspeed;
  656. cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
  657. disable-wp;
  658. pinctrl-names = "default";
  659. pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
  660. sd-uhs-sdr104;
  661. vmmc-supply = <&vcc3v3_sd>;
  662. vqmmc-supply = <&vccio_sd>;
  663. status = "okay";
  664. };
  665.  
  666. &tsadc {
  667. rockchip,hw-tshut-mode = <1>;
  668. rockchip,hw-tshut-polarity = <0>;
  669. status = "okay";
  670. };
  671.  
  672. &uart2 {
  673. status = "okay";
  674. };
  675.  
  676. &usb_host0_ehci {
  677. status = "okay";
  678. };
  679.  
  680. &vop {
  681. assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
  682. assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
  683. status = "okay";
  684. };
  685.  
  686. &vop_mmu {
  687. status = "okay";
  688. };
  689.  
  690. &vp0 {
  691. vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
  692. reg = <ROCKCHIP_VOP2_EP_HDMI0>;
  693. remote-endpoint = <&hdmi_in_vp0>;
  694. };
  695. };
  696.  
  697. &vpu {
  698. status = "okay";
  699. };
  700.  
  701. &vdpu_mmu {
  702. status = "okay";
  703. };
  704.  
  705. &usb_host0_ehci {
  706. status = "okay";
  707. };
  708.  
  709. &usb_host0_ohci {
  710. status = "okay";
  711. };
  712.  
  713. &usb2phy0 {
  714. status = "okay";
  715. };
  716.  
  717. &usb2phy0_host {
  718. phy-supply = <&vcc5v0_usb_host>;
  719. status = "okay";
  720. };
  721.  
  722. &usb_host1_ehci {
  723. status = "okay";
  724. };
  725.  
  726. &usb_host1_ohci {
  727. status = "okay";
  728. };
  729.  
  730. &usb2phy1 {
  731. status = "okay";
  732. };
  733.  
  734. &usb2phy1_host {
  735. phy-supply = <&vcc5v0_usb_host>;
  736. status = "okay";
  737. };
  738.  
  739. &usb2phy1_otg {
  740. phy-supply = <&vcc5v0_usb_host>;
  741. status = "okay";
  742. };
  743.  
  744. &usbdrd30 {
  745. status = "okay";
  746. };
  747.  
  748. &usbhost30 {
  749. status = "okay";
  750. };
  751.  
  752. &combphy1 {
  753. status = "okay";
  754. };
  755.  
  756. &combphy2 {
  757. status = "okay";
  758. };
  759.  
  760. &sata1 {
  761. status = "disabled";
  762. };
  763.  
  764. &sata2 {
  765. status = "disabled";
  766. };
  767.  
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