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- [ TEST STARTED ]
- ->Start time: Fri Mar 9 14:39:34 2018
- ->Device: LimeSDR Mini, media=USB 3, module=FT601, serial=1D393786C41058, index=0
- Serial Number: 1D393786C41058
- [ Clock Network Test ]
- ->REF clock test
- Test results: 42747; 55944; 3605 - PASSED
- ->VCTCXO test
- Results : 6711028 (min); 6711192 (max) - PASSED
- ->Clock Network Test PASSED
- [ FPGA EEPROM Test ]
- ->Read EEPROM
- data: 18 01 22 18 01 22 3
- ->FPGA EEPROM Test PASSED
- [ LMS7002M Test ]
- ->Perform Registers Test
- ->External Reset line test
- Reg 0x20: Write value 0xFFFD, Read value 0xFFFD
- Reg 0x20: value after reset 0x0FFFF
- ->LMS7002M Test PASSED
- [ RF Loopback Test ]
- ->Configure LMS
- ->Run Tests (TX_2 -> LNA_W):
- ->On board loopback test:
- Test 1:(SXR=1000.0MHz, SXT=1005.0MHz, TXPAD=8): Result:(-16.7 dBFS, 5.00 MHz) - PASSED
- ->Configure LMS
- ->Run Tests (TX_1 -> LNA_H):
- ->On board loopback test:
- Test 1:(SXR=2100.0MHz, SXT=2105.0MHz, TXPAD=8): Result:(-17.7 dBFS, 5.00 MHz) - PASSED
- ->RF Loopback Test PASSED
- => Board tests PASSED <=
- Elapsed time: 4.43 seconds
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