PWRBTN#

Power Button. An input used by the power management
logic to monitor external system events, most typically a
system on/off button or switch.---
The signal has an internal pull-up of 100 KΩ, a Schmitt-
trigger input buffer and programmable debounce protec-
tion (F1BAR1+I/O Offset 07h[0]) of at least 16 ms.

ACPI is non-functional and all ACPI outputs are unde-
fined when the power-up sequence does not include
using the power button. SUSP# is an internal signal gen-
erated from the ACPI block. Without an ACPI reset,
SUSP# can be permanently asserted. If the USE_SUSP
bit in CCR2 of GX1 module is enabled (Index C2h[7] = 1),
the CPU will stop.

If ACPI functionality is desired, or the situation described
above avoided, the power button must be toggled. This
can be done externally or internally. GPIO63 is internally
connected to PWRBTN#. To toggle the power button with
software, GPIO63 must be programmed as an output
using the normal GPIO programming protocol (see Sec-
tion 6.4.1.1 "GPIO Support Registers" on page 204).
GPIO63 must be pulsed low for at least 16 ms and not
more than 4 sec.

Asserting POR# has no effect on ACPI. If POR# is
asserted and ACPI was active prior to POR#, then ACPI
will remain active after POR#. Therefore, BIOS must
ensure that ACPI is inactive before GPIO63 is pulsed
low.