Guest User

Untitled

a guest
Jan 10th, 2019
471
Never
Not a member of Pastebin yet? Sign Up, it unlocks many cool features!
  1. import dp_package::*;
  2. import hwpe_ctrl_package::*;
  3. import hwpe_stream_package::*;
  4.  
  5. module dp_top_wrap
  6. #(
  7. parameter N_MASTER_PORT = 4,
  8. parameter N_CORES = 1,
  9. parameter ID = 10
  10. )
  11. (
  12. // global signals
  13. input logic clk_i,
  14. input logic rst_ni,
  15. input logic test_mode_i,
  16. // evnets
  17. output logic [N_CORES-1:0][REGFILE_N_EVT-1:0] evt_o,
  18. // tcdm master ports
  19. output logic [N_MASTER_PORT-1:0] tcdm_req,
  20. input logic [N_MASTER_PORT-1:0] tcdm_gnt,
  21. output logic [N_MASTER_PORT-1:0][31:0] tcdm_add,
  22. output logic [N_MASTER_PORT-1:0] tcdm_wen,
  23. output logic [N_MASTER_PORT-1:0][3:0] tcdm_be,
  24. output logic [N_MASTER_PORT-1:0][31:0] tcdm_data,
  25. input logic [N_MASTER_PORT-1:0][31:0] tcdm_r_data,
  26. input logic [N_MASTER_PORT-1:0] tcdm_r_valid,
  27. // periph slave port
  28. input logic periph_req,
  29. output logic periph_gnt,
  30. input logic [31:0] periph_add,
  31. input logic periph_wen,
  32. input logic [3:0] periph_be,
  33. input logic [31:0] periph_data,
  34. input logic [ID-1:0] periph_id,
  35. output logic [31:0] periph_r_data,
  36. output logic periph_r_valid,
  37. output logic [ID-1:0] periph_r_id
  38. );
  39.  
  40. hwpe_stream_intf_tcdm tcdm[N_MASTER_PORT-1:0] (
  41. .clk ( clk_i )
  42. );
  43.  
  44. hwpe_ctrl_intf_periph #(
  45. .ID_WIDTH ( ID )
  46. ) periph (
  47. .clk ( clk_i )
  48. );
  49.  
  50. // bindings
  51. generate
  52. for (genvar ii=0; ii<N_MASTER_PORT; ii++) begin: tcdm_binding
  53. assign tcdm_req [ii] = tcdm[ii].req;
  54. assign tcdm_add [ii] = tcdm[ii].add;
  55. assign tcdm_wen [ii] = tcdm[ii].wen;
  56. assign tcdm_be [ii] = tcdm[ii].be;
  57. assign tcdm_data [ii] = tcdm[ii].data;
  58. assign tcdm[ii].gnt = tcdm_gnt [ii];
  59. assign tcdm[ii].r_data = tcdm_r_data [ii];
  60. assign tcdm[ii].r_valid = tcdm_r_valid [ii];
  61. end
  62. endgenerate
  63.  
  64. always_comb
  65. begin
  66. periph.req = periph_req;
  67. periph.add = periph_add;
  68. periph.wen = periph_wen;
  69. periph.be = periph_be;
  70. periph.data = periph_data;
  71. periph.id = periph_id;
  72. periph_gnt = periph.gnt;
  73. periph_r_data = periph.r_data;
  74. periph_r_valid = periph.r_valid;
  75. periph_r_id = periph.r_id;
  76. end
  77.  
  78. dp_top #(
  79. .N_MASTER_PORT ( N_MASTER_PORT ),
  80. .N_CORES ( N_CORES ),
  81. .ID ( ID )
  82. ) i_dp_top (
  83. .clk_i ( clk_i ),
  84. .rst_ni ( rst_ni ),
  85. .test_mode_i ( test_mode_i ),
  86. .evt_o ( evt_o ),
  87. .tcdm ( tcdm.master ),
  88. .periph ( periph.slave )
  89. );
  90.  
  91. endmodule // dp_top_wrap
RAW Paste Data

Adblocker detected! Please consider disabling it...

We've detected AdBlock Plus or some other adblocking software preventing Pastebin.com from fully loading.

We don't have any obnoxious sound, or popup ads, we actively block these annoying types of ads!

Please add Pastebin.com to your ad blocker whitelist or disable your adblocking software.

×