CC tweaked create miner main input control

local vertstate = false --vertical state    back
local oh = false    --horizontal obeserver  left
local ov = false    --vertical obeserver    right
local other = false --other input (for manual/returning control)    top
local full = false  --miner is full         bottom
local function stateout(staten)
    redstone.setAnalogueOutput("front", staten)
end
while true do
    oh = redstone.getInput("left")
    ov = redstone.getInput("right")
    os.sleep(0.1) --every 2 ticks
    vertstate = redstone.getAnalogInput("back")

    other = redstone.getAnalogInput("top")
    full = redstone.getInput("bottom")
    if other == 15 then
        stateout(0)
    elseif other == 0 then
        if not full then
            if vertstate == 10 then
                stateout(8) -- change
                print("ostate 8")
            elseif vertstate == 9 then
                if oh and ov then
                    stateout(7)
                    print("ostate 7")
                else
                    stateout(6)
                    print("ostate 6")
                end

            elseif vertstate == 1 then
                stateout(11)
                print("ostate 11")
            elseif vertstate == 2 then
                stateout(4)
                print("ostate 4")
            elseif vertstate == 8 then
                stateout(5)
                print("ostate 5")
            elseif vertstate == 4 then
                if not oh and not ov then
                    stateout(3)         -- could be 3,9,12
                    print("ostate 3")
                elseif oh and ov then
                    stateout(13)        --new
                    print("ostate 13")
                end



            elseif vertstate == 3 then
                if not oh and not ov then
                    stateout(1)
                elseif oh and ov then
                    stateout(2)
                end
            elseif vertstate == 5 then
                stateout(10)

            end
        else        -- full
            stateout(15)

        end
    end
end